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intel-2D: uxa bugfixes. Gen6 works fine.

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git-svn-id: svn://kolibrios.org@4348 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
Sergey Semyonov (Serge) 2013-12-14 08:18:58 +00:00
parent bf755d6cbd
commit 6c6781f799
3 changed files with 21 additions and 11 deletions
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1
drivers/video/Intel-2D/uxa/i965_render.c
View File

@ -49,6 +49,7 @@
#define intel_debug_fallback printf #define intel_debug_fallback printf
#define DBG printf
// refer vol2, 3d rasterization 3.8.1 // refer vol2, 3d rasterization 3.8.1

4
drivers/video/Intel-2D/uxa/intel_batchbuffer.c
View File

@ -45,6 +45,8 @@
#define DUMP_BATCHBUFFERS NULL // "/tmp/i915-batchbuffers.dump" #define DUMP_BATCHBUFFERS NULL // "/tmp/i915-batchbuffers.dump"
#define DBG printf
static void intel_end_vertex(intel_screen_private *intel) static void intel_end_vertex(intel_screen_private *intel)
{ {
if (intel->vertex_bo) { if (intel->vertex_bo) {
@ -289,7 +291,7 @@ void intel_batch_submit()
struct intel_pixmap, struct intel_pixmap,
batch); batch);
entry->busy = -1; entry->busy = -1;
entry->dirty = 0; entry->dirty = 0;
list_del(&entry->batch); list_del(&entry->batch);
} }

27
drivers/video/Intel-2D/uxa/uxa.c
View File

@ -132,6 +132,8 @@ void sna_set_bo_handle(bitmap_t *bitmap, int handle)
int sna_blit_tex(bitmap_t *bitmap, bool scale, int dst_x, int dst_y, int sna_blit_tex(bitmap_t *bitmap, bool scale, int dst_x, int dst_y,
int w, int h, int src_x, int src_y) int w, int h, int src_x, int src_y)
{ {
// DBG("%s\n", __FUNCTION__);
struct _Pixmap pixSrc, pixMask; struct _Pixmap pixSrc, pixMask;
struct intel_pixmap privSrc; struct intel_pixmap privSrc;
struct _Picture pictSrc, pictDst; struct _Picture pictSrc, pictDst;
@ -174,25 +176,18 @@ int sna_blit_tex(bitmap_t *bitmap, bool scale, int dst_x, int dst_y,
uxa_update_fb(intel); uxa_update_fb(intel);
// pixDst.drawable.bitsPerPixel = 32;
// pixDst.drawable.width = sna_fb.width;
// pixDst.drawable.height = sna_fb.height;
// pixMask.drawable.bitsPerPixel = 8;
// pixMask.drawable.width = update.width;
// pixMask.drawable.height = update.height;
i965_prepare_composite(PictOpSrc, &pictSrc, NULL, &pictDst, i965_prepare_composite(PictOpSrc, &pictSrc, NULL, &pictDst,
&pixSrc, NULL, &fb_pixmap); &pixSrc, NULL, &fb_pixmap);
i965_composite(&fb_pixmap, src_x, src_y, 0, 0, i965_composite(&fb_pixmap, src_x, src_y, 0, 0,
dst_x, dst_y, w, h); dst_x+winx, dst_y+winy, w, h);
i830_done_composite(&fb_pixmap); i830_done_composite(&fb_pixmap);
intel_batch_submit(); intel_batch_submit();
// DBG("%s done\n", __FUNCTION__);
return 0; return 0;
}; };
@ -238,11 +233,15 @@ int uxa_update_fb(struct intel_screen_private *intel)
size_t size; size_t size;
int ret; int ret;
// DBG("%s\n", __FUNCTION__);
ret = drmIoctl(intel->scrn, SRV_FBINFO, &fb); ret = drmIoctl(intel->scrn, SRV_FBINFO, &fb);
if( ret != 0 ) if( ret != 0 )
return ret; return ret;
ipix = (struct intel_pixmap*)fb_pixmap.private; ipix = (struct intel_pixmap*)fb_pixmap.private;
list_init(&ipix->batch);
ipix->stride = fb.pitch; ipix->stride = fb.pitch;
ipix->tiling = fb.tiling; ipix->tiling = fb.tiling;
@ -300,6 +299,14 @@ int uxa_init(uint32_t service)
goto err1; goto err1;
}; };
list_init(&intel->batch_pixmaps);
if ((INTEL_INFO(intel)->gen == 060)) {
intel->wa_scratch_bo =
drm_intel_bo_alloc(intel->bufmgr, "wa scratch",
4096, 4096);
}
if( uxa_init_fb(intel) != 0) if( uxa_init_fb(intel) != 0)
goto err1; goto err1;