git-svn-id: svn://kolibrios.org@886 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
Sergey Semyonov (Serge) 2008-10-27 20:47:58 +00:00
parent 5a66f7d299
commit bc6cebbf4b
11 changed files with 1556 additions and 1379 deletions

File diff suppressed because it is too large Load Diff

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@ -112,7 +112,7 @@ kernel_export:
dd szReleasePages , release_pages dd szReleasePages , release_pages
dd szFreeKernelSpace , free_kernel_space ;stdcall dd szFreeKernelSpace , free_kernel_space ;stdcall
dd szHeapAlloc , @heap_alloc@8 ;fastcall dd szHeapAlloc , @mem_alloc@8 ;fastcall
dd szKernelFree , kernel_free ;stdcall dd szKernelFree , kernel_free ;stdcall
dd szUserAlloc , user_alloc ;stdcall dd szUserAlloc , user_alloc ;stdcall
dd szUserFree , user_free ;stdcall dd szUserFree , user_free ;stdcall

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@ -13,33 +13,42 @@ typedef struct
addr_t base; addr_t base;
size_t size; size_t size;
void* parent; void* parent;
u32_t reserved; u32_t state;
}md_t; }md_t;
typedef struct { #define MD_FREE 1
SPINLOCK_DECLARE(lock); /**< this lock protects everything below */ #define MD_USED 2
u32_t availmask; typedef struct {
link_t list[32]; SPINLOCK_DECLARE(lock); /**< this lock protects everything below */
u32_t availmask;
link_t free[32];
link_t used;
}heap_t; }heap_t;
slab_cache_t *md_slab; slab_cache_t *md_slab;
slab_cache_t *phm_slab; slab_cache_t *phm_slab;
heap_t lheap;
heap_t sheap; heap_t lheap;
heap_t sheap;
static inline void _set_lmask(count_t idx) static inline void _set_lmask(count_t idx)
{ asm volatile ("bts DWORD PTR [_lheap], %0"::"r"(idx):"cc"); } { asm volatile ("bts %0, _lheap"::"r"(idx):"cc"); }
static inline void _reset_lmask(count_t idx) static inline void _reset_lmask(count_t idx)
{ asm volatile ("btr DWORD PTR [_lheap], %0"::"r"(idx):"cc"); } { asm volatile ("btr %0, _lheap"::"r"(idx):"cc"); }
static inline void _set_smask(count_t idx) static inline void _set_smask(count_t idx)
{ asm volatile ("bts DWORD PTR [_sheap], %0"::"r"(idx):"cc"); } { asm volatile ("bts %0, _sheap"::"r"(idx):"cc"); }
static inline void _reset_smask(count_t idx) static inline void _reset_smask(count_t idx)
{ asm volatile ("btr DWORD PTR [_sheap], %0"::"r"(idx):"cc"); } { asm volatile ("btr %0, _sheap"::"r"(idx):"cc"); }
int __fastcall init_heap(addr_t base, size_t size) int __fastcall init_heap(addr_t base, size_t size)
@ -54,10 +63,14 @@ int __fastcall init_heap(addr_t base, size_t size)
for (i = 0; i < 32; i++) for (i = 0; i < 32; i++)
{ {
list_initialize(&lheap.list[i]); list_initialize(&lheap.free[i]);
list_initialize(&sheap.list[i]); list_initialize(&sheap.free[i]);
}; };
list_initialize(&lheap.used);
list_initialize(&sheap.used);
md_slab = slab_cache_create(sizeof(md_t), 32,NULL,NULL,SLAB_CACHE_MAGDEFERRED); md_slab = slab_cache_create(sizeof(md_t), 32,NULL,NULL,SLAB_CACHE_MAGDEFERRED);
md = (md_t*)slab_alloc(md_slab,0); md = (md_t*)slab_alloc(md_slab,0);
@ -66,9 +79,9 @@ int __fastcall init_heap(addr_t base, size_t size)
md->base = base; md->base = base;
md->size = size; md->size = size;
md->parent = NULL; md->parent = NULL;
md->reserved = 0; md->state = MD_FREE;
list_prepend(&md->link, &lheap.list[31]); list_prepend(&md->link, &lheap.free[31]);
lheap.availmask = 0x80000000; lheap.availmask = 0x80000000;
sheap.availmask = 0x00000000; sheap.availmask = 0x00000000;
@ -93,8 +106,8 @@ md_t* __fastcall find_large_md(size_t size)
{ {
if(idx0 == 31) if(idx0 == 31)
{ {
md_t *tmp = (md_t*)lheap.list[31].next; md_t *tmp = (md_t*)lheap.free[31].next;
while((link_t*)tmp != &lheap.list[31]) while((link_t*)tmp != &lheap.free[31])
{ {
if(tmp->size >= size) if(tmp->size >= size)
{ {
@ -110,163 +123,258 @@ md_t* __fastcall find_large_md(size_t size)
{ {
idx0 = _bsf(mask); idx0 = _bsf(mask);
ASSERT( !list_empty(&lheap.list[idx0])) ASSERT( !list_empty(&lheap.free[idx0]))
md = (md_t*)lheap.list[idx0].next; md = (md_t*)lheap.free[idx0].next;
}; };
} }
else else
return NULL; return NULL;
ASSERT(md->state == MD_FREE);
list_remove((link_t*)md); list_remove((link_t*)md);
if(list_empty(&lheap.list[idx0])) if(list_empty(&lheap.free[idx0]))
_reset_lmask(idx0); _reset_lmask(idx0);
if(md->size > size) if(md->size > size)
{ {
count_t idx1; count_t idx1;
md_t *new_md = (md_t*)slab_alloc(md_slab,0); md_t *new_md = (md_t*)slab_alloc(md_slab,0); /* FIXME check */
link_initialize(&new_md->link); link_initialize(&new_md->link);
list_insert(&new_md->adj, &md->adj); list_insert(&new_md->adj, &md->adj);
new_md->base = md->base; new_md->base = md->base;
new_md->size = size; new_md->size = size;
new_md->state = MD_USED;
md->base+= size; md->base+= size;
md->size-= size; md->size-= size;
idx1 = (md->size>>22) - 1 < 32 ? (md->size>>22) - 1 : 31; idx1 = (md->size>>22) - 1 < 32 ? (md->size>>22) - 1 : 31;
list_prepend(&md->link, &lheap.list[idx1]); list_prepend(&md->link, &lheap.free[idx1]);
_set_lmask(idx1); _set_lmask(idx1);
return new_md; return new_md;
} };
md->state = MD_USED;
return md; return md;
} }
md_t* __fastcall find_small_md(size_t size) md_t* __fastcall find_small_md(size_t size)
{ {
eflags_t efl; eflags_t efl;
md_t *md = NULL; md_t *md = NULL;
count_t idx0; count_t idx0;
u32_t mask; u32_t mask;
ASSERT((size & 0xFFF) == 0); ASSERT((size & 0xFFF) == 0);
efl = safe_cli(); efl = safe_cli();
idx0 = (size>>12) - 1 < 32 ? (size>>12) - 1 : 31; idx0 = (size>>12) - 1 < 32 ? (size>>12) - 1 : 31;
mask = sheap.availmask & ( -1<<idx0 ); mask = sheap.availmask & ( -1<<idx0 );
DBG("smask %x size %x idx0 %x mask %x\n",sheap.availmask, size, idx0, mask); DBG("smask %x size %x idx0 %x mask %x\n",sheap.availmask, size, idx0, mask);
if(mask) if(mask)
{ {
if(idx0 == 31) if(idx0 == 31)
{
md_t *tmp = (md_t*)sheap.list[31].next;
while((link_t*)tmp != &sheap.list[31])
{ {
if(tmp->size >= size) ASSERT( !list_empty(&sheap.free[31]));
{
md = tmp; md_t *tmp = (md_t*)sheap.free[31].next;
break; while((link_t*)tmp != &sheap.free[31])
}; {
tmp = (md_t*)tmp->link.next; if(tmp->size >= size)
{
md = tmp;
break;
};
tmp = (md_t*)tmp->link.next;
};
}
else
{
idx0 = _bsf(mask);
ASSERT( !list_empty(&sheap.free[idx0]));
md = (md_t*)sheap.free[idx0].next;
}
};
if(md)
{
DBG("remove md %x\n", md);
ASSERT(md->state==MD_FREE);
list_remove((link_t*)md);
if(list_empty(&sheap.free[idx0]))
_reset_smask(idx0);
}
else
{
md_t *lmd;
lmd = find_large_md((size+0x3FFFFF)&~0x3FFFFF);
DBG("get large md %x\n", lmd);
if( !lmd)
{
safe_sti(efl);
return NULL;
}; };
}
else
{
idx0 = _bsf(mask);
ASSERT( !list_empty(&sheap.list[idx0]))
md = (md_t*)sheap.list[idx0].next;
}
};
if(md) md = (md_t*)slab_alloc(md_slab,0); /* FIXME check */
{
DBG("remove md %x\n", md);
list_remove((link_t*)md); link_initialize(&md->link);
if(list_empty(&sheap.list[idx0])) list_initialize(&md->adj);
_reset_smask(idx0); md->base = lmd->base;
} md->size = lmd->size;
else md->parent = lmd;
{ md->state = MD_USED;
md_t *lmd; };
lmd = find_large_md((size+0x3FFFFF)&~0x3FFFFF);
DBG("get large md %x\n", lmd); if(md->size > size)
{
count_t idx1;
md_t *new_md = (md_t*)slab_alloc(md_slab,0); /* FIXME check */
if( !lmd) link_initialize(&new_md->link);
{ list_insert(&new_md->adj, &md->adj);
safe_sti(efl);
return NULL;
};
md = (md_t*)slab_alloc(md_slab,0); new_md->base = md->base;
link_initialize(&md->link); new_md->size = size;
list_initialize(&md->adj); new_md->parent = md->parent;
md->base = lmd->base; new_md->state = MD_USED;
md->size = lmd->size;
md->parent = lmd;
md->reserved = 0;
};
if(md->size > size) md->base+= size;
{ md->size-= size;
count_t idx1; md->state = MD_FREE;
md_t *new_md = (md_t*)slab_alloc(md_slab,0);
link_initialize(&new_md->link); idx1 = (md->size>>12) - 1 < 32 ? (md->size>>12) - 1 : 31;
list_insert(&new_md->adj, &md->adj);
new_md->base = md->base; DBG("insert md %x, base %x size %x idx %x\n", md,md->base, md->size,idx1);
new_md->size = size;
new_md->parent = md->parent;
new_md->reserved = 0;
md->base+= size; if( idx1 < 31)
md->size-= size; list_prepend(&md->link, &sheap.free[idx1]);
else
{
if( list_empty(&sheap.free[31]))
list_prepend(&md->link, &sheap.free[31]);
else
{
md_t *tmp = (md_t*)sheap.free[31].next;
idx1 = (md->size>>12) - 1 < 32 ? (md->size>>12) - 1 : 31; while((link_t*)tmp != &sheap.free[31])
{
if(md->base < tmp->base)
break;
tmp = (md_t*)tmp->link.next;
}
list_insert(&md->link, &tmp->link);
};
};
DBG("insert md %x, base %x size %x idx %x\n", md,md->base, md->size,idx1); _set_smask(idx1);
if( idx1 < 31) safe_sti(efl);
list_prepend(&md->link, &sheap.list[idx1]);
else
{
if( list_empty(&sheap.list[31]))
list_prepend(&md->link, &sheap.list[31]);
else
{
md_t *tmp = (md_t*)sheap.list[31].next;
while((link_t*)tmp != &sheap.list[31]) return new_md;
{ };
if(md->base < tmp->base)
break;
tmp = (md_t*)tmp->link.next;
}
list_insert(&md->link, &tmp->link);
};
};
_set_smask(idx1); md->state = MD_USED;
safe_sti(efl); safe_sti(efl);
return new_md; return md;
}
safe_sti(efl);
return md;
} }
void __fastcall free_small_md(md_t *md)
{
eflags_t efl ;
md_t *fd;
md_t *bk;
count_t idx;
efl = safe_cli();
spinlock_lock(&sheap.lock);
if( !list_empty(&md->adj))
{
bk = (md_t*)md->adj.prev;
fd = (md_t*)md->adj.next;
if(fd->state == MD_FREE)
{
idx = (fd->size>>12) - 1 < 32 ? (fd->size>>12) - 1 : 31;
list_remove((link_t*)fd);
if(list_empty(&sheap.free[idx]))
_reset_smask(idx);
md->size+= fd->size;
md->adj.next = fd->adj.next;
md->adj.next->prev = (link_t*)md;
slab_free(md_slab, fd);
};
if(bk->state == MD_FREE)
{
idx = (bk->size>>12) - 1 < 32 ? (bk->size>>12) - 1 : 31;
list_remove((link_t*)bk);
if(list_empty(&sheap.free[idx]))
_reset_smask(idx);
bk->size+= md->size;
bk->adj.next = md->adj.next;
bk->adj.next->prev = (link_t*)bk;
slab_free(md_slab, md);
md = fd;
};
};
md->state = MD_FREE;
idx = (md->size>>12) - 1 < 32 ? (md->size>>12) - 1 : 31;
_set_smask(idx);
if( idx < 31)
list_prepend(&md->link, &sheap.free[idx]);
else
{
if( list_empty(&sheap.free[31]))
list_prepend(&md->link, &sheap.free[31]);
else
{
md_t *tmp = (md_t*)sheap.free[31].next;
while((link_t*)tmp != &sheap.free[31])
{
if(md->base < tmp->base)
break;
tmp = (md_t*)tmp->link.next;
}
list_insert(&md->link, &tmp->link);
};
};
spinlock_unlock(&sheap.lock);
safe_sti(efl);
};
#define page_tabs 0xDF800000
/*
phismem_t* __fastcall phis_alloc(count_t count) phismem_t* __fastcall phis_alloc(count_t count)
{ {
phismem_t *phm; phismem_t *phm;
@ -289,8 +397,6 @@ phismem_t* __fastcall phis_alloc(count_t count)
return phm; return phm;
} }
#define page_tabs 0xDF800000
void map_phm(addr_t base, phismem_t *phm, u32_t mapflags) void map_phm(addr_t base, phismem_t *phm, u32_t mapflags)
{ {
count_t count; count_t count;
@ -317,62 +423,130 @@ void map_phm(addr_t base, phismem_t *phm, u32_t mapflags)
} }
} }
}; };
*/
void* __fastcall mem_alloc(size_t size, u32_t flags) void * __fastcall mem_alloc(size_t size, u32_t flags)
{ {
md_t *md; eflags_t efl;
phismem_t *phm;
size = (size+4095)&~4095; md_t *md;
md = find_small_md(size); DBG("\nmem_alloc: %x bytes\n", size);
if( md )
{ ASSERT(size != 0);
phm = phis_alloc(size>>12);
map_phm(md->base , phm, flags); size = (size+4095)&~4095;
return (void*)md->base;
} md = find_small_md(size);
return NULL;
if( md )
{
ASSERT(md->state == MD_USED);
if( flags & PG_MAP )
{
count_t tmp = size >> 12;
addr_t *pte = &((addr_t*)page_tabs)[md->base>>12];
while(tmp)
{
u32_t order;
addr_t frame;
size_t size;
asm volatile ("bsr %1, %0":"=&r"(order):"r"(tmp):"cc");
asm volatile ("btr %1, %0" :"=r"(tmp):"r"(order):"cc");
frame = core_alloc(order) | flags; /* FIXME check */
size = (1 << order);
while(size--)
{
*pte++ = frame;
frame+= 4096;
};
};
};
efl = safe_cli();
spinlock_lock(&sheap.lock);
if( list_empty(&sheap.used) )
list_prepend(&md->link, &sheap.used);
else
{
md_t *tmp = (md_t*)sheap.used.next;
while((link_t*)tmp != &sheap.used)
{
if(md->base < tmp->base)
break;
tmp = (md_t*)tmp->link.next;
}
list_insert(&md->link, &tmp->link);
};
spinlock_unlock(&sheap.lock);
safe_sti(efl);
DBG("allocate: %x size %x\n\n",md->base, size);
return (void*)md->base;
};
return NULL;
}; };
void * __fastcall heap_alloc(size_t size, u32_t flags) void __fastcall mem_free(void *mem)
{ {
md_t *md; eflags_t efl;
size = (size+4095)&~4095; md_t *tmp;
md_t *md = NULL;
md = find_small_md(size); DBG("mem_free: %x\n",mem);
if( md ) ASSERT( mem != 0 );
{ ASSERT( ((addr_t)mem & 0xFFF) == 0 );
if( flags & PG_MAP ) ASSERT( ! list_empty(&sheap.used));
{
count_t tmp = size >> 12;
addr_t *pte = &((addr_t*)page_tabs)[md->base>>12];
while(tmp) efl = safe_cli();
{
u32_t order;
addr_t frame;
size_t size;
asm volatile ("bsr %0, %1":"=&r"(order):"r"(tmp):"cc"); tmp = (md_t*)sheap.used.next;
asm volatile ("btr %0, %1" :"=r"(tmp):"r"(order):"cc");
frame = core_alloc(order) | flags; while((link_t*)tmp != &sheap.used)
{
if( tmp->base == (addr_t)mem )
{
md = tmp;
break;
};
tmp = (md_t*)tmp->link.next;
}
size = (1 << order); if( md )
while(size--) {
{ DBG("\tmd: %x base: %x size: %x\n",md, md->base, md->size);
*pte++ = frame;
frame+= 4096; ASSERT(md->state == MD_USED);
};
}; count_t tmp = md->size >> 12;
}; addr_t *pte = &((addr_t*)page_tabs)[md->base>>12];
DBG("alloc_heap: %x size %x\n\n",md->base, size);
return (void*)md->base; while(tmp--)
}; {
return NULL; *pte++ = 0;
asm volatile (
"invlpg (%0)"
:
:"r" (mem) );
mem+= 4096;
};
list_remove((link_t*)md);
free_small_md( md );
}
else
{
DBG("\tERROR: invalid base address: %x\n", mem);
};
safe_sti(efl);
}; };

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@ -16,7 +16,7 @@ zone_t z_core;
static inline u32_t save_edx(void) static inline u32_t save_edx(void)
{ {
u32_t val; u32_t val;
asm volatile ("mov %0, edx":"=r"(val)); asm volatile ("movl %%edx, %0":"=r"(val));
return val; return val;
}; };
@ -524,9 +524,9 @@ static inline int to_order(count_t arg)
{ {
int n; int n;
asm volatile ( asm volatile (
"xor eax, eax \n\t" "xorl %eax, %eax \n\t"
"bsr eax, edx \n\t" "bsr %edx, %eax \n\t"
"inc eax" "incl %eax"
:"=a" (n) :"=a" (n)
:"d"(arg) :"d"(arg)
); );

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@ -20,8 +20,6 @@ static slab_t *slab_create();
static slab_cache_t * slab_cache_alloc(); static slab_cache_t * slab_cache_alloc();
void slab_free(slab_cache_t *cache, void *obj);
/** /**
* Allocate frames for slab space and initialize * Allocate frames for slab space and initialize
@ -313,22 +311,22 @@ static count_t slab_obj_destroy(slab_cache_t *cache, void *obj,
/** Return object to cache, use slab if known */ /** Return object to cache, use slab if known */
static void _slab_free(slab_cache_t *cache, void *obj, slab_t *slab) static void _slab_free(slab_cache_t *cache, void *obj, slab_t *slab)
{ {
// ipl_t ipl; eflags_t efl;
// ipl = interrupts_disable(); efl = safe_cli();
// if ((cache->flags & SLAB_CACHE_NOMAGAZINE) \ // if ((cache->flags & SLAB_CACHE_NOMAGAZINE) \
|| magazine_obj_put(cache, obj)) { // || magazine_obj_put(cache, obj)) {
slab_obj_destroy(cache, obj, slab); slab_obj_destroy(cache, obj, slab);
// } // }
// interrupts_restore(ipl); safe_sti(efl);
// atomic_dec(&cache->allocated_objs); atomic_dec(&cache->allocated_objs);
} }
/** Return slab object to cache */ /** Return slab object to cache */
void slab_free(slab_cache_t *cache, void *obj) void __fastcall slab_free(slab_cache_t *cache, void *obj)
{ {
_slab_free(cache, obj, NULL); _slab_free(cache, obj, NULL);
} }

File diff suppressed because it is too large Load Diff

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@ -36,17 +36,17 @@ typedef struct atomic {
static inline void atomic_inc(atomic_t *val) { static inline void atomic_inc(atomic_t *val) {
#ifdef USE_SMP #ifdef USE_SMP
asm volatile ("lock inc %0\n" : "+m" (val->count)); asm volatile ("lock incl %0\n" : "+m" (val->count));
#else #else
asm volatile ("inc %0\n" : "+m" (val->count)); asm volatile ("incl %0\n" : "+m" (val->count));
#endif /* USE_SMP */ #endif /* USE_SMP */
} }
static inline void atomic_dec(atomic_t *val) { static inline void atomic_dec(atomic_t *val) {
#ifdef USE_SMP #ifdef USE_SMP
asm volatile ("lock dec %0\n" : "+m" (val->count)); asm volatile ("lock decl %0\n" : "+m" (val->count));
#else #else
asm volatile ("dec %0\n" : "+m" (val->count)); asm volatile ("decl %0\n" : "+m" (val->count));
#endif /* USE_SMP */ #endif /* USE_SMP */
} }
@ -98,22 +98,20 @@ static inline void atomic_lock_arch(atomic_t *val)
u32_t tmp; u32_t tmp;
// preemption_disable(); // preemption_disable();
asm volatile (
"0:\n"
"pause\n\t" /* Pentium 4's HT love this instruction */
"mov %1, [%0]\n\t"
"test %1, %1\n\t"
"jnz 0b\n\t" /* lightweight looping on locked spinlock */
"inc %1\n\t" /* now use the atomic operation */ asm volatile (
"xchg [%0], %1\n\t" "0:\n"
"test %1, %1\n\t" "pause\n" /* Pentium 4's HT love this instruction */
"jnz 0b\n\t" "mov %0, %1\n"
: "+m" (val->count), "=r"(tmp) "testl %1, %1\n"
); "jnz 0b\n" /* lightweight looping on locked spinlock */
/*
* Prevent critical section code from bleeding out this way up. "incl %1\n" /* now use the atomic operation */
*/ "xchgl %0, %1\n"
"testl %1, %1\n"
"jnz 0b\n"
: "+m" (val->count), "=&r"(tmp)
);
// CS_ENTER_BARRIER(); // CS_ENTER_BARRIER();
} }

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@ -37,8 +37,8 @@ static inline eflags_t safe_cli(void)
{ {
eflags_t tmp; eflags_t tmp;
asm volatile ( asm volatile (
"pushf\n\t" "pushfl\n\t"
"pop %0\n\t" "popl %0\n\t"
"cli\n" "cli\n"
: "=r" (tmp) : "=r" (tmp)
); );
@ -48,8 +48,8 @@ static inline eflags_t safe_cli(void)
static inline void safe_sti(eflags_t efl) static inline void safe_sti(eflags_t efl)
{ {
asm volatile ( asm volatile (
"push %0\n\t" "pushl %0\n\t"
"popf\n" "popfl\n"
: : "r" (efl) : : "r" (efl)
); );
} }
@ -57,8 +57,8 @@ static inline void safe_sti(eflags_t efl)
static inline count_t fnzb(u32_t arg) static inline count_t fnzb(u32_t arg)
{ {
count_t n; count_t n;
asm volatile ("xor %0, %0 \n\t" asm volatile ("xorl %0, %0 \n\t"
"bsr %0, %1" "bsr %1, %0"
:"=&r" (n) :"=&r" (n)
:"r"(arg) :"r"(arg)
); );
@ -68,8 +68,8 @@ static inline count_t fnzb(u32_t arg)
static inline count_t _bsf(u32_t arg) static inline count_t _bsf(u32_t arg)
{ {
count_t n; count_t n;
asm volatile ("xor %0, %0 \n\t" asm volatile ("xorl %0, %0 \n\t"
"bsf %0, %1" "bsf %1, %0"
:"=&r" (n) :"=&r" (n)
:"r"(arg) :"r"(arg)
); );

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@ -78,3 +78,5 @@ slab_cache_t * slab_cache_create(
int flags); int flags);
void* __fastcall slab_alloc(slab_cache_t *cache, int flags); void* __fastcall slab_alloc(slab_cache_t *cache, int flags);
void __fastcall slab_free(slab_cache_t *cache, void *obj);

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@ -147,9 +147,9 @@ extrn @init_heap@8
extrn @find_large_md@4 extrn @find_large_md@4
extrn @find_small_md@4 extrn @find_small_md@4
extrn @phis_alloc@4 extrn @phis_alloc@4
extrn @mem_alloc@8
extrn @heap_alloc@8 extrn @mem_alloc@8
extrn @mem_free@4
extrn _slab_cache_init extrn _slab_cache_init
extrn _alloc_page extrn _alloc_page
@ -159,9 +159,6 @@ extrn _get_free_mem
extrn _bx_from_load extrn _bx_from_load
@mem_alloc@8 equ @heap_alloc@8
section '.flat' code readable align 4096 section '.flat' code readable align 4096
use32 use32

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@ -6,7 +6,7 @@ INCLUDE = include/
DEFS = -DUSE_SMP -DCONFIG_DEBUG DEFS = -DUSE_SMP -DCONFIG_DEBUG
CFLAGS = -c -O2 -I $(INCLUDE) -fomit-frame-pointer -fno-builtin-printf -masm=intel CFLAGS = -c -O2 -I $(INCLUDE) -fomit-frame-pointer -fno-builtin-printf
LDFLAGS = -shared -s -Map kernel.map --image-base 0x100000 --file-alignment 32 LDFLAGS = -shared -s -Map kernel.map --image-base 0x100000 --file-alignment 32
KERNEL_SRC:= \ KERNEL_SRC:= \