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Ethernet Cable status detection through new system function 53,10.

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output is in al:
255 = driver not loaded/function not supported by driver
1 = cable is connected
0 = cable is not connected

THIS FUNCTION IS ONLY IMPLENTED FOR RTL8139 FOR NOW

git-svn-id: svn://kolibrios.org@302 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
hidnplayr 2007-01-30 20:01:17 +00:00
parent b5e0fe41ca
commit d1b95f89ef
4 changed files with 632 additions and 596 deletions
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794
kernel/trunk/network/eth_drv/drivers/rtl8139.inc
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@ -25,148 +25,148 @@
;; ;; ;; ;;
;; ;; ;; ;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
ETH_ALEN equ 6 ETH_ALEN equ 6
ETH_HLEN equ (2 * ETH_ALEN + 2) ETH_HLEN equ (2 * ETH_ALEN + 2)
ETH_ZLEN equ 60 ; 60 + 4bytes auto payload for ETH_ZLEN equ 60 ; 60 + 4bytes auto payload for
; mininmum 64bytes frame length ; mininmum 64bytes frame length
PCI_REG_COMMAND equ 0x04 ; command register PCI_REG_COMMAND equ 0x04 ; command register
PCI_BIT_PIO equ 0 ; bit0: io space control PCI_BIT_PIO equ 0 ; bit0: io space control
PCI_BIT_MMIO equ 1 ; bit1: memory space control PCI_BIT_MMIO equ 1 ; bit1: memory space control
PCI_BIT_MASTER equ 2 ; bit2: device acts as a PCI master PCI_BIT_MASTER equ 2 ; bit2: device acts as a PCI master
RTL8139_REG_MAR0 equ 0x08 ; multicast filter register 0 RTL8139_REG_MAR0 equ 0x08 ; multicast filter register 0
RTL8139_REG_MAR4 equ 0x0c ; multicast filter register 4 RTL8139_REG_MAR4 equ 0x0c ; multicast filter register 4
RTL8139_REG_TSD0 equ 0x10 ; transmit status of descriptor RTL8139_REG_TSD0 equ 0x10 ; transmit status of descriptor
RTL8139_REG_TSAD0 equ 0x20 ; transmit start address of descriptor RTL8139_REG_TSAD0 equ 0x20 ; transmit start address of descriptor
RTL8139_REG_RBSTART equ 0x30 ; RxBuffer start address RTL8139_REG_RBSTART equ 0x30 ; RxBuffer start address
RTL8139_REG_COMMAND equ 0x37 ; command register RTL8139_REG_COMMAND equ 0x37 ; command register
RTL8139_REG_CAPR equ 0x38 ; current address of packet read RTL8139_REG_CAPR equ 0x38 ; current address of packet read
RTL8139_REG_IMR equ 0x3c ; interrupt mask register RTL8139_REG_IMR equ 0x3c ; interrupt mask register
RTL8139_REG_ISR equ 0x3e ; interrupt status register RTL8139_REG_ISR equ 0x3e ; interrupt status register
RTL8139_REG_TXCONFIG equ 0x40 ; transmit configuration register RTL8139_REG_TXCONFIG equ 0x40 ; transmit configuration register
RTL8139_REG_TXCONFIG_0 equ 0x40 ; transmit configuration register 0 RTL8139_REG_TXCONFIG_0 equ 0x40 ; transmit configuration register 0
RTL8139_REG_TXCONFIG_1 equ 0x41 ; transmit configuration register 1 RTL8139_REG_TXCONFIG_1 equ 0x41 ; transmit configuration register 1
RTL8139_REG_TXCONFIG_2 equ 0x42 ; transmit configuration register 2 RTL8139_REG_TXCONFIG_2 equ 0x42 ; transmit configuration register 2
RTL8139_REG_TXCONFIG_3 equ 0x43 ; transmit configuration register 3 RTL8139_REG_TXCONFIG_3 equ 0x43 ; transmit configuration register 3
RTL8139_REG_RXCONFIG equ 0x44 ; receive configuration register 0 RTL8139_REG_RXCONFIG equ 0x44 ; receive configuration register 0
RTL8139_REG_RXCONFIG_0 equ 0x44 ; receive configuration register 0 RTL8139_REG_RXCONFIG_0 equ 0x44 ; receive configuration register 0
RTL8139_REG_RXCONFIG_1 equ 0x45 ; receive configuration register 1 RTL8139_REG_RXCONFIG_1 equ 0x45 ; receive configuration register 1
RTL8139_REG_RXCONFIG_2 equ 0x46 ; receive configuration register 2 RTL8139_REG_RXCONFIG_2 equ 0x46 ; receive configuration register 2
RTL8139_REG_RXCONFIG_3 equ 0x47 ; receive configuration register 3 RTL8139_REG_RXCONFIG_3 equ 0x47 ; receive configuration register 3
RTL8139_REG_MPC equ 0x4c ; missed packet counter RTL8139_REG_MPC equ 0x4c ; missed packet counter
RTL8139_REG_9346CR equ 0x50 ; serial eeprom 93C46 command register RTL8139_REG_9346CR equ 0x50 ; serial eeprom 93C46 command register
RTL8139_REG_CONFIG1 equ 0x52 ; configuration register 1 RTL8139_REG_CONFIG1 equ 0x52 ; configuration register 1
RTL8139_REG_CONFIG4 equ 0x5a ; configuration register 4 RTL8139_REG_CONFIG4 equ 0x5a ; configuration register 4
RTL8139_REG_HLTCLK equ 0x5b ; undocumented halt clock register RTL8139_REG_HLTCLK equ 0x5b ; undocumented halt clock register
RTL8139_REG_BMCR equ 0x62 ; basic mode control register RTL8139_REG_BMCR equ 0x62 ; basic mode control register
RTL8139_REG_ANAR equ 0x66 ; auto negotiation advertisement register RTL8139_REG_ANAR equ 0x66 ; auto negotiation advertisement register
; 5.1 packet header ; 5.1 packet header
RTL8139_BIT_RUNT equ 4 ; total packet length < 64 bytes RTL8139_BIT_RUNT equ 4 ; total packet length < 64 bytes
RTL8139_BIT_LONG equ 3 ; total packet length > 4k RTL8139_BIT_LONG equ 3 ; total packet length > 4k
RTL8139_BIT_CRC equ 2 ; crc error occured RTL8139_BIT_CRC equ 2 ; crc error occured
RTL8139_BIT_FAE equ 1 ; frame alignment error occured RTL8139_BIT_FAE equ 1 ; frame alignment error occured
RTL8139_BIT_ROK equ 0 ; received packet is ok RTL8139_BIT_ROK equ 0 ; received packet is ok
; 5.4 command register ; 5.4 command register
RTL8139_BIT_RST equ 4 ; reset bit RTL8139_BIT_RST equ 4 ; reset bit
RTL8139_BIT_RE equ 3 ; receiver enabled RTL8139_BIT_RE equ 3 ; receiver enabled
RTL8139_BIT_TE equ 2 ; transmitter enabled RTL8139_BIT_TE equ 2 ; transmitter enabled
RTL8139_BIT_BUFE equ 0 ; rx buffer is empty, no packet stored RTL8139_BIT_BUFE equ 0 ; rx buffer is empty, no packet stored
; 5.6 interrupt status register ; 5.6 interrupt status register
RTL8139_BIT_ISR_TOK equ 2 ; transmit ok RTL8139_BIT_ISR_TOK equ 2 ; transmit ok
RTL8139_BIT_ISR_RER equ 1 ; receive error interrupt RTL8139_BIT_ISR_RER equ 1 ; receive error interrupt
RTL8139_BIT_ISR_ROK equ 0 ; receive ok RTL8139_BIT_ISR_ROK equ 0 ; receive ok
; 5.7 transmit configyration register ; 5.7 transmit configyration register
RTL8139_BIT_TX_MXDMA equ 8 ; Max DMA burst size per Tx DMA burst RTL8139_BIT_TX_MXDMA equ 8 ; Max DMA burst size per Tx DMA burst
RTL8139_BIT_TXRR equ 4 ; Tx Retry count 16+(TXRR*16) RTL8139_BIT_TXRR equ 4 ; Tx Retry count 16+(TXRR*16)
; 5.8 receive configuration register ; 5.8 receive configuration register
RTL8139_BIT_RXFTH equ 13 ; Rx fifo threshold RTL8139_BIT_RXFTH equ 13 ; Rx fifo threshold
RTL8139_BIT_RBLEN equ 11 ; Ring buffer length indicator RTL8139_BIT_RBLEN equ 11 ; Ring buffer length indicator
RTL8139_BIT_RX_MXDMA equ 8 ; Max DMA burst size per Rx DMA burst RTL8139_BIT_RX_MXDMA equ 8 ; Max DMA burst size per Rx DMA burst
RTL8139_BIT_NOWRAP equ 7 ; transfered data wrapping RTL8139_BIT_NOWRAP equ 7 ; transfered data wrapping
RTL8139_BIT_9356SEL equ 6 ; eeprom selector 9346/9356 RTL8139_BIT_9356SEL equ 6 ; eeprom selector 9346/9356
RTL8139_BIT_AER equ 5 ; accept error packets RTL8139_BIT_AER equ 5 ; accept error packets
RTL8139_BIT_AR equ 4 ; accept runt packets RTL8139_BIT_AR equ 4 ; accept runt packets
RTL8139_BIT_AB equ 3 ; accept broadcast packets RTL8139_BIT_AB equ 3 ; accept broadcast packets
RTL8139_BIT_AM equ 2 ; accept multicast packets RTL8139_BIT_AM equ 2 ; accept multicast packets
RTL8139_BIT_APM equ 1 ; accept physical match packets RTL8139_BIT_APM equ 1 ; accept physical match packets
RTL8139_BIT_AAP equ 0 ; accept all packets RTL8139_BIT_AAP equ 0 ; accept all packets
; 5.9 93C46/93C56 command register ; 5.9 93C46/93C56 command register
RTL8139_BIT_93C46_EEM1 equ 7 ; RTL8139 eeprom operating mode1 RTL8139_BIT_93C46_EEM1 equ 7 ; RTL8139 eeprom operating mode1
RTL8139_BIT_93C46_EEM0 equ 6 ; RTL8139 eeprom operating mode0 RTL8139_BIT_93C46_EEM0 equ 6 ; RTL8139 eeprom operating mode0
RTL8139_BIT_93C46_EECS equ 3 ; chip select RTL8139_BIT_93C46_EECS equ 3 ; chip select
RTL8139_BIT_93C46_EESK equ 2 ; serial data clock RTL8139_BIT_93C46_EESK equ 2 ; serial data clock
RTL8139_BIT_93C46_EEDI equ 1 ; serial data input RTL8139_BIT_93C46_EEDI equ 1 ; serial data input
RTL8139_BIT_93C46_EEDO equ 0 ; serial data output RTL8139_BIT_93C46_EEDO equ 0 ; serial data output
; 5.11 configuration register 1 ; 5.11 configuration register 1
RTL8139_BIT_LWACT equ 4 ; see RTL8139_REG_CONFIG1 RTL8139_BIT_LWACT equ 4 ; see RTL8139_REG_CONFIG1
RTL8139_BIT_SLEEP equ 1 ; sleep bit at older chips RTL8139_BIT_SLEEP equ 1 ; sleep bit at older chips
RTL8139_BIT_PWRDWN equ 0 ; power down bit at older chips RTL8139_BIT_PWRDWN equ 0 ; power down bit at older chips
RTL8139_BIT_PMEn equ 0 ; power management enabled RTL8139_BIT_PMEn equ 0 ; power management enabled
; 5.14 configuration register 4 ; 5.14 configuration register 4
RTL8139_BIT_LWPTN equ 2 ; see RTL8139_REG_CONFIG4 RTL8139_BIT_LWPTN equ 2 ; see RTL8139_REG_CONFIG4
; 6.2 transmit status register ; 6.2 transmit status register
RTL8139_BIT_ERTXTH equ 16 ; early TX threshold RTL8139_BIT_ERTXTH equ 16 ; early TX threshold
RTL8139_BIT_TOK equ 15 ; transmit ok RTL8139_BIT_TOK equ 15 ; transmit ok
RTL8139_BIT_OWN equ 13 ; tx DMA operation is completed RTL8139_BIT_OWN equ 13 ; tx DMA operation is completed
; 6.18 basic mode control register ; 6.18 basic mode control register
RTL8139_BIT_ANE equ 12 ; auto negotiation enable RTL8139_BIT_ANE equ 12 ; auto negotiation enable
; 6.20 auto negotiation advertisement register ; 6.20 auto negotiation advertisement register
RTL8139_BIT_TXFD equ 8 ; 100base-T full duplex RTL8139_BIT_TXFD equ 8 ; 100base-T full duplex
RTL8139_BIT_TX equ 7 ; 100base-T RTL8139_BIT_TX equ 7 ; 100base-T
RTL8139_BIT_10FD equ 6 ; 10base-T full duplex RTL8139_BIT_10FD equ 6 ; 10base-T full duplex
RTL8139_BIT_10 equ 5 ; 10base-T RTL8139_BIT_10 equ 5 ; 10base-T
RTL8139_BIT_SELECTOR equ 0 ; binary encoded selector CSMA/CD=00001 RTL8139_BIT_SELECTOR equ 0 ; binary encoded selector CSMA/CD=00001
; RX/TX buffer size ; RX/TX buffer size
RTL8139_RBLEN equ 0 ; 0==8K 1==16k 2==32k 3==64k RTL8139_RBLEN equ 0 ; 0==8K 1==16k 2==32k 3==64k
RTL8139_RX_BUFFER_SIZE equ (8192 shl RTL8139_RBLEN) RTL8139_RX_BUFFER_SIZE equ (8192 shl RTL8139_RBLEN)
MAX_ETH_FRAME_SIZE equ 1516 ; exactly 1514 wthout CRC MAX_ETH_FRAME_SIZE equ 1516 ; exactly 1514 wthout CRC
RTL8139_NUM_TX_DESC equ 4 RTL8139_NUM_TX_DESC equ 4
RTL8139_TX_BUFFER_SIZE equ (MAX_ETH_FRAME_SIZE * RTL8139_NUM_TX_DESC) RTL8139_TX_BUFFER_SIZE equ (MAX_ETH_FRAME_SIZE * RTL8139_NUM_TX_DESC)
RTL8139_TXRR equ 8 ; total retries = 16+(TXRR*16) RTL8139_TXRR equ 8 ; total retries = 16+(TXRR*16)
RTL8139_TX_MXDMA equ 6 ; 0==16 1==32 2==64 3==128 RTL8139_TX_MXDMA equ 6 ; 0==16 1==32 2==64 3==128
; 4==256 5==512 6==1024 7==2048 ; 4==256 5==512 6==1024 7==2048
RTL8139_ERTXTH equ 8 ; in unit of 32 bytes e.g:(8*32)=256 RTL8139_ERTXTH equ 8 ; in unit of 32 bytes e.g:(8*32)=256
RTL8139_RX_MXDMA equ 7 ; 0==16 1==32 2==64 3==128 RTL8139_RX_MXDMA equ 7 ; 0==16 1==32 2==64 3==128
; 4==256 5==512 6==1024 7==unlimited ; 4==256 5==512 6==1024 7==unlimited
RTL8139_RXFTH equ 7 ; 0==16 1==32 2==64 3==128 RTL8139_RXFTH equ 7 ; 0==16 1==32 2==64 3==128
; 4==256 5==512 6==1024 7==no threshold ; 4==256 5==512 6==1024 7==no threshold
RTL8139_RX_CONFIG equ ((RTL8139_RBLEN shl RTL8139_BIT_RBLEN) \ RTL8139_RX_CONFIG equ ((RTL8139_RBLEN shl RTL8139_BIT_RBLEN) \
or (RTL8139_RX_MXDMA shl RTL8139_BIT_RX_MXDMA) \ or (RTL8139_RX_MXDMA shl RTL8139_BIT_RX_MXDMA) \
or (1 shl RTL8139_BIT_NOWRAP) \ or (1 shl RTL8139_BIT_NOWRAP) \
or (RTL8139_RXFTH shl RTL8139_BIT_RXFTH) \ or (RTL8139_RXFTH shl RTL8139_BIT_RXFTH) \
or (1 shl RTL8139_BIT_AB) or (1 shl RTL8139_BIT_APM) \ or (1 shl RTL8139_BIT_AB) or (1 shl RTL8139_BIT_APM) \
or (1 shl RTL8139_BIT_AER) or (1 shl RTL8139_BIT_AR) \ or (1 shl RTL8139_BIT_AER) or (1 shl RTL8139_BIT_AR) \
or (1 shl RTL8139_BIT_AM)) or (1 shl RTL8139_BIT_AM))
RTL8139_TX_TIMEOUT equ 30 ; 300 milliseconds timeout RTL8139_TX_TIMEOUT equ 30 ; 300 milliseconds timeout
EE_93C46_REG_ETH_ID equ 7 ; MAC offset EE_93C46_REG_ETH_ID equ 7 ; MAC offset
EE_93C46_READ_CMD equ (6 shl 6) ; 110b + 6bit address EE_93C46_READ_CMD equ (6 shl 6) ; 110b + 6bit address
EE_93C56_READ_CMD equ (6 shl 8) ; 110b + 8bit address EE_93C56_READ_CMD equ (6 shl 8) ; 110b + 8bit address
EE_93C46_CMD_LENGTH equ 9 ; start bit + cmd + 6bit address EE_93C46_CMD_LENGTH equ 9 ; start bit + cmd + 6bit address
EE_93C56_CMD_LENGTH equ 11 ; start bit + cmd + 8bit ddress EE_93C56_CMD_LENGTH equ 11 ; start bit + cmd + 8bit ddress
VER_RTL8139 equ 1100000b VER_RTL8139 equ 1100000b
VER_RTL8139A equ 1110000b VER_RTL8139A equ 1110000b
; VER_RTL8139AG equ 1110100b ; VER_RTL8139AG equ 1110100b
VER_RTL8139B equ 1111000b VER_RTL8139B equ 1111000b
VER_RTL8130 equ VER_RTL8139B VER_RTL8130 equ VER_RTL8139B
VER_RTL8139C equ 1110100b VER_RTL8139C equ 1110100b
VER_RTL8100 equ 1111010b VER_RTL8100 equ 1111010b
VER_RTL8100B equ 1110101b VER_RTL8100B equ 1110101b
VER_RTL8139D equ VER_RTL8100B VER_RTL8139D equ VER_RTL8100B
VER_RTL8139CP equ 1110110b VER_RTL8139CP equ 1110110b
VER_RTL8101 equ 1110111b VER_RTL8101 equ 1110111b
IDX_RTL8139 equ 0 IDX_RTL8139 equ 0
IDX_RTL8139A equ 1 IDX_RTL8139A equ 1
IDX_RTL8139B equ 2 IDX_RTL8139B equ 2
IDX_RTL8139C equ 3 IDX_RTL8139C equ 3
IDX_RTL8100 equ 4 IDX_RTL8100 equ 4
IDX_RTL8139D equ 5 IDX_RTL8139D equ 5
IDX_RTL8139D equ 6 IDX_RTL8139D equ 6
IDX_RTL8101 equ 7 IDX_RTL8101 equ 7
; These two must be 4 byte aligned ( which they are ) ; These two must be 4 byte aligned ( which they are )
@ -174,14 +174,14 @@ rtl8139_rx_buff equ eth_data_start
rtl8139_tx_buff equ rtl8139_rx_buff + (RTL8139_RX_BUFFER_SIZE + MAX_ETH_FRAME_SIZE) rtl8139_tx_buff equ rtl8139_rx_buff + (RTL8139_RX_BUFFER_SIZE + MAX_ETH_FRAME_SIZE)
uglobal uglobal
align 4 align 4
rtl8139_rx_buff_offset: dd 0 rtl8139_rx_buff_offset: dd 0
curr_tx_desc: dd 0 curr_tx_desc: dd 0
endg endg
iglobal iglobal
hw_ver_array: db VER_RTL8139, VER_RTL8139A, VER_RTL8139B, VER_RTL8139C hw_ver_array: db VER_RTL8139, VER_RTL8139A, VER_RTL8139B, VER_RTL8139C
db VER_RTL8100, VER_RTL8139D, VER_RTL8139CP, VER_RTL8101 db VER_RTL8100, VER_RTL8139D, VER_RTL8139CP, VER_RTL8101
HW_VER_ARRAY_SIZE = $-hw_ver_array HW_VER_ARRAY_SIZE = $-hw_ver_array
endg endg
@ -201,71 +201,71 @@ endg
;*************************************************************************** ;***************************************************************************
rtl8139_probe: rtl8139_probe:
; enable the device ; enable the device
mov al, 2 mov al, 2
mov ah, [pci_bus] mov ah, [pci_bus]
mov bh, [pci_dev] mov bh, [pci_dev]
mov bl, PCI_REG_COMMAND mov bl, PCI_REG_COMMAND
call pci_read_reg call pci_read_reg
mov cx, ax mov cx, ax
or cl, (1 shl PCI_BIT_MASTER) or (1 shl PCI_BIT_PIO) or cl, (1 shl PCI_BIT_MASTER) or (1 shl PCI_BIT_PIO)
and cl, not (1 shl PCI_BIT_MMIO) and cl, not (1 shl PCI_BIT_MMIO)
mov al, 2 mov al, 2
mov ah, [pci_bus] mov ah, [pci_bus]
mov bh, [pci_dev] mov bh, [pci_dev]
mov bl, PCI_REG_COMMAND mov bl, PCI_REG_COMMAND
call pci_write_reg call pci_write_reg
; get chip version ; get chip version
mov edx, [io_addr] mov edx, [io_addr]
add edx, RTL8139_REG_TXCONFIG_2 add edx, RTL8139_REG_TXCONFIG_2
in ax, dx in ax, dx
shr ah, 2 shr ah, 2
shr ax, 6 shr ax, 6
and al, 01111111b and al, 01111111b
mov ecx, HW_VER_ARRAY_SIZE-1 mov ecx, HW_VER_ARRAY_SIZE-1
.chip_ver_loop: .chip_ver_loop:
cmp al, [hw_ver_array+ecx] cmp al, [hw_ver_array+ecx]
je .chip_ver_found je .chip_ver_found
dec ecx dec ecx
jns .chip_ver_loop jns .chip_ver_loop
xor cl, cl ; default RTL8139 xor cl, cl ; default RTL8139
.chip_ver_found: .chip_ver_found:
mov [hw_ver_id], cl mov [hw_ver_id], cl
; wake up the chip ; wake up the chip
mov edx, [io_addr] mov edx, [io_addr]
add edx, RTL8139_REG_HLTCLK add edx, RTL8139_REG_HLTCLK
mov al, 'R' ; run the clock mov al, 'R' ; run the clock
out dx, al out dx, al
; unlock config and BMCR registers ; unlock config and BMCR registers
add edx, RTL8139_REG_9346CR - RTL8139_REG_HLTCLK add edx, RTL8139_REG_9346CR - RTL8139_REG_HLTCLK
mov al, (1 shl RTL8139_BIT_93C46_EEM1) or (1 shl RTL8139_BIT_93C46_EEM0) mov al, (1 shl RTL8139_BIT_93C46_EEM1) or (1 shl RTL8139_BIT_93C46_EEM0)
out dx, al out dx, al
; enable power management ; enable power management
add edx, RTL8139_REG_CONFIG1 - RTL8139_REG_9346CR add edx, RTL8139_REG_CONFIG1 - RTL8139_REG_9346CR
in al, dx in al, dx
cmp byte [hw_ver_id], IDX_RTL8139B cmp byte [hw_ver_id], IDX_RTL8139B
jl .old_chip jl .old_chip
; set LWAKE pin to active high (default value). ; set LWAKE pin to active high (default value).
; it is for Wake-On-LAN functionality of some motherboards. ; it is for Wake-On-LAN functionality of some motherboards.
; this signal is used to inform the motherboard to execute a wake-up process. ; this signal is used to inform the motherboard to execute a wake-up process.
; only at newer chips. ; only at newer chips.
or al, (1 shl RTL8139_BIT_PMEn) or al, (1 shl RTL8139_BIT_PMEn)
and al, not (1 shl RTL8139_BIT_LWACT) and al, not (1 shl RTL8139_BIT_LWACT)
out dx, al out dx, al
add edx, RTL8139_REG_CONFIG4 - RTL8139_REG_CONFIG1 add edx, RTL8139_REG_CONFIG4 - RTL8139_REG_CONFIG1
in al, dx in al, dx
and al, not (1 shl RTL8139_BIT_LWPTN) and al, not (1 shl RTL8139_BIT_LWPTN)
out dx, al out dx, al
jmp .finish_wake_up jmp .finish_wake_up
.old_chip: .old_chip:
; wake up older chips ; wake up older chips
and al, not ((1 shl RTL8139_BIT_SLEEP) or (1 shl RTL8139_BIT_PWRDWN)) and al, not ((1 shl RTL8139_BIT_SLEEP) or (1 shl RTL8139_BIT_PWRDWN))
out dx, al out dx, al
.finish_wake_up: .finish_wake_up:
; lock config and BMCR registers ; lock config and BMCR registers
xor al, al xor al, al
mov edx, [io_addr] mov edx, [io_addr]
add edx, RTL8139_REG_9346CR add edx, RTL8139_REG_9346CR
out dx, al out dx, al
;*************************************************************************** ;***************************************************************************
; Function ; Function
; rt8139_reset ; rt8139_reset
@ -276,86 +276,86 @@ rtl8139_probe:
; ;
;*************************************************************************** ;***************************************************************************
rtl8139_reset: rtl8139_reset:
mov edx, [io_addr] mov edx, [io_addr]
add edx, RTL8139_REG_COMMAND add edx, RTL8139_REG_COMMAND
mov al, 1 shl RTL8139_BIT_RST mov al, 1 shl RTL8139_BIT_RST
out dx, al out dx, al
mov cx, 1000 ; wait no longer for the reset mov cx, 1000 ; wait no longer for the reset
.wait_for_reset: .wait_for_reset:
in al, dx in al, dx
test al, 1 shl RTL8139_BIT_RST test al, 1 shl RTL8139_BIT_RST
jz .reset_completed ; RST remains 1 during reset jz .reset_completed ; RST remains 1 during reset
dec cx dec cx
jns .wait_for_reset jns .wait_for_reset
.reset_completed: .reset_completed:
; get MAC (hardware address) ; get MAC (hardware address)
mov ecx, 2 mov ecx, 2
.mac_read_loop: .mac_read_loop:
lea eax, [EE_93C46_REG_ETH_ID+ecx] lea eax, [EE_93C46_REG_ETH_ID+ecx]
push ecx push ecx
call rtl8139_read_eeprom call rtl8139_read_eeprom
pop ecx pop ecx
mov [node_addr+ecx*2], ax mov [node_addr+ecx*2], ax
dec ecx dec ecx
jns .mac_read_loop jns .mac_read_loop
; unlock config and BMCR registers ; unlock config and BMCR registers
mov edx, [io_addr] mov edx, [io_addr]
add edx, RTL8139_REG_9346CR add edx, RTL8139_REG_9346CR
mov al, (1 shl RTL8139_BIT_93C46_EEM1) or (1 shl RTL8139_BIT_93C46_EEM0) mov al, (1 shl RTL8139_BIT_93C46_EEM1) or (1 shl RTL8139_BIT_93C46_EEM0)
out dx, al out dx, al
; initialize multicast registers (no filtering) ; initialize multicast registers (no filtering)
mov eax, 0xffffffff mov eax, 0xffffffff
add edx, RTL8139_REG_MAR0 - RTL8139_REG_9346CR add edx, RTL8139_REG_MAR0 - RTL8139_REG_9346CR
out dx, eax out dx, eax
add edx, RTL8139_REG_MAR4 - RTL8139_REG_MAR0 add edx, RTL8139_REG_MAR4 - RTL8139_REG_MAR0
out dx, eax out dx, eax
; enable Rx/Tx ; enable Rx/Tx
mov al, (1 shl RTL8139_BIT_RE) or (1 shl RTL8139_BIT_TE) mov al, (1 shl RTL8139_BIT_RE) or (1 shl RTL8139_BIT_TE)
add edx, RTL8139_REG_COMMAND - RTL8139_REG_MAR4 add edx, RTL8139_REG_COMMAND - RTL8139_REG_MAR4
out dx, al out dx, al
; 32k Rxbuffer, unlimited dma burst, no wrapping, no rx threshold ; 32k Rxbuffer, unlimited dma burst, no wrapping, no rx threshold
; accept broadcast packets, accept physical match packets ; accept broadcast packets, accept physical match packets
mov ax, RTL8139_RX_CONFIG mov ax, RTL8139_RX_CONFIG
add edx, RTL8139_REG_RXCONFIG - RTL8139_REG_COMMAND add edx, RTL8139_REG_RXCONFIG - RTL8139_REG_COMMAND
out dx, ax out dx, ax
; 1024 bytes DMA burst, total retries = 16 + 8 * 16 = 144 ; 1024 bytes DMA burst, total retries = 16 + 8 * 16 = 144
mov ax, (RTL8139_TX_MXDMA shl RTL8139_BIT_TX_MXDMA) \ mov ax, (RTL8139_TX_MXDMA shl RTL8139_BIT_TX_MXDMA) \
or (RTL8139_TXRR shl RTL8139_BIT_TXRR) or (RTL8139_TXRR shl RTL8139_BIT_TXRR)
add edx, RTL8139_REG_TXCONFIG - RTL8139_REG_RXCONFIG add edx, RTL8139_REG_TXCONFIG - RTL8139_REG_RXCONFIG
out dx, ax out dx, ax
; enable auto negotiation ; enable auto negotiation
add edx, RTL8139_REG_BMCR - RTL8139_REG_TXCONFIG add edx, RTL8139_REG_BMCR - RTL8139_REG_TXCONFIG
in ax, dx in ax, dx
or ax, (1 shl RTL8139_BIT_ANE) or ax, (1 shl RTL8139_BIT_ANE)
out dx, ax out dx, ax
; set auto negotiation advertisement ; set auto negotiation advertisement
add edx, RTL8139_REG_ANAR - RTL8139_REG_BMCR add edx, RTL8139_REG_ANAR - RTL8139_REG_BMCR
in ax, dx in ax, dx
or ax, (1 shl RTL8139_BIT_SELECTOR) or (1 shl RTL8139_BIT_10) \ or ax, (1 shl RTL8139_BIT_SELECTOR) or (1 shl RTL8139_BIT_10) \
or (1 shl RTL8139_BIT_10FD) or (1 shl RTL8139_BIT_TX) \ or (1 shl RTL8139_BIT_10FD) or (1 shl RTL8139_BIT_TX) \
or (1 shl RTL8139_BIT_TXFD) or (1 shl RTL8139_BIT_TXFD)
out dx, ax out dx, ax
; lock config and BMCR registers ; lock config and BMCR registers
xor eax, eax xor eax, eax
add edx, RTL8139_REG_9346CR - RTL8139_REG_ANAR add edx, RTL8139_REG_9346CR - RTL8139_REG_ANAR
out dx, al out dx, al
; init RX/TX pointers ; init RX/TX pointers
mov [rtl8139_rx_buff_offset], eax mov [rtl8139_rx_buff_offset], eax
mov [curr_tx_desc], eax mov [curr_tx_desc], eax
; clear missing packet counter ; clear missing packet counter
add edx, RTL8139_REG_MPC - RTL8139_REG_9346CR add edx, RTL8139_REG_MPC - RTL8139_REG_9346CR
out dx, eax out dx, eax
; disable all interrupts ; disable all interrupts
add edx, RTL8139_REG_IMR - RTL8139_REG_MPC add edx, RTL8139_REG_IMR - RTL8139_REG_MPC
out dx, ax out dx, ax
; set RxBuffer address, init RX buffer offset, init TX ring ; set RxBuffer address, init RX buffer offset, init TX ring
mov eax, rtl8139_rx_buff mov eax, rtl8139_rx_buff
add edx, RTL8139_REG_RBSTART - RTL8139_REG_IMR add edx, RTL8139_REG_RBSTART - RTL8139_REG_IMR
out dx, eax out dx, eax
; Indicate that we have successfully reset the card ; Indicate that we have successfully reset the card
mov eax, [pci_data] mov eax, [pci_data]
mov [eth_status], eax mov [eth_status], eax
ret ret
;*************************************************************************** ;***************************************************************************
; Function ; Function
@ -371,68 +371,68 @@ rtl8139_reset:
; ;
;*************************************************************************** ;***************************************************************************
rtl8139_read_eeprom: rtl8139_read_eeprom:
movzx ebx, al movzx ebx, al
mov edx, [io_addr] mov edx, [io_addr]
add edx, RTL8139_REG_RXCONFIG add edx, RTL8139_REG_RXCONFIG
in al, dx in al, dx
test al, (1 shl RTL8139_BIT_9356SEL) test al, (1 shl RTL8139_BIT_9356SEL)
jz .type_93c46 jz .type_93c46
; and bl, 01111111b ; don't care first bit ; and bl, 01111111b ; don't care first bit
or bx, EE_93C56_READ_CMD ; it contains start bit or bx, EE_93C56_READ_CMD ; it contains start bit
mov cx, EE_93C56_CMD_LENGTH-1 ; cmd_loop counter mov cx, EE_93C56_CMD_LENGTH-1 ; cmd_loop counter
jmp .read_eeprom jmp .read_eeprom
.type_93c46: .type_93c46:
and bl, 00111111b and bl, 00111111b
or bx, EE_93C46_READ_CMD ; it contains start bit or bx, EE_93C46_READ_CMD ; it contains start bit
mov cx, EE_93C46_CMD_LENGTH-1 ; cmd_loop counter mov cx, EE_93C46_CMD_LENGTH-1 ; cmd_loop counter
.read_eeprom: .read_eeprom:
add edx, RTL8139_REG_9346CR - RTL8139_REG_RXCONFIG_0 add edx, RTL8139_REG_9346CR - RTL8139_REG_RXCONFIG_0
; mov al, (1 shl RTL8139_BIT_93C46_EEM1) ; mov al, (1 shl RTL8139_BIT_93C46_EEM1)
; out dx, al ; out dx, al
mov al, (1 shl RTL8139_BIT_93C46_EEM1) \ mov al, (1 shl RTL8139_BIT_93C46_EEM1) \
or (1 shl RTL8139_BIT_93C46_EECS) ; wake up the eeprom or (1 shl RTL8139_BIT_93C46_EECS) ; wake up the eeprom
out dx, al out dx, al
.cmd_loop: .cmd_loop:
mov al, (1 shl RTL8139_BIT_93C46_EEM1) or (1 shl RTL8139_BIT_93C46_EECS) mov al, (1 shl RTL8139_BIT_93C46_EEM1) or (1 shl RTL8139_BIT_93C46_EECS)
bt bx, cx bt bx, cx
jnc .zero_bit jnc .zero_bit
or al, (1 shl RTL8139_BIT_93C46_EEDI) or al, (1 shl RTL8139_BIT_93C46_EEDI)
.zero_bit: .zero_bit:
out dx, al out dx, al
; push eax ; push eax
; in eax, dx ; eeprom delay ; in eax, dx ; eeprom delay
; pop eax ; pop eax
or al, (1 shl RTL8139_BIT_93C46_EESK) or al, (1 shl RTL8139_BIT_93C46_EESK)
out dx, al out dx, al
; in eax, dx ; eeprom delay ; in eax, dx ; eeprom delay
dec cx dec cx
jns .cmd_loop jns .cmd_loop
; in eax, dx ; eeprom delay ; in eax, dx ; eeprom delay
mov al, (1 shl RTL8139_BIT_93C46_EEM1) or (1 shl RTL8139_BIT_93C46_EECS) mov al, (1 shl RTL8139_BIT_93C46_EEM1) or (1 shl RTL8139_BIT_93C46_EECS)
out dx, al out dx, al
mov cl, 0xf mov cl, 0xf
.read_loop: .read_loop:
shl ebx, 1 shl ebx, 1
mov al, (1 shl RTL8139_BIT_93C46_EEM1) \ mov al, (1 shl RTL8139_BIT_93C46_EEM1) \
or (1 shl RTL8139_BIT_93C46_EECS) \ or (1 shl RTL8139_BIT_93C46_EECS) \
or (1 shl RTL8139_BIT_93C46_EESK) or (1 shl RTL8139_BIT_93C46_EESK)
out dx, al out dx, al
; in eax, dx ; eeprom delay ; in eax, dx ; eeprom delay
in al, dx in al, dx
and al, (1 shl RTL8139_BIT_93C46_EEDO) and al, (1 shl RTL8139_BIT_93C46_EEDO)
jz .dont_set jz .dont_set
inc ebx inc ebx
.dont_set: .dont_set:
mov al, (1 shl RTL8139_BIT_93C46_EEM1) \ mov al, (1 shl RTL8139_BIT_93C46_EEM1) \
or (1 shl RTL8139_BIT_93C46_EECS) or (1 shl RTL8139_BIT_93C46_EECS)
out dx, al out dx, al
; in eax, dx ; eeprom delay ; in eax, dx ; eeprom delay
dec cl dec cl
jns .read_loop jns .read_loop
xor al, al xor al, al
out dx, al out dx, al
mov ax, bx mov ax, bx
ret ret
;*************************************************************************** ;***************************************************************************
; Function ; Function
@ -451,78 +451,78 @@ rtl8139_read_eeprom:
; ;
;*************************************************************************** ;***************************************************************************
rtl8139_transmit: rtl8139_transmit:
cmp ecx, MAX_ETH_FRAME_SIZE cmp ecx, MAX_ETH_FRAME_SIZE
jg .finish ; packet is too long jg .finish ; packet is too long
push ecx push ecx
; check descriptor ; check descriptor
mov ecx, [curr_tx_desc] mov ecx, [curr_tx_desc]
mov edx, [io_addr] mov edx, [io_addr]
lea edx, [edx+ecx*4+RTL8139_REG_TSD0] lea edx, [edx+ecx*4+RTL8139_REG_TSD0]
push edx ebx push edx ebx
in ax, dx in ax, dx
and ax, (1 shl RTL8139_BIT_TOK) or (1 shl RTL8139_BIT_OWN) and ax, (1 shl RTL8139_BIT_TOK) or (1 shl RTL8139_BIT_OWN)
cmp ax, (1 shl RTL8139_BIT_TOK) or (1 shl RTL8139_BIT_OWN) cmp ax, (1 shl RTL8139_BIT_TOK) or (1 shl RTL8139_BIT_OWN)
jz .send_packet jz .send_packet
test ax, 0x1fff ; or no size given test ax, 0x1fff ; or no size given
jz .send_packet jz .send_packet
; wait for timeout ; wait for timeout
mov ebx, RTL8139_TX_TIMEOUT mov ebx, RTL8139_TX_TIMEOUT
mov eax, 0x5 ; delay x/100 secs mov eax, 0x5 ; delay x/100 secs
int 0x40 int 0x40
in ax, dx in ax, dx
and ax, (1 shl RTL8139_BIT_TOK) or (1 shl RTL8139_BIT_OWN) and ax, (1 shl RTL8139_BIT_TOK) or (1 shl RTL8139_BIT_OWN)
cmp ax, (1 shl RTL8139_BIT_TOK) or (1 shl RTL8139_BIT_OWN) cmp ax, (1 shl RTL8139_BIT_TOK) or (1 shl RTL8139_BIT_OWN)
jz .send_packet jz .send_packet
; chip hung, reset it ; chip hung, reset it
call rtl8139_reset call rtl8139_reset
; reset the card ; reset the card
.send_packet: .send_packet:
; calculate tx_buffer address ; calculate tx_buffer address
pop ebx pop ebx
push esi push esi
mov eax, MAX_ETH_FRAME_SIZE mov eax, MAX_ETH_FRAME_SIZE
mul dword [curr_tx_desc] mul dword [curr_tx_desc]
mov esi, edi mov esi, edi
lea edi, [rtl8139_tx_buff+eax] lea edi, [rtl8139_tx_buff+eax]
mov eax, edi mov eax, edi
cld cld
; copy destination address ; copy destination address
movsd movsd
movsw movsw
; copy source address ; copy source address
mov esi, node_addr mov esi, node_addr
movsd movsd
movsw movsw
; copy packet type ; copy packet type
mov [edi], bx mov [edi], bx
add edi, 2 add edi, 2
; copy the packet data ; copy the packet data
pop esi edx ecx pop esi edx ecx
push ecx push ecx
shr ecx, 2 shr ecx, 2
rep movsd rep movsd
pop ecx pop ecx
push ecx push ecx
and ecx, 3 and ecx, 3
rep movsb rep movsb
; set address ; set address
add edx, RTL8139_REG_TSAD0 - RTL8139_REG_TSD0 add edx, RTL8139_REG_TSAD0 - RTL8139_REG_TSD0
out dx, eax out dx, eax
; set size and early threshold ; set size and early threshold
pop eax ; pick up the size pop eax ; pick up the size
add eax, ETH_HLEN add eax, ETH_HLEN
cmp eax, ETH_ZLEN cmp eax, ETH_ZLEN
jnc .no_pad jnc .no_pad
mov eax, ETH_ZLEN mov eax, ETH_ZLEN
.no_pad: .no_pad:
or eax, (RTL8139_ERTXTH shl RTL8139_BIT_ERTXTH) or eax, (RTL8139_ERTXTH shl RTL8139_BIT_ERTXTH)
add edx, RTL8139_REG_TSD0 - RTL8139_REG_TSAD0 add edx, RTL8139_REG_TSD0 - RTL8139_REG_TSAD0
out dx, eax out dx, eax
; get next descriptor 0, 1, 2, 3, 0, 1, 2, 3, 0, 1, ... ; get next descriptor 0, 1, 2, 3, 0, 1, 2, 3, 0, 1, ...
inc dword [curr_tx_desc] inc dword [curr_tx_desc]
and dword [curr_tx_desc], 3 and dword [curr_tx_desc], 3
.finish: .finish:
ret ret
;*************************************************************************** ;***************************************************************************
; Function ; Function
@ -536,60 +536,76 @@ rtl8139_transmit:
; ;
;*************************************************************************** ;***************************************************************************
rtl8139_poll: rtl8139_poll:
mov word [eth_rx_data_len], 0 mov word [eth_rx_data_len], 0
mov edx, [io_addr] mov edx, [io_addr]
add edx, RTL8139_REG_COMMAND add edx, RTL8139_REG_COMMAND
in al, dx in al, dx
test al, (1 shl RTL8139_BIT_BUFE) test al, (1 shl RTL8139_BIT_BUFE)
jnz .finish jnz .finish
; new packet received copy it from rx_buffer into Ether_buffer ; new packet received copy it from rx_buffer into Ether_buffer
mov eax, rtl8139_rx_buff mov eax, rtl8139_rx_buff
add eax, [rtl8139_rx_buff_offset] add eax, [rtl8139_rx_buff_offset]
; check if packet is ok ; check if packet is ok
test byte [eax], (1 shl RTL8139_BIT_ROK) test byte [eax], (1 shl RTL8139_BIT_ROK)
jz .reset_rx jz .reset_rx
; packet is ok copy it into the Ether_buffer ; packet is ok copy it into the Ether_buffer
movzx ecx, word [eax+2] ; packet length movzx ecx, word [eax+2] ; packet length
sub ecx, 4 ; don't copy CRC sub ecx, 4 ; don't copy CRC
mov word [eth_rx_data_len], cx mov word [eth_rx_data_len], cx
push ecx push ecx
shr ecx, 2 ; first copy dword-wise shr ecx, 2 ; first copy dword-wise
lea esi, [eax+4] ; don't copy the packet header lea esi, [eax+4] ; don't copy the packet header
mov edi, Ether_buffer mov edi, Ether_buffer
cld cld
rep movsd ; copy the dwords rep movsd ; copy the dwords
pop ecx pop ecx
and ecx, 3 and ecx, 3
rep movsb ; copy the rest bytes rep movsb ; copy the rest bytes
; update rtl8139_rx_buff_offset ; update rtl8139_rx_buff_offset
movzx eax, word [eax+2] ; packet length movzx eax, word [eax+2] ; packet length
add eax, [rtl8139_rx_buff_offset] add eax, [rtl8139_rx_buff_offset]
add eax, 4+3 ; packet header is 4 bytes long + dword alignment add eax, 4+3 ; packet header is 4 bytes long + dword alignment
and eax, not 3 ; dword alignment and eax, not 3 ; dword alignment
cmp eax, RTL8139_RX_BUFFER_SIZE cmp eax, RTL8139_RX_BUFFER_SIZE
jl .no_wrap jl .no_wrap
sub eax, RTL8139_RX_BUFFER_SIZE sub eax, RTL8139_RX_BUFFER_SIZE
.no_wrap: .no_wrap:
mov [rtl8139_rx_buff_offset], eax mov [rtl8139_rx_buff_offset], eax
; update CAPR register ; update CAPR register
sub eax, 0x10 ; value 0x10 is a constant for CAPR sub eax, 0x10 ; value 0x10 is a constant for CAPR
add edx, RTL8139_REG_CAPR - RTL8139_REG_COMMAND add edx, RTL8139_REG_CAPR - RTL8139_REG_COMMAND
out dx, ax out dx, ax
.finish: .finish:
; clear active interrupt sources ; clear active interrupt sources
mov edx, [io_addr] mov edx, [io_addr]
add edx, RTL8139_REG_ISR add edx, RTL8139_REG_ISR
in ax, dx in ax, dx
out dx, ax out dx, ax
ret ret
.reset_rx: .reset_rx:
in al, dx ; read command register in al, dx ; read command register
push eax push eax
and al, not (1 shl RTL8139_BIT_RE) and al, not (1 shl RTL8139_BIT_RE)
out dx, al out dx, al
pop eax pop eax
out dx, al out dx, al
add edx, RTL8139_REG_RXCONFIG - RTL8139_REG_COMMAND add edx, RTL8139_REG_RXCONFIG - RTL8139_REG_COMMAND
mov ax, RTL8139_RX_CONFIG mov ax, RTL8139_RX_CONFIG
out dx, ax out dx, ax
ret ret
rtl8139_cable:
pusha
mov edx, [io_addr]
add edx, 0x58
in al,dx
test al,1 SHL 2
jnz .notconnected
popa
xor al,al
inc al
ret
.notconnected:
popa
xor al,al
ret

231
kernel/trunk/network/eth_drv/ethernet.inc
View File

@ -36,15 +36,15 @@
; ;
;******************************************************************** ;********************************************************************
ETHER_IP equ 0x0008 ; Reversed from 0800 for intel ETHER_IP equ 0x0008 ; Reversed from 0800 for intel
ETHER_ARP equ 0x0608 ; Reversed from 0806 for intel ETHER_ARP equ 0x0608 ; Reversed from 0806 for intel
ETHER_RARP equ 0x3580 ETHER_RARP equ 0x3580
struc ETH_FRAME struc ETH_FRAME
{ .DstMAC dp ? ;destination MAC-address [6 bytes] { .DstMAC dp ? ;destination MAC-address [6 bytes]
.SrcMAC dp ? ;source MAC-address [6 bytes] .SrcMAC dp ? ;source MAC-address [6 bytes]
.Type dw ? ;type of the upper-layer protocol [2 bytes] .Type dw ? ;type of the upper-layer protocol [2 bytes]
.Data db ? ;data [46-1500 bytes] .Data db ? ;data [46-1500 bytes]
} }
virtual at Ether_buffer virtual at Ether_buffer
@ -110,105 +110,108 @@ include "drivers/pcnet32.inc"
; be several lines which refer to the same functions. ; be several lines which refer to the same functions.
; The first driver found on the PCI bus will be the one used. ; The first driver found on the PCI bus will be the one used.
PCICARDS_ENTRY_SIZE equ 20 ; Size of each PCICARDS entry PCICARDS_ENTRY_SIZE equ 24 ; Size of each PCICARDS entry
iglobal iglobal
PCICards: PCICards:
dd 0x12098086, I8255x_probe, I8255x_reset, I8255x_poll, I8255x_transmit dd 0x12098086, I8255x_probe, I8255x_reset, I8255x_poll, I8255x_transmit, 0
dd 0x10298086, I8255x_probe, I8255x_reset, I8255x_poll, I8255x_transmit dd 0x10298086, I8255x_probe, I8255x_reset, I8255x_poll, I8255x_transmit, 0
dd 0x12298086, I8255x_probe, I8255x_reset, I8255x_poll, I8255x_transmit dd 0x12298086, I8255x_probe, I8255x_reset, I8255x_poll, I8255x_transmit, 0
dd 0x10308086, I8255x_probe, I8255x_reset, I8255x_poll, I8255x_transmit dd 0x10308086, I8255x_probe, I8255x_reset, I8255x_poll, I8255x_transmit, 0
dd 0x24498086, I8255x_probe, I8255x_reset, I8255x_poll, I8255x_transmit dd 0x24498086, I8255x_probe, I8255x_reset, I8255x_poll, I8255x_transmit, 0
dd 0x802910ec, rtl8029_probe, rtl8029_reset, rtl8029_poll, rtl8029_transmit dd 0x802910ec, rtl8029_probe, rtl8029_reset, rtl8029_poll, rtl8029_transmit, 0
dd 0x12111113, rtl8029_probe, rtl8029_reset, rtl8029_poll, rtl8029_transmit dd 0x12111113, rtl8029_probe, rtl8029_reset, rtl8029_poll, rtl8029_transmit, 0
dd 0x813910ec, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit
; /+/ Íîâûå âåíäîðû ñåòåâûõ êàðò íà áàçå rtl8139 dd 0x813910ec, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
dd 0x813810ec, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit dd 0x813810ec, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
dd 0x12111113, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit dd 0x12111113, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
dd 0x13601500, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit dd 0x13601500, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
dd 0x13604033, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit dd 0x13604033, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
dd 0x13001186, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit dd 0x13001186, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
dd 0x13401186, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit dd 0x13401186, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
dd 0xab0613d1, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit dd 0xab0613d1, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
dd 0xa1171259, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit dd 0xa1171259, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
dd 0xa11e1259, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit dd 0xa11e1259, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
dd 0xab0614ea, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit dd 0xab0614ea, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
dd 0xab0714ea, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit dd 0xab0714ea, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
dd 0x123411db, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit dd 0x123411db, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
dd 0x91301432, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit dd 0x91301432, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
dd 0x101202ac, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit dd 0x101202ac, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
dd 0x0106018a, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit dd 0x0106018a, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
dd 0x1211126c, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit dd 0x1211126c, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
dd 0x81391743, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit dd 0x81391743, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
dd 0x8139021b, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit dd 0x8139021b, rtl8139_probe, rtl8139_reset, rtl8139_poll, rtl8139_transmit, rtl8139_cable
; /-/
dd 0x590010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit dd 0x590010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
dd 0x592010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit dd 0x592010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
dd 0x597010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit dd 0x597010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
dd 0x595010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit dd 0x595010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
dd 0x595110b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit dd 0x595110b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
dd 0x595210b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit dd 0x595210b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
dd 0x900010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit dd 0x900010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
dd 0x900110b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit dd 0x900110b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
dd 0x900410b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit dd 0x900410b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
dd 0x900510b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit dd 0x900510b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
dd 0x900610b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit dd 0x900610b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
dd 0x900A10b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit dd 0x900A10b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
dd 0x905010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit dd 0x905010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
dd 0x905110b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit dd 0x905110b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
dd 0x905510b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit dd 0x905510b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
dd 0x905810b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit dd 0x905810b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
dd 0x905A10b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit dd 0x905A10b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
dd 0x920010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit dd 0x920010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
dd 0x980010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit dd 0x980010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
dd 0x980510b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit dd 0x980510b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
dd 0x764610b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit dd 0x764610b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
dd 0x505510b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit dd 0x505510b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
dd 0x605510b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit dd 0x605510b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
dd 0x605610b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit dd 0x605610b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
dd 0x5b5710b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit dd 0x5b5710b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
dd 0x505710b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit dd 0x505710b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
dd 0x515710b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit dd 0x515710b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
dd 0x525710b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit dd 0x525710b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
dd 0x656010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit dd 0x656010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
dd 0x656210b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit dd 0x656210b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
dd 0x656410b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit dd 0x656410b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
dd 0x450010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit dd 0x450010b7, e3c59x_probe, e3c59x_reset, e3c59x_poll, e3c59x_transmit, 0
dd 0x09001039, SIS900_probe, SIS900_reset, SIS900_poll, SIS900_transmit
dd 0x20001022, pcnet32_probe, pcnet32_reset, pcnet32_poll, pcnet32_xmit dd 0x09001039, SIS900_probe, SIS900_reset, SIS900_poll, SIS900_transmit, 0
dd 0x26251022, pcnet32_probe, pcnet32_reset, pcnet32_poll, pcnet32_xmit
dd 0x20011022, pcnet32_probe, pcnet32_reset, pcnet32_poll, pcnet32_xmit dd 0x20001022, pcnet32_probe, pcnet32_reset, pcnet32_poll, pcnet32_xmit, 0
dd 0x26251022, pcnet32_probe, pcnet32_reset, pcnet32_poll, pcnet32_xmit, 0
dd 0x20011022, pcnet32_probe, pcnet32_reset, pcnet32_poll, pcnet32_xmit, 0
; following card is untested ; following card is untested
dd 0x70161039, SIS900_probe, SIS900_reset, SIS900_poll, SIS900_transmit dd 0x70161039, SIS900_probe, SIS900_reset, SIS900_poll, SIS900_transmit, 0
dd 0,0,0,0,0 ; end of list marker, do not remove rb PCICARDS_ENTRY_SIZE ; end of list marker, do not remove
endg endg
uglobal uglobal
;Net-stack's interface's settings ;Net-stack's interface's settings
node_addr: db 0,0,0,0,0,0 node_addr: db 0,0,0,0,0,0
gateway_ip: db 0, 0, 0, 0 gateway_ip: dd 0
dns_ip: dd 0 dns_ip: dd 0
eth_rx_data_len: dw 0 eth_rx_data_len: dw 0
eth_status: dd 0 eth_status: dd 0
io_addr: dd 0 io_addr: dd 0
hdrtype: db 0 hdrtype: db 0
vendor_device: dd 0 vendor_device: dd 0
pci_data: dd 0 pci_data: dd 0
pci_dev: dd 0 pci_dev: dd 0
pci_bus: dd 0 pci_bus: dd 0
; These will hold pointers to the selected driver functions ; These will hold pointers to the selected driver functions
drvr_probe: dd 0 drvr_probe: dd 0
drvr_reset: dd 0 drvr_reset: dd 0
drvr_poll: dd 0 drvr_poll: dd 0
drvr_transmit: dd 0 drvr_transmit: dd 0
drvr_cable: dd 0
endg endg
iglobal iglobal
broadcast_add: db 0xff,0xff,0xff,0xff,0xff,0xff broadcast_add: db 0xff,0xff,0xff,0xff,0xff,0xff
subnet_mask: dd 0x00ffffff ; 255.255.255.0 subnet_mask: dd 0x00ffffff ; 255.255.255.0
endg endg
include "arp.inc" ;arp-protocol functions include "arp.inc" ;arp-protocol functions
@ -236,7 +239,7 @@ local MACAddress dp ? ;allocate 6 bytes in the stack
mov eax, NET1OUT_QUEUE mov eax, NET1OUT_QUEUE
call dequeue call dequeue
cmp ax, NO_BUFFER cmp ax, NO_BUFFER
je .exit ; Exit if no buffer available je .exit ; Exit if no buffer available
push eax ;save buffer number push eax ;save buffer number
@ -247,8 +250,8 @@ local MACAddress dp ? ;allocate 6 bytes in the stack
; Extract the destination IP ; Extract the destination IP
; find the destination IP in the ARP table, get MAC ; find the destination IP in the ARP table, get MAC
; store this MAC in 'MACAddress' ; store this MAC in 'MACAddress'
mov ebx, eax ; Save buffer address mov ebx, eax ; Save buffer address
mov edx, [ebx + 16] ; get destination address mov edx, [ebx + 16] ; get destination address
; If the destination address is 255.255.255.255, ; If the destination address is 255.255.255.255,
; set the MACAddress to all ones ( broadcast ) ; set the MACAddress to all ones ( broadcast )
@ -258,31 +261,31 @@ local MACAddress dp ? ;allocate 6 bytes in the stack
movsd movsd
movsw movsw
cmp edx, 0xffffffff cmp edx, 0xffffffff
je .send ; If it is broadcast, just send je .send ; If it is broadcast, just send
lea eax, [MACAddress] ;cause this is local variable lea eax, [MACAddress] ;cause this is local variable
stdcall arp_table_manager, ARP_TABLE_IP_TO_MAC, edx, eax ;opcode,IP,MAC_ptr - Get the MAC address. stdcall arp_table_manager, ARP_TABLE_IP_TO_MAC, edx, eax ;opcode,IP,MAC_ptr - Get the MAC address.
cmp eax, ARP_VALID_MAPPING cmp eax, ARP_VALID_MAPPING
je .send je .send
; No valid entry. Has the request been sent, but timed out? ; No valid entry. Has the request been sent, but timed out?
cmp eax, ARP_RESPONSE_TIMEOUT cmp eax, ARP_RESPONSE_TIMEOUT
je .freebuf je .freebuf
.wait_response: ;we wait arp-response .wait_response: ;we wait arp-response
; Re-queue the packet, and exit ; Re-queue the packet, and exit
pop ebx pop ebx
mov eax, NET1OUT_QUEUE mov eax, NET1OUT_QUEUE
call queue ; Get the buffer back call queue ; Get the buffer back
jmp .exit jmp .exit
.send: ;if ARP_VALID_MAPPING then send the packet .send: ;if ARP_VALID_MAPPING then send the packet
lea edi, [MACAddress] ; Pointer to 48 bit destination address lea edi, [MACAddress] ; Pointer to 48 bit destination address
movzx ecx, word[ebx+2] ; Size of IP packet to send movzx ecx, word[ebx+2] ; Size of IP packet to send
xchg ch, cl ; because mirror byte-order xchg ch, cl ; because mirror byte-order
mov esi, ebx ; Pointer to packet data mov esi, ebx ; Pointer to packet data
mov bx, ETHER_IP ; Type of packet mov bx, ETHER_IP ; Type of packet
call dword [drvr_transmit] ; Call the drivers transmit function call dword [drvr_transmit] ; Call the drivers transmit function
; OK, we have sent a packet, so increment the count ; OK, we have sent a packet, so increment the count
@ -315,7 +318,7 @@ ether_IP_handler:
mov eax, EMPTY_QUEUE mov eax, EMPTY_QUEUE
call dequeue call dequeue
cmp ax, NO_BUFFER cmp ax, NO_BUFFER
je eiph00x je eiph00x
; convert buffer pointer eax to the absolute address ; convert buffer pointer eax to the absolute address
push eax push eax
@ -330,7 +333,7 @@ ether_IP_handler:
; Now store it all away ; Now store it all away
mov ecx, IPBUFFSIZE / 4 ; Copy all of the available mov ecx, IPBUFFSIZE / 4 ; Copy all of the available
; data across - worse case ; data across - worse case
cld cld
rep movsd rep movsd
@ -356,14 +359,14 @@ eiph00x:
;*************************************************************************** ;***************************************************************************
eth_probe: eth_probe:
; Find a card on the PCI bus, and get it's address ; Find a card on the PCI bus, and get it's address
call scan_bus ; Find the ethernet cards PIC address call scan_bus ; Find the ethernet cards PIC address
xor eax, eax xor eax, eax
cmp [io_addr], eax cmp [io_addr], eax
je ep_00x ; Return 0 in eax if no cards found je ep_00x ; Return 0 in eax if no cards found
call dword [drvr_probe] ; Call the drivers probe function call dword [drvr_probe] ; Call the drivers probe function
mov eax, [io_addr] ; return a non zero value mov eax, [io_addr] ; return a non zero value
ep_00x: ep_00x:
ret ret
@ -380,7 +383,7 @@ ep_00x:
ethernet_driver: ethernet_driver:
; Do nothing if the driver is inactive ; Do nothing if the driver is inactive
cmp [ethernet_active], byte 0 cmp [ethernet_active], byte 0
je eth_exit je eth_exit
call eth_rx call eth_rx
call eth_tx call eth_tx
@ -403,11 +406,11 @@ eth_exit:
eth_rx: eth_rx:
xor ax, ax xor ax, ax
mov [eth_rx_data_len], ax mov [eth_rx_data_len], ax
call dword [drvr_poll] ; Call the drivers poll function call dword [drvr_poll] ; Call the drivers poll function
mov ax, [eth_rx_data_len] mov ax, [eth_rx_data_len]
cmp ax, 0 cmp ax, 0
je .exit je .exit
; Check the protocol. Call appropriate handler ; Check the protocol. Call appropriate handler
@ -415,12 +418,12 @@ eth_rx:
mov ax, [ETH_FRAME.Type] ; The address of the protocol word mov ax, [ETH_FRAME.Type] ; The address of the protocol word
cmp ax, ETHER_IP cmp ax, ETHER_IP
je .is_ip ; It's IP je .is_ip ; It's IP
cmp ax, ETHER_ARP cmp ax, ETHER_ARP
je .is_arp ; It is ARP je .is_arp ; It is ARP
jmp .exit ; If not IP or ARP, ignore jmp .exit ; If not IP or ARP, ignore
.is_ip: .is_ip:
inc dword [ip_rx_count] inc dword [ip_rx_count]

46
kernel/trunk/network/eth_drv/pci.inc
View File

@ -8,11 +8,11 @@
;*************************************************************************** ;***************************************************************************
; PCI Bus defines ; PCI Bus defines
PCI_HEADER_TYPE equ 0x0e ;8 bit PCI_HEADER_TYPE equ 0x0e ;8 bit
PCI_BASE_ADDRESS_0 equ 0x10 ;32 bit PCI_BASE_ADDRESS_0 equ 0x10 ;32 bit
PCI_BASE_ADDRESS_5 equ 0x24 ;32 bits PCI_BASE_ADDRESS_5 equ 0x24 ;32 bits
PCI_BASE_ADDRESS_SPACE_IO equ 0x01 PCI_BASE_ADDRESS_SPACE_IO equ 0x01
PCI_VENDOR_ID equ 0x00 ;16 bit PCI_VENDOR_ID equ 0x00 ;16 bit
PCI_BASE_ADDRESS_IO_MASK equ 0xFFFFFFFC PCI_BASE_ADDRESS_IO_MASK equ 0xFFFFFFFC
;*************************************************************************** ;***************************************************************************
@ -32,11 +32,11 @@ config_cmd:
push ecx push ecx
mov eax, ebx mov eax, ebx
shl eax, 16 shl eax, 16
or eax, 0x80000000 or eax, 0x80000000
shl ecx, 8 shl ecx, 8
or eax, ecx or eax, ecx
pop ecx pop ecx
or eax, edx or eax, edx
and eax, 0xFFFFFFFC and eax, 0xFFFFFFFC
ret ret
@ -64,7 +64,7 @@ pcibios_read_config_byte:
and dx, 0x03 and dx, 0x03
add dx, 0xCFC add dx, 0xCFC
; and dx, 0xFFC ; and dx, 0xFFC
in al, dx in al, dx
ret ret
;*************************************************************************** ;***************************************************************************
@ -91,7 +91,7 @@ pcibios_read_config_word:
and dx, 0x02 and dx, 0x02
add dx, 0xCFC add dx, 0xCFC
; and dx, 0xFFC ; and dx, 0xFFC
in ax, dx in ax, dx
ret ret
;*************************************************************************** ;***************************************************************************
@ -116,7 +116,7 @@ pcibios_read_config_dword:
pop dx pop dx
xor eax, eax xor eax, eax
mov dx, 0xCFC mov dx, 0xCFC
in eax, dx in eax, dx
pop edx pop edx
ret ret
@ -190,16 +190,16 @@ delay_us:
mov ecx,2 mov ecx,2
in al,0x61 in al,0x61
and al,0x10 and al,0x10
mov ah,al mov ah,al
cld cld
dcnt1: dcnt1:
in al,0x61 in al,0x61
and al,0x10 and al,0x10
cmp al,ah cmp al,ah
jz dcnt1 jz dcnt1
mov ah,al mov ah,al
loop dcnt1 loop dcnt1
@ -231,10 +231,10 @@ scan_bus:
mov [hdrtype], al mov [hdrtype], al
mov [pci_data], eax mov [pci_data], eax
xor ebx, ebx ; ebx = bus# 0 .. 255 xor ebx, ebx ; ebx = bus# 0 .. 255
sb_bus_loop: sb_bus_loop:
xor ecx, ecx ; ecx = devfn# 0 .. 254 ( not 255? ) xor ecx, ecx ; ecx = devfn# 0 .. 254 ( not 255? )
sb_devf_loop: sb_devf_loop:
mov eax, ecx mov eax, ecx
@ -259,7 +259,7 @@ sb_002:
call pcibios_read_config_dword call pcibios_read_config_dword
mov [vendor_device], eax mov [vendor_device], eax
cmp eax, 0xffffffff cmp eax, 0xffffffff
je sb_empty je sb_empty
cmp eax, 0 cmp eax, 0
jne sb_check_vendor jne sb_check_vendor
@ -273,9 +273,9 @@ sb_check_vendor:
sb_check: sb_check:
cmp [esi], dword 0 cmp [esi], dword 0
je sb_inc_devf ; Quit if at last entry je sb_inc_devf ; Quit if at last entry
cmp eax, [esi] cmp eax, [esi]
je sb_got_card je sb_got_card
add esi, PCICARDS_ENTRY_SIZE add esi, PCICARDS_ENTRY_SIZE
jmp sb_check jmp sb_check
@ -295,6 +295,8 @@ sb_got_card:
mov [drvr_poll], eax mov [drvr_poll], eax
mov eax, [esi+16] mov eax, [esi+16]
mov [drvr_transmit], eax mov [drvr_transmit], eax
mov eax, [esi+20]
mov [drvr_cable], eax
pop eax pop eax
mov edx, PCI_BASE_ADDRESS_0 mov edx, PCI_BASE_ADDRESS_0
@ -304,11 +306,11 @@ sb_reg_check:
mov [io_addr], eax mov [io_addr], eax
and eax, PCI_BASE_ADDRESS_IO_MASK and eax, PCI_BASE_ADDRESS_IO_MASK
cmp eax, 0 cmp eax, 0
je sb_inc_reg je sb_inc_reg
mov eax, [io_addr] mov eax, [io_addr]
and eax, PCI_BASE_ADDRESS_SPACE_IO and eax, PCI_BASE_ADDRESS_SPACE_IO
cmp eax, 0 cmp eax, 0
je sb_inc_reg je sb_inc_reg
mov eax, [io_addr] mov eax, [io_addr]
and eax, PCI_BASE_ADDRESS_IO_MASK and eax, PCI_BASE_ADDRESS_IO_MASK
@ -325,10 +327,10 @@ sb_inc_reg:
sb_inc_devf: sb_inc_devf:
inc ecx inc ecx
cmp ecx, 255 cmp ecx, 255
jb sb_devf_loop jb sb_devf_loop
inc ebx inc ebx
cmp ebx, 256 cmp ebx, 256
jb sb_bus_loop jb sb_bus_loop
; We get here if we didn't find our card ; We get here if we didn't find our card
; set io_addr to 0 as an indication ; set io_addr to 0 as an indication

153
kernel/trunk/network/stack.inc
View File

@ -33,34 +33,34 @@ StackCounters:
dumped_rx_count: dd 0 dumped_rx_count: dd 0
arp_tx_count: dd 0 arp_tx_count: dd 0
arp_rx_count: dd 0 arp_rx_count: dd 0
ip_rx_count: dd 0 ip_rx_count: dd 0
ip_tx_count: dd 0 ip_tx_count: dd 0
endg endg
; socket buffers ; socket buffers
SOCKETBUFFSIZE equ 4096 ; state + config + buffer. SOCKETBUFFSIZE equ 4096 ; state + config + buffer.
SOCKETHEADERSIZE equ 76 ; thus 4096 - SOCKETHEADERSIZE bytes data SOCKETHEADERSIZE equ 76 ; thus 4096 - SOCKETHEADERSIZE bytes data
NUM_SOCKETS equ 16 ; Number of open sockets supported. Was 20 NUM_SOCKETS equ 16 ; Number of open sockets supported. Was 20
; IPBUFF status values ; IPBUFF status values
BUFF_EMPTY equ 0 BUFF_EMPTY equ 0
BUFF_RX_FULL equ 1 BUFF_RX_FULL equ 1
BUFF_ALLOCATED equ 2 BUFF_ALLOCATED equ 2
BUFF_TX_FULL equ 3 BUFF_TX_FULL equ 3
NUM_IPBUFFERS equ 20 ; buffers allocated for TX/RX NUM_IPBUFFERS equ 20 ; buffers allocated for TX/RX
NUMQUEUES equ 4 NUMQUEUES equ 4
EMPTY_QUEUE equ 0 EMPTY_QUEUE equ 0
IPIN_QUEUE equ 1 IPIN_QUEUE equ 1
IPOUT_QUEUE equ 2 IPOUT_QUEUE equ 2
NET1OUT_QUEUE equ 3 NET1OUT_QUEUE equ 3
NO_BUFFER equ 0xFFFF NO_BUFFER equ 0xFFFF
IPBUFFSIZE equ 1500 ; MTU of an ethernet packet IPBUFFSIZE equ 1500 ; MTU of an ethernet packet
NUMQUEUEENTRIES equ NUM_IPBUFFERS NUMQUEUEENTRIES equ NUM_IPBUFFERS
NUMRESENDENTRIES equ 18 ; Buffers for TCP resend packets NUMRESENDENTRIES equ 18 ; Buffers for TCP resend packets
; These are the 0x40 function codes for application access to the stack ; These are the 0x40 function codes for application access to the stack
STACK_DRIVER_STATUS equ 52 STACK_DRIVER_STATUS equ 52
@ -70,15 +70,15 @@ SOCKET_INTERFACE equ 53
; 128KB allocated for the stack and network driver buffers and other ; 128KB allocated for the stack and network driver buffers and other
; data requirements ; data requirements
stack_data_start equ 0x700000 stack_data_start equ 0x700000
eth_data_start equ 0x700000 eth_data_start equ 0x700000
stack_data equ 0x704000 stack_data equ 0x704000
stack_data_end equ 0x71ffff stack_data_end equ 0x71ffff
; 32 bit word ; 32 bit word
stack_config equ stack_data stack_config equ stack_data
; 32 bit word - IP Address in network format ; 32 bit word - IP Address in network format
stack_ip equ stack_data + 4 stack_ip equ stack_data + 4
; 1 byte. 0 == inactive, 1 = active ; 1 byte. 0 == inactive, 1 = active
ethernet_active equ stack_data + 9 ethernet_active equ stack_data + 9
@ -87,32 +87,32 @@ ethernet_active equ stack_data + 9
; TODO :: empty memory area ; TODO :: empty memory area
; Address of selected socket ; Address of selected socket
sktAddr equ stack_data + 32 sktAddr equ stack_data + 32
; Parameter to checksum routine - data ptr ; Parameter to checksum routine - data ptr
checkAdd1 equ stack_data + 36 checkAdd1 equ stack_data + 36
; Parameter to checksum routine - 2nd data ptr ; Parameter to checksum routine - 2nd data ptr
checkAdd2 equ stack_data + 40 checkAdd2 equ stack_data + 40
; Parameter to checksum routine - data size ; Parameter to checksum routine - data size
checkSize1 equ stack_data + 44 checkSize1 equ stack_data + 44
; Parameter to checksum routine - 2nd data size ; Parameter to checksum routine - 2nd data size
checkSize2 equ stack_data + 46 checkSize2 equ stack_data + 46
; result of checksum routine ; result of checksum routine
checkResult equ stack_data + 48 checkResult equ stack_data + 48
; holds the TCP/UDP pseudo header. SA|DA|0|prot|UDP len| ; holds the TCP/UDP pseudo header. SA|DA|0|prot|UDP len|
pseudoHeader equ stack_data + 50 pseudoHeader equ stack_data + 50
; receive and transmit IP buffer allocation ; receive and transmit IP buffer allocation
sockets equ stack_data + 62 sockets equ stack_data + 62
Next_free2 equ sockets + (SOCKETBUFFSIZE * NUM_SOCKETS) Next_free2 equ sockets + (SOCKETBUFFSIZE * NUM_SOCKETS)
; 1560 byte buffer for rx / tx ethernet packets ; 1560 byte buffer for rx / tx ethernet packets
Ether_buffer equ Next_free2 Ether_buffer equ Next_free2
Next_free3 equ Ether_buffer + 1518 Next_free3 equ Ether_buffer + 1518
last_1sTick equ Next_free3 last_1sTick equ Next_free3
IPbuffs equ Next_free3 + 1 IPbuffs equ Next_free3 + 1
queues equ IPbuffs + ( NUM_IPBUFFERS * IPBUFFSIZE ) queues equ IPbuffs + ( NUM_IPBUFFERS * IPBUFFSIZE )
queueList equ queues + (2 * NUMQUEUES) queueList equ queues + (2 * NUMQUEUES)
last_1hsTick equ queueList + ( 2 * NUMQUEUEENTRIES ) last_1hsTick equ queueList + ( 2 * NUMQUEUEENTRIES )
;resendQ equ queueList + ( 2 * NUMQUEUEENTRIES ) ;resendQ equ queueList + ( 2 * NUMQUEUEENTRIES )
;resendBuffer equ resendQ + ( 4 * NUMRESENDENTRIES ) ; for TCP ;resendBuffer equ resendQ + ( 4 * NUMRESENDENTRIES ) ; for TCP
@ -120,22 +120,22 @@ last_1hsTick equ queueList + ( 2 * NUMQUEUEENTRIES )
resendQ equ 0x770000 resendQ equ 0x770000
resendBuffer equ resendQ + ( 4 * NUMRESENDENTRIES ) ; for TCP resendBuffer equ resendQ + ( 4 * NUMRESENDENTRIES ) ; for TCP
; simple macro for memory set operation ; simple macro for memory set operation
macro _memset_dw adr,value,amount macro _memset_dw adr,value,amount
{ {
mov edi, adr mov edi, adr
mov ecx, amount mov ecx, amount
if value = 0 if value = 0
xor eax, eax xor eax, eax
else else
mov eax, value mov eax, value
end if end if
cld cld
rep stosd rep stosd
} }
@ -196,7 +196,7 @@ stack_handler:
; Test for 10ms tick, call tcp timer ; Test for 10ms tick, call tcp timer
mov eax, [timer_ticks] ;[0xfdf0] mov eax, [timer_ticks] ;[0xfdf0]
cmp eax, [last_1hsTick] cmp eax, [last_1hsTick]
je sh_001 je sh_001
mov [last_1hsTick], eax mov [last_1hsTick], eax
call tcp_tx_handler call tcp_tx_handler
@ -206,9 +206,9 @@ sh_001:
; Test for 1 second event, call 1s timer functions ; Test for 1 second event, call 1s timer functions
mov al, 0x0 ;second mov al, 0x0 ;second
out 0x70, al out 0x70, al
in al, 0x71 in al, 0x71
cmp al, [last_1sTick] cmp al, [last_1sTick]
je sh_exit je sh_exit
mov [last_1sTick], al mov [last_1sTick], al
@ -235,7 +235,7 @@ proc checksum_jb stdcall uses ebx esi ecx,\
mov esi, dword[buf_ptr] mov esi, dword[buf_ptr]
mov ecx, dword[buf_size] mov ecx, dword[buf_size]
shr ecx, 1 ; ecx=ecx/2 shr ecx, 1 ; ecx=ecx/2
jnc @f ; if CF==0 then size is even number jnc @f ; if CF==0 then size is even number
mov bh, byte[esi + ecx*2] mov bh, byte[esi + ecx*2]
@@: @@:
cld cld
@ -270,11 +270,11 @@ endp
checksum: checksum:
pusha pusha
xor edx, edx ; edx is the accumulative checksum xor edx, edx ; edx is the accumulative checksum
xor ebx, ebx xor ebx, ebx
mov cx, [checkSize1] mov cx, [checkSize1]
shr cx, 1 shr cx, 1
jz cs1_1 jz cs1_1
mov eax, [checkAdd1] mov eax, [checkAdd1]
@ -289,7 +289,7 @@ cs1:
cs1_1: cs1_1:
and word [checkSize1], 0x01 and word [checkSize1], 0x01
jz cs_test2 jz cs_test2
mov bh, [eax] mov bh, [eax]
xor bl, bl xor bl, bl
@ -299,10 +299,10 @@ cs1_1:
cs_test2: cs_test2:
mov cx, [checkSize2] mov cx, [checkSize2]
cmp cx, 0 cmp cx, 0
jz cs_exit ; Finished if no 2nd buffer jz cs_exit ; Finished if no 2nd buffer
shr cx, 1 shr cx, 1
jz cs2_1 jz cs2_1
mov eax, [checkAdd2] mov eax, [checkAdd2]
@ -317,7 +317,7 @@ cs2:
cs2_1: cs2_1:
and word [checkSize2], 0x01 and word [checkSize2], 0x01
jz cs_exit jz cs_exit
mov bh, [eax] mov bh, [eax]
xor bl, bl xor bl, bl
@ -384,7 +384,7 @@ not1:
and bl, 0x7f and bl, 0x7f
cmp bl, 3 cmp bl, 3
je ash_eth_enable je ash_eth_enable
; Ethernet isn't enabled, so make sure that the card is disabled ; Ethernet isn't enabled, so make sure that the card is disabled
mov [ethernet_active], byte 0 mov [ethernet_active], byte 0
@ -395,7 +395,7 @@ ash_eth_enable:
; if found ; if found
call eth_probe call eth_probe
cmp eax, 0 cmp eax, 0
je ash_eth_done ; Abort if no hardware found je ash_eth_done ; Abort if no hardware found
mov [ethernet_active], byte 1 mov [ethernet_active], byte 1
@ -524,8 +524,8 @@ not15: ; ARP stuff
cmp ebx, 1 cmp ebx, 1
je a_ann ; arp announce je a_ann ; arp announce
; cmp ebx,2 ; cmp ebx,2
; jne a_resp ; arp response ; jne a_resp ; arp response
jmp param15_error jmp param15_error
@ -542,7 +542,7 @@ a_probe:
call arp_request call arp_request
pop dword [stack_ip] pop dword [stack_ip]
jmp @f jmp @f
; arp announce, sender IP must be set to target IP ; arp announce, sender IP must be set to target IP
; ecx: pointer to target MAC ; ecx: pointer to target MAC
@ -658,6 +658,21 @@ nots8:
ret ret
nots9: nots9:
cmp eax, 10
jnz nots10
mov eax,dword[drvr_cable]
test eax,eax
jnz @f ; if function is not implented, return -1
mov al,-1
ret
@@:
call dword[drvr_cable]
ret
nots10:
cmp eax, 254 cmp eax, 254
jnz notdump jnz notdump
@ -892,9 +907,9 @@ stack_get_packet:
mov eax, NET1OUT_QUEUE mov eax, NET1OUT_QUEUE
call dequeue call dequeue
cmp ax, NO_BUFFER cmp ax, NO_BUFFER
je sgp_non_exit ; Exit if no buffer available je sgp_non_exit ; Exit if no buffer available
push eax ; Save buffer number for freeing at end push eax ; Save buffer number for freeing at end
push edx push edx
; convert buffer pointer eax to the absolute address ; convert buffer pointer eax to the absolute address
@ -903,7 +918,7 @@ stack_get_packet:
add eax, IPbuffs add eax, IPbuffs
pop edx pop edx
push eax ; save address of IP data push eax ; save address of IP data
; Get the address of the callers data ; Get the address of the callers data
mov edi,[0x3010] mov edi,[0x3010]
@ -913,10 +928,10 @@ stack_get_packet:
pop eax pop eax
mov ecx, 1500 ; should get the actual number of bytes to write mov ecx, 1500 ; should get the actual number of bytes to write
mov esi, eax mov esi, eax
cld cld
rep movsb ; copy the data across rep movsb ; copy the data across
; And finally, return the buffer to the free queue ; And finally, return the buffer to the free queue
pop eax pop eax
@ -947,7 +962,7 @@ stack_insert_packet:
mov eax, EMPTY_QUEUE mov eax, EMPTY_QUEUE
call dequeue call dequeue
cmp ax, NO_BUFFER cmp ax, NO_BUFFER
je sip_err_exit je sip_err_exit
push eax push eax
@ -964,9 +979,9 @@ stack_insert_packet:
; So, edx holds the IPbuffer ptr ; So, edx holds the IPbuffer ptr
pop ecx ; count of bytes to send pop ecx ; count of bytes to send
mov ebx, ecx ; need the length later mov ebx, ecx ; need the length later
pop eax ; get callers ptr to data to send pop eax ; get callers ptr to data to send
; Get the address of the callers data ; Get the address of the callers data
mov edi,[0x3010] mov edi,[0x3010]
@ -976,7 +991,7 @@ stack_insert_packet:
mov edi, edx mov edi, edx
cld cld
rep movsb ; copy the data across rep movsb ; copy the data across
pop ebx pop ebx