forked from KolibriOS/kolibrios
284 lines
9.7 KiB
C
284 lines
9.7 KiB
C
/* tic80.h -- Header file for TI TMS320C80 (MV) opcode table
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Copyright (C) 1996-2015 Free Software Foundation, Inc.
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Written by Fred Fish (fnf@cygnus.com), Cygnus Support
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This file is part of GDB, GAS, and the GNU binutils.
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GDB, GAS, and the GNU binutils are free software; you can redistribute
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them and/or modify them under the terms of the GNU General Public
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License as published by the Free Software Foundation; either version 3,
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or (at your option) any later version.
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GDB, GAS, and the GNU binutils are distributed in the hope that they
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will be useful, but WITHOUT ANY WARRANTY; without even the implied
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warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
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the GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this file; see the file COPYING3. If not, write to the Free
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Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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#ifndef TIC80_H
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#define TIC80_H
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/* The opcode table is an array of struct tic80_opcode. */
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struct tic80_opcode
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{
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/* The opcode name. */
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const char *name;
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/* The opcode itself. Those bits which will be filled in with operands
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are zeroes. */
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unsigned long opcode;
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/* The opcode mask. This is used by the disassembler. This is a mask
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containing ones indicating those bits which must match the opcode
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field, and zeroes indicating those bits which need not match (and are
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presumably filled in by operands). */
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unsigned long mask;
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/* Special purpose flags for this opcode. */
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unsigned char flags;
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/* An array of operand codes. Each code is an index into the operand
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table. They appear in the order which the operands must appear in
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assembly code, and are terminated by a zero. FIXME: Adjust size to
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match actual requirements when TIc80 support is complete */
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unsigned char operands[8];
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};
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/* The table itself is sorted by major opcode number, and is otherwise in
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the order in which the disassembler should consider instructions.
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FIXME: This isn't currently true. */
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extern const struct tic80_opcode tic80_opcodes[];
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extern const int tic80_num_opcodes;
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/* The operands table is an array of struct tic80_operand. */
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struct tic80_operand
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{
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/* The number of bits in the operand. */
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int bits;
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/* How far the operand is left shifted in the instruction. */
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int shift;
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/* Insertion function. This is used by the assembler. To insert an
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operand value into an instruction, check this field.
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If it is NULL, execute
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i |= (op & ((1 << o->bits) - 1)) << o->shift;
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(i is the instruction which we are filling in, o is a pointer to
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this structure, and op is the opcode value; this assumes twos
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complement arithmetic).
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If this field is not NULL, then simply call it with the
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instruction and the operand value. It will return the new value
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of the instruction. If the ERRMSG argument is not NULL, then if
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the operand value is illegal, *ERRMSG will be set to a warning
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string (the operand will be inserted in any case). If the
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operand value is legal, *ERRMSG will be unchanged (most operands
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can accept any value). */
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unsigned long (*insert)
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(unsigned long instruction, long op, const char **errmsg);
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/* Extraction function. This is used by the disassembler. To
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extract this operand type from an instruction, check this field.
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If it is NULL, compute
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op = ((i) >> o->shift) & ((1 << o->bits) - 1);
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if ((o->flags & TIC80_OPERAND_SIGNED) != 0
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&& (op & (1 << (o->bits - 1))) != 0)
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op -= 1 << o->bits;
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(i is the instruction, o is a pointer to this structure, and op
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is the result; this assumes twos complement arithmetic).
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If this field is not NULL, then simply call it with the
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instruction value. It will return the value of the operand. If
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the INVALID argument is not NULL, *INVALID will be set to
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non-zero if this operand type can not actually be extracted from
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this operand (i.e., the instruction does not match). If the
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operand is valid, *INVALID will not be changed. */
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long (*extract) (unsigned long instruction, int *invalid);
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/* One bit syntax flags. */
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unsigned long flags;
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};
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/* Elements in the table are retrieved by indexing with values from
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the operands field of the tic80_opcodes table. */
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extern const struct tic80_operand tic80_operands[];
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/* Values defined for the flags field of a struct tic80_operand.
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Note that flags for all predefined symbols, such as the general purpose
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registers (ex: r10), control registers (ex: FPST), condition codes (ex:
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eq0.b), bit numbers (ex: gt.b), etc are large enough that they can be
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or'd into an int where the lower bits contain the actual numeric value
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that correponds to this predefined symbol. This way a single int can
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contain both the value of the symbol and it's type.
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*/
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/* This operand must be an even register number. Floating point numbers
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for example are stored in even/odd register pairs. */
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#define TIC80_OPERAND_EVEN (1 << 0)
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/* This operand must be an odd register number and must be one greater than
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the register number of the previous operand. I.E. the second register in
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an even/odd register pair. */
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#define TIC80_OPERAND_ODD (1 << 1)
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/* This operand takes signed values. */
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#define TIC80_OPERAND_SIGNED (1 << 2)
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/* This operand may be either a predefined constant name or a numeric value.
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An example would be a condition code like "eq0.b" which has the numeric
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value 0x2. */
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#define TIC80_OPERAND_NUM (1 << 3)
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/* This operand should be wrapped in parentheses rather than separated
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from the previous one by a comma. This is used for various
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instructions, like the load and store instructions, which want
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their operands to look like "displacement(reg)" */
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#define TIC80_OPERAND_PARENS (1 << 4)
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/* This operand is a PC relative branch offset. The disassembler prints
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these symbolically if possible. Note that the offsets are taken as word
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offsets. */
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#define TIC80_OPERAND_PCREL (1 << 5)
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/* This flag is a hint to the disassembler for using hex as the prefered
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printing format, even for small positive or negative immediate values.
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Normally values in the range -999 to 999 are printed as signed decimal
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values and other values are printed in hex. */
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#define TIC80_OPERAND_BITFIELD (1 << 6)
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/* This operand may have a ":m" modifier specified by bit 17 in a short
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immediate form instruction. */
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#define TIC80_OPERAND_M_SI (1 << 7)
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/* This operand may have a ":m" modifier specified by bit 15 in a long
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immediate or register form instruction. */
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#define TIC80_OPERAND_M_LI (1 << 8)
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/* This operand may have a ":s" modifier specified in bit 11 in a long
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immediate or register form instruction. */
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#define TIC80_OPERAND_SCALED (1 << 9)
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/* This operand is a floating point value */
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#define TIC80_OPERAND_FLOAT (1 << 10)
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/* This operand is an byte offset from a base relocation. The lower
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two bits of the final relocated address are ignored when the value is
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written to the program counter. */
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#define TIC80_OPERAND_BASEREL (1 << 11)
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/* This operand is an "endmask" field for a shift instruction.
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It is treated special in that it can have values of 0-32,
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where 0 and 32 result in the same instruction. The assembler
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must be able to accept both endmask values. This disassembler
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has no way of knowing from the instruction which value was
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given at assembly time, so it just uses '0'. */
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#define TIC80_OPERAND_ENDMASK (1 << 12)
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/* This operand is one of the 32 general purpose registers.
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The disassembler prints these with a leading 'r'. */
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#define TIC80_OPERAND_GPR (1 << 27)
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/* This operand is a floating point accumulator register.
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The disassembler prints these with a leading 'a'. */
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#define TIC80_OPERAND_FPA ( 1 << 28)
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/* This operand is a control register number, either numeric or
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symbolic (like "EIF", "EPC", etc).
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The disassembler prints these symbolically. */
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#define TIC80_OPERAND_CR (1 << 29)
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/* This operand is a condition code, either numeric or
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symbolic (like "eq0.b", "ne0.w", etc).
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The disassembler prints these symbolically. */
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#define TIC80_OPERAND_CC (1 << 30)
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/* This operand is a bit number, either numeric or
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symbolic (like "eq.b", "or.f", etc).
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The disassembler prints these symbolically.
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Note that they appear in the instruction in 1's complement relative
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to the values given in the manual. */
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#define TIC80_OPERAND_BITNUM (1 << 31)
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/* This mask is used to strip operand bits from an int that contains
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both operand bits and a numeric value in the lsbs. */
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#define TIC80_OPERAND_MASK (TIC80_OPERAND_GPR | TIC80_OPERAND_FPA | TIC80_OPERAND_CR | TIC80_OPERAND_CC | TIC80_OPERAND_BITNUM)
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/* Flag bits for the struct tic80_opcode flags field. */
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#define TIC80_VECTOR 01 /* Is a vector instruction */
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#define TIC80_NO_R0_DEST 02 /* Register r0 cannot be a destination register */
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/* The opcodes library contains a table that allows translation from predefined
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symbol names to numeric values, and vice versa. */
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/* Structure to hold information about predefined symbols. */
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struct predefined_symbol
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{
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char *name; /* name to recognize */
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int value;
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};
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#define PDS_NAME(pdsp) ((pdsp) -> name)
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#define PDS_VALUE(pdsp) ((pdsp) -> value)
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/* Translation array. */
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extern const struct predefined_symbol tic80_predefined_symbols[];
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/* How many members in the array. */
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extern const int tic80_num_predefined_symbols;
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/* Translate value to symbolic name. */
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const char *tic80_value_to_symbol (int val, int class);
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/* Translate symbolic name to value. */
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int tic80_symbol_to_value (char *name, int class);
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const struct predefined_symbol *tic80_next_predefined_symbol
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(const struct predefined_symbol *);
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#endif /* TIC80_H */
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