forked from KolibriOS/kolibrios
c7fc8e91d0
git-svn-id: svn://kolibrios.org@6515 a494cfbc-eb01-0410-851d-a64ba20cac60
386 lines
9.1 KiB
C
386 lines
9.1 KiB
C
/* Generated automatically by the program `genconstants'
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from the machine description file `md'. */
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#ifndef GCC_INSN_CONSTANTS_H
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#define GCC_INSN_CONSTANTS_H
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#define XMM27_REG 64
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#define XMM9_REG 46
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#define ST6_REG 14
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#define MASK5_REG 74
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#define R13_REG 42
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#define XMM14_REG 51
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#define ROUND_CEIL 0x2
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#define PCOM_TRUE 1
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#define XMM7_REG 28
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#define PPERM_SRC 0x00
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#define PPERM_ZERO 0x80
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#define MM7_REG 36
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#define XMM6_REG 27
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#define ST3_REG 11
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#define MASK2_REG 71
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#define R10_REG 39
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#define XMM11_REG 48
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#define XMM19_REG 56
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#define ST1_REG 9
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#define MASK3_REG 72
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#define MM4_REG 33
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#define ST7_REG 15
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#define COM_FALSE_P 3
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#define XMM3_REG 24
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#define XMM24_REG 61
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#define ST0_REG 8
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#define MASK7_REG 76
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#define BND1_REG 78
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#define COM_FALSE_S 2
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#define SP_REG 7
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#define AX_REG 0
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#define BND0_REG 77
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#define ROUND_NO_EXC 0x8
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#define MM1_REG 30
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#define MM3_REG 32
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#define XMM1_REG 22
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#define ROUND_ZERO 3
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#define XMM16_REG 53
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#define FPCR_REG 19
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#define XMM8_REG 45
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#define XMM4_REG 25
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#define ST5_REG 13
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#define XMM23_REG 60
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#define R12_REG 41
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#define R9_REG 38
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#define XMM26_REG 63
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#define ROUND_MXCSR 0x4
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#define PCOM_FALSE 0
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#define MASK4_REG 73
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#define XMM12_REG 49
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#define FLAGS_REG 17
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#define PPERM_INVERT 0x20
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#define MM6_REG 35
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#define PPERM_SRC1 0x00
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#define PPERM_SRC2 0x10
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#define ST2_REG 10
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#define MASK1_REG 70
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#define XMM10_REG 47
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#define XMM20_REG 57
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#define ROUND_TRUNC 0x3
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#define XMM18_REG 55
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#define DI_REG 5
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#define ROUND_SAE 8
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#define XMM25_REG 62
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#define DX_REG 1
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#define XMM29_REG 66
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#define NO_ROUND 4
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#define BP_REG 6
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#define XMM5_REG 26
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#define COM_TRUE_P 5
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#define COM_TRUE_S 4
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#define ROUND_FLOOR 0x1
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#define FPSR_REG 18
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#define MASK6_REG 75
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#define R14_REG 43
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#define XMM28_REG 65
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#define R15_REG 44
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#define XMM13_REG 50
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#define ROUND_NEAREST_INT 0
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#define PPERM_SIGN 0xc0
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#define MM0_REG 29
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#define XMM31_REG 68
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#define BX_REG 3
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#define XMM30_REG 67
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#define ST4_REG 12
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#define PPERM_INV_SIGN 0xe0
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#define R11_REG 40
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#define MM5_REG 34
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#define PPERM_REVERSE 0x40
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#define CX_REG 2
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#define MASK0_REG 69
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#define R8_REG 37
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#define SI_REG 4
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#define XMM22_REG 59
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#define XMM15_REG 52
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#define XMM0_REG 21
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#define XMM17_REG 54
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#define ROUND_NEG_INF 1
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#define ROUND_POS_INF 2
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#define XMM2_REG 23
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#define PPERM_ONES 0xa0
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#define XMM21_REG 58
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#define MM2_REG 31
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#define PPERM_REV_INV 0x60
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enum unspec {
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UNSPEC_GOT = 0,
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UNSPEC_GOTOFF = 1,
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UNSPEC_GOTPCREL = 2,
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UNSPEC_GOTTPOFF = 3,
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UNSPEC_TPOFF = 4,
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UNSPEC_NTPOFF = 5,
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UNSPEC_DTPOFF = 6,
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UNSPEC_GOTNTPOFF = 7,
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UNSPEC_INDNTPOFF = 8,
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UNSPEC_PLTOFF = 9,
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UNSPEC_MACHOPIC_OFFSET = 10,
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UNSPEC_PCREL = 11,
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UNSPEC_SIZEOF = 12,
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UNSPEC_STACK_ALLOC = 13,
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UNSPEC_SET_GOT = 14,
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UNSPEC_SET_RIP = 15,
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UNSPEC_SET_GOT_OFFSET = 16,
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UNSPEC_MEMORY_BLOCKAGE = 17,
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UNSPEC_STACK_CHECK = 18,
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UNSPEC_TP = 19,
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UNSPEC_TLS_GD = 20,
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UNSPEC_TLS_LD_BASE = 21,
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UNSPEC_TLSDESC = 22,
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UNSPEC_TLS_IE_SUN = 23,
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UNSPEC_SCAS = 24,
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UNSPEC_FNSTSW = 25,
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UNSPEC_SAHF = 26,
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UNSPEC_PARITY = 27,
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UNSPEC_FSTCW = 28,
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UNSPEC_FLDCW = 29,
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UNSPEC_REP = 30,
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UNSPEC_LD_MPIC = 31,
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UNSPEC_TRUNC_NOOP = 32,
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UNSPEC_DIV_ALREADY_SPLIT = 33,
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UNSPEC_PAUSE = 34,
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UNSPEC_LEA_ADDR = 35,
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UNSPEC_XBEGIN_ABORT = 36,
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UNSPEC_STOS = 37,
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UNSPEC_PEEPSIB = 38,
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UNSPEC_INSN_FALSE_DEP = 39,
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UNSPEC_FIX_NOTRUNC = 40,
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UNSPEC_MASKMOV = 41,
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UNSPEC_MOVMSK = 42,
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UNSPEC_RCP = 43,
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UNSPEC_RSQRT = 44,
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UNSPEC_PSADBW = 45,
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UNSPEC_COPYSIGN = 46,
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UNSPEC_IEEE_MIN = 47,
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UNSPEC_IEEE_MAX = 48,
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UNSPEC_SIN = 49,
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UNSPEC_COS = 50,
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UNSPEC_FPATAN = 51,
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UNSPEC_FYL2X = 52,
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UNSPEC_FYL2XP1 = 53,
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UNSPEC_FRNDINT = 54,
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UNSPEC_FIST = 55,
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UNSPEC_F2XM1 = 56,
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UNSPEC_TAN = 57,
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UNSPEC_FXAM = 58,
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UNSPEC_FRNDINT_FLOOR = 59,
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UNSPEC_FRNDINT_CEIL = 60,
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UNSPEC_FRNDINT_TRUNC = 61,
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UNSPEC_FRNDINT_MASK_PM = 62,
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UNSPEC_FIST_FLOOR = 63,
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UNSPEC_FIST_CEIL = 64,
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UNSPEC_SINCOS_COS = 65,
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UNSPEC_SINCOS_SIN = 66,
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UNSPEC_XTRACT_FRACT = 67,
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UNSPEC_XTRACT_EXP = 68,
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UNSPEC_FSCALE_FRACT = 69,
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UNSPEC_FSCALE_EXP = 70,
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UNSPEC_FPREM_F = 71,
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UNSPEC_FPREM_U = 72,
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UNSPEC_FPREM1_F = 73,
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UNSPEC_FPREM1_U = 74,
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UNSPEC_C2_FLAG = 75,
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UNSPEC_FXAM_MEM = 76,
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UNSPEC_SP_SET = 77,
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UNSPEC_SP_TEST = 78,
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UNSPEC_SP_TLS_SET = 79,
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UNSPEC_SP_TLS_TEST = 80,
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UNSPEC_ROUND = 81,
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UNSPEC_CRC32 = 82,
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UNSPEC_BEXTR = 83,
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UNSPEC_PDEP = 84,
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UNSPEC_PEXT = 85,
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UNSPEC_KMOV = 86,
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UNSPEC_BNDMK = 87,
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UNSPEC_BNDMK_ADDR = 88,
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UNSPEC_BNDSTX = 89,
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UNSPEC_BNDLDX = 90,
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UNSPEC_BNDLDX_ADDR = 91,
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UNSPEC_BNDCL = 92,
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UNSPEC_BNDCU = 93,
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UNSPEC_BNDCN = 94,
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UNSPEC_MPX_FENCE = 95,
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UNSPEC_MOVNTQ = 96,
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UNSPEC_PFRCP = 97,
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UNSPEC_PFRCPIT1 = 98,
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UNSPEC_PFRCPIT2 = 99,
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UNSPEC_PFRSQRT = 100,
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UNSPEC_PFRSQIT1 = 101,
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UNSPEC_MOVNT = 102,
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UNSPEC_LOADU = 103,
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UNSPEC_STOREU = 104,
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UNSPEC_LDDQU = 105,
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UNSPEC_PSHUFB = 106,
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UNSPEC_PSIGN = 107,
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UNSPEC_PALIGNR = 108,
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UNSPEC_EXTRQI = 109,
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UNSPEC_EXTRQ = 110,
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UNSPEC_INSERTQI = 111,
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UNSPEC_INSERTQ = 112,
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UNSPEC_BLENDV = 113,
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UNSPEC_INSERTPS = 114,
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UNSPEC_DP = 115,
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UNSPEC_MOVNTDQA = 116,
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UNSPEC_MPSADBW = 117,
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UNSPEC_PHMINPOSUW = 118,
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UNSPEC_PTEST = 119,
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UNSPEC_PCMPESTR = 120,
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UNSPEC_PCMPISTR = 121,
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UNSPEC_FMADDSUB = 122,
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UNSPEC_XOP_UNSIGNED_CMP = 123,
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UNSPEC_XOP_TRUEFALSE = 124,
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UNSPEC_XOP_PERMUTE = 125,
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UNSPEC_FRCZ = 126,
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UNSPEC_AESENC = 127,
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UNSPEC_AESENCLAST = 128,
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UNSPEC_AESDEC = 129,
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UNSPEC_AESDECLAST = 130,
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UNSPEC_AESIMC = 131,
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UNSPEC_AESKEYGENASSIST = 132,
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UNSPEC_PCLMUL = 133,
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UNSPEC_PCMP = 134,
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UNSPEC_VPERMIL = 135,
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UNSPEC_VPERMIL2 = 136,
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UNSPEC_VPERMIL2F128 = 137,
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UNSPEC_CAST = 138,
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UNSPEC_VTESTP = 139,
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UNSPEC_VCVTPH2PS = 140,
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UNSPEC_VCVTPS2PH = 141,
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UNSPEC_VPERMVAR = 142,
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UNSPEC_VPERMTI = 143,
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UNSPEC_GATHER = 144,
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UNSPEC_VSIBADDR = 145,
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UNSPEC_VPERMI2 = 146,
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UNSPEC_VPERMT2 = 147,
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UNSPEC_VPERMI2_MASK = 148,
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UNSPEC_UNSIGNED_FIX_NOTRUNC = 149,
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UNSPEC_UNSIGNED_PCMP = 150,
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UNSPEC_TESTM = 151,
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UNSPEC_TESTNM = 152,
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UNSPEC_SCATTER = 153,
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UNSPEC_RCP14 = 154,
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UNSPEC_RSQRT14 = 155,
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UNSPEC_FIXUPIMM = 156,
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UNSPEC_SCALEF = 157,
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UNSPEC_VTERNLOG = 158,
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UNSPEC_GETEXP = 159,
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UNSPEC_GETMANT = 160,
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UNSPEC_ALIGN = 161,
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UNSPEC_CONFLICT = 162,
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UNSPEC_COMPRESS = 163,
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UNSPEC_COMPRESS_STORE = 164,
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UNSPEC_EXPAND = 165,
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UNSPEC_MASKED_EQ = 166,
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UNSPEC_MASKED_GT = 167,
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UNSPEC_EMBEDDED_ROUNDING = 168,
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UNSPEC_GATHER_PREFETCH = 169,
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UNSPEC_SCATTER_PREFETCH = 170,
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UNSPEC_EXP2 = 171,
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UNSPEC_RCP28 = 172,
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UNSPEC_RSQRT28 = 173,
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UNSPEC_SHA1MSG1 = 174,
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UNSPEC_SHA1MSG2 = 175,
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UNSPEC_SHA1NEXTE = 176,
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UNSPEC_SHA1RNDS4 = 177,
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UNSPEC_SHA256MSG1 = 178,
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UNSPEC_SHA256MSG2 = 179,
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UNSPEC_SHA256RNDS2 = 180,
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UNSPEC_DBPSADBW = 181,
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UNSPEC_PMADDUBSW512 = 182,
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UNSPEC_PMADDWD512 = 183,
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UNSPEC_PSHUFHW = 184,
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UNSPEC_PSHUFLW = 185,
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UNSPEC_CVTINT2MASK = 186,
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UNSPEC_REDUCE = 187,
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UNSPEC_FPCLASS = 188,
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UNSPEC_RANGE = 189,
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UNSPEC_VPMADD52LUQ = 190,
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UNSPEC_VPMADD52HUQ = 191,
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UNSPEC_VPMULTISHIFT = 192,
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UNSPEC_LFENCE = 193,
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UNSPEC_SFENCE = 194,
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UNSPEC_MFENCE = 195,
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UNSPEC_FILD_ATOMIC = 196,
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UNSPEC_FIST_ATOMIC = 197,
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UNSPEC_LDA = 198,
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UNSPEC_STA = 199
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};
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#define NUM_UNSPEC_VALUES 200
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extern const char *const unspec_strings[];
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enum unspecv {
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UNSPECV_BLOCKAGE = 0,
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UNSPECV_STACK_PROBE = 1,
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UNSPECV_PROBE_STACK_RANGE = 2,
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UNSPECV_ALIGN = 3,
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UNSPECV_PROLOGUE_USE = 4,
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UNSPECV_SPLIT_STACK_RETURN = 5,
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UNSPECV_CLD = 6,
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UNSPECV_NOPS = 7,
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UNSPECV_RDTSC = 8,
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UNSPECV_RDTSCP = 9,
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UNSPECV_RDPMC = 10,
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UNSPECV_LLWP_INTRINSIC = 11,
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UNSPECV_SLWP_INTRINSIC = 12,
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UNSPECV_LWPVAL_INTRINSIC = 13,
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UNSPECV_LWPINS_INTRINSIC = 14,
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UNSPECV_RDFSBASE = 15,
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UNSPECV_RDGSBASE = 16,
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UNSPECV_WRFSBASE = 17,
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UNSPECV_WRGSBASE = 18,
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UNSPECV_FXSAVE = 19,
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UNSPECV_FXRSTOR = 20,
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UNSPECV_FXSAVE64 = 21,
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UNSPECV_FXRSTOR64 = 22,
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UNSPECV_XSAVE = 23,
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UNSPECV_XRSTOR = 24,
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UNSPECV_XSAVE64 = 25,
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UNSPECV_XRSTOR64 = 26,
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UNSPECV_XSAVEOPT = 27,
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UNSPECV_XSAVEOPT64 = 28,
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UNSPECV_XSAVES = 29,
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UNSPECV_XRSTORS = 30,
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UNSPECV_XSAVES64 = 31,
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UNSPECV_XRSTORS64 = 32,
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UNSPECV_XSAVEC = 33,
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UNSPECV_XSAVEC64 = 34,
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UNSPECV_FNSTENV = 35,
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UNSPECV_FLDENV = 36,
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UNSPECV_FNSTSW = 37,
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UNSPECV_FNCLEX = 38,
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UNSPECV_RDRAND = 39,
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UNSPECV_RDSEED = 40,
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UNSPECV_XBEGIN = 41,
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UNSPECV_XEND = 42,
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UNSPECV_XABORT = 43,
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UNSPECV_XTEST = 44,
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UNSPECV_NLGR = 45,
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UNSPECV_CLWB = 46,
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UNSPECV_PCOMMIT = 47,
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UNSPECV_CLFLUSHOPT = 48,
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UNSPECV_MONITORX = 49,
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UNSPECV_MWAITX = 50,
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UNSPECV_EMMS = 51,
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UNSPECV_FEMMS = 52,
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UNSPECV_LDMXCSR = 53,
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UNSPECV_STMXCSR = 54,
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UNSPECV_CLFLUSH = 55,
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UNSPECV_MONITOR = 56,
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UNSPECV_MWAIT = 57,
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UNSPECV_VZEROALL = 58,
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UNSPECV_VZEROUPPER = 59,
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UNSPECV_CMPXCHG = 60,
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UNSPECV_XCHG = 61,
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UNSPECV_LOCK = 62
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};
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#define NUM_UNSPECV_VALUES 63
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extern const char *const unspecv_strings[];
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#endif /* GCC_INSN_CONSTANTS_H */
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