forked from KolibriOS/kolibrios
1164 lines
37 KiB
NASM
1164 lines
37 KiB
NASM
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; ;;
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;; Copyright (C) KolibriOS team 2004-2021. All rights reserved. ;;
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;; Distributed under terms of the GNU General Public License ;;
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;; ;;
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;; Realtek 8139 driver for KolibriOS ;;
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;; ;;
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;; based on RTL8139.asm driver for menuetos ;;
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;; and realtek8139.asm for SolarOS by Eugen Brasoveanu ;;
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;; ;;
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;; Written by hidnplayr@kolibrios.org ;;
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;; ;;
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;; GNU GENERAL PUBLIC LICENSE ;;
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;; Version 2, June 1991 ;;
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;; ;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; TODO: test for RX-overrun
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format PE DLL native
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entry START
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CURRENT_API = 0x0200
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COMPATIBLE_API = 0x0100
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API_VERSION = (COMPATIBLE_API shl 16) + CURRENT_API
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; configureable area
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MAX_DEVICES = 16
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RBLEN = 3 ; Receive buffer size: 0==8K 1==16k 2==32k 3==64k
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TXRR = 8 ; total retries = 16+(TXRR*16)
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TX_MXDMA = 6 ; 0=16 1=32 2=64 3=128 4=256 5=512 6=1024 7=2048
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ERTXTH = 8 ; in unit of 32 bytes e.g:(8*32)=256
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RX_MXDMA = 7 ; 0=16 1=32 2=64 3=128 4=256 5=512 6=1024 7=unlimited
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RXFTH = 7 ; 0=16 1=32 2=64 3=128 4=256 5=512 6=1024 7=no threshold
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__DEBUG__ = 1
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__DEBUG_LEVEL__ = 2 ; 1 = verbose, 2 = errors only
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; end configureable area
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section '.flat' readable writable executable
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include '../proc32.inc'
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include '../struct.inc'
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include '../macros.inc'
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include '../fdo.inc'
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include '../netdrv.inc'
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REG_IDR0 = 0x00
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REG_MAR0 = 0x08 ; multicast filter register 0
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REG_MAR4 = 0x0c ; multicast filter register 4
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REG_TSD0 = 0x10 ; transmit status of descriptor
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REG_TSAD0 = 0x20 ; transmit start address of descriptor
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REG_RBSTART = 0x30 ; RxBuffer start address
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REG_COMMAND = 0x37 ; command register
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REG_CAPR = 0x38 ; current address of packet read (word) R/W
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REG_IMR = 0x3c ; interrupt mask register
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REG_ISR = 0x3e ; interrupt status register
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REG_TXCONFIG = 0x40 ; transmit configuration register
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REG_RXCONFIG = 0x44 ; receive configuration register 0
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REG_MPC = 0x4c ; missed packet counter
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REG_9346CR = 0x50 ; serial eeprom 93C46 command register
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REG_CONFIG1 = 0x52 ; configuration register 1
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REG_MSR = 0x58 ; Media Status register
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REG_CONFIG4 = 0x5a ; configuration register 4
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REG_HLTCLK = 0x5b ; undocumented halt clock register
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REG_BMCR = 0x62 ; basic mode control register
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REG_ANAR = 0x66 ; auto negotiation advertisement register
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REG_9346CR_WE = 11b shl 6
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BIT_RUNT = 4 ; total packet length < 64 bytes
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BIT_LONG = 3 ; total packet length > 4k
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BIT_CRC = 2 ; crc error occured
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BIT_FAE = 1 ; frame alignment error occured
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BIT_ROK = 0 ; received packet is ok
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BIT_RST = 4 ; reset bit
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BIT_RE = 3 ; receiver enabled
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BIT_TE = 2 ; transmitter enabled
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BUFE = 1 ; rx buffer is empty, no packet stored
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BIT_ISR_TOK = 2 ; transmit ok
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BIT_ISR_RER = 1 ; receive error interrupt
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BIT_ISR_ROK = 0 ; receive ok
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BIT_TX_MXDMA = 8 ; Max DMA burst size per Tx DMA burst
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BIT_TXRR = 4 ; Tx Retry count 16+(TXRR*16)
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BIT_RXFTH = 13 ; Rx fifo threshold
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BIT_RBLEN = 11 ; Ring buffer length indicator
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BIT_RX_MXDMA = 8 ; Max DMA burst size per Rx DMA burst
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BIT_NOWRAP = 7 ; transfered data wrapping
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BIT_9356SEL = 6 ; eeprom selector 9346/9356
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BIT_AER = 5 ; accept error packets
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BIT_AR = 4 ; accept runt packets
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BIT_AB = 3 ; accept broadcast packets
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BIT_AM = 2 ; accept multicast packets
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BIT_APM = 1 ; accept physical match packets
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BIT_AAP = 0 ; accept all packets
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BIT_93C46_EEM1 = 7 ; RTL8139 eeprom operating mode1
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BIT_93C46_EEM0 = 6 ; RTL8139 eeprom operating mode0
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BIT_93C46_EECS = 3 ; chip select
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BIT_93C46_EESK = 2 ; serial data clock
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BIT_93C46_EEDI = 1 ; serial data input
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BIT_93C46_EEDO = 0 ; serial data output
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BIT_LWACT = 4 ; see REG_CONFIG1
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BIT_SLEEP = 1 ; sleep bit at older chips
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BIT_PWRDWN = 0 ; power down bit at older chips
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BIT_PMEn = 0 ; power management enabled
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BIT_LWPTN = 2 ; see REG_CONFIG4
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BIT_ERTXTH = 16 ; early TX threshold
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BIT_TOK = 15 ; transmit ok
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BIT_OWN = 13 ; tx DMA operation is completed
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BIT_ANE = 12 ; auto negotiation enable
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BIT_TXFD = 8 ; 100base-T full duplex
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BIT_TX = 7 ; 100base-T
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BIT_10FD = 6 ; 10base-T full duplex
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BIT_10 = 5 ; 10base-T
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BIT_SELECTOR = 0 ; binary encoded selector CSMA/CD=00001
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BIT_IFG1 = 1 shl 25
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BIT_IFG0 = 1 shl 24
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RX_CONFIG = (RBLEN shl BIT_RBLEN) or \
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(RX_MXDMA shl BIT_RX_MXDMA) or \
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(1 shl BIT_NOWRAP) or \
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(RXFTH shl BIT_RXFTH) or\
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(1 shl BIT_AB) or \ ; Accept broadcast packets
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(1 shl BIT_APM) or \ ; Accept physical match packets
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(1 shl BIT_AER) or \ ; Accept error packets
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(1 shl BIT_AR) or \ ; Accept Runt packets (smaller then 64 bytes)
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(1 shl BIT_AM) ; Accept multicast packets
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RX_BUFFER_SIZE = (8192 shl RBLEN);+16+1500
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NUM_TX_DESC = 4 ; not user selectable
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EE_93C46_REG_ETH_ID = 7 ; MAC offset
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EE_93C46_READ_CMD = (6 shl 6) ; 110b + 6bit address
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EE_93C56_READ_CMD = (6 shl 8) ; 110b + 8bit address
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EE_93C46_CMD_LENGTH = 9 ; start bit + cmd + 6bit address
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EE_93C56_CMD_LENGTH = 11 ; start bit + cmd + 8bit ddress
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; See chapter "5.7 Transmit Configuration Register" of RTL8139D(L).pdf
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VER_RTL8139 = 1000000b
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VER_RTL8139_K = 1100000b
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VER_RTL8139A = 1110000b
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VER_RTL8139A_G = 1110010b
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VER_RTL8139B = 1111000b
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VER_RTL8130 = 1111100b
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VER_RTL8139C = 1110100b
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VER_RTL8100 = 1111010b
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VER_RTL8100_8139D = 1110101b
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VER_RTL8139CP = 1110110b
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VER_RTL8101 = 1110111b
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IDX_UNKNOWN = 0
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IDX_RTL8139 = 1
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IDX_RTL8139_K = 2
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IDX_RTL8139A = 3
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IDX_RTL8139A_G = 4
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IDX_RTL8139B = 5
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IDX_RTL8130 = 6
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IDX_RTL8139C = 7
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IDX_RTL8100 = 8
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IDX_RTL8100_8139D = 9
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IDX_RTL8139CP = 10
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IDX_RTL8101 = 11
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HW_VERSIONS = 11
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ISR_SERR = 1 shl 15
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ISR_TIMEOUT = 1 shl 14
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ISR_LENCHG = 1 shl 13
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ISR_FIFOOVW = 1 shl 6
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ISR_PUN = 1 shl 5
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ISR_RXOVW = 1 shl 4
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ISR_TER = 1 shl 3
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ISR_TOK = 1 shl 2
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ISR_RER = 1 shl 1
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ISR_ROK = 1 shl 0
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INTERRUPT_MASK = ISR_ROK or \
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ISR_RER or \
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ISR_TOK or \
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ISR_TER or \
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ISR_RXOVW or \
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ISR_PUN or \
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ISR_FIFOOVW or \
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ISR_LENCHG or \
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ISR_TIMEOUT or \
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ISR_SERR
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TSR_OWN = 1 shl 13
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TSR_TUN = 1 shl 14
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TSR_TOK = 1 shl 15
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TSR_CDH = 1 shl 28
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TSR_OWC = 1 shl 29
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TSR_TABT = 1 shl 30
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TSR_CRS = 1 shl 31
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struct device ETH_DEVICE
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io_addr dd ?
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pci_bus dd ?
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pci_dev dd ?
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irq_line db ?
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rb 3 ; align 4
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rx_buffer dd ?
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rx_data_offset dd ?
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curr_tx_desc db ?
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hw_ver_id db ?
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rb 2 ; align 4
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TX_DESC rd NUM_TX_DESC
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ends
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; ;;
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;; proc START ;;
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;; ;;
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;; (standard driver proc) ;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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proc START c, reason:dword, cmdline:dword
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cmp [reason], DRV_ENTRY
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jne .fail
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DEBUGF 2,"Loading driver\n"
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invoke RegService, my_service, service_proc
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ret
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.fail:
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xor eax, eax
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ret
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endp
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; ;;
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;; proc SERVICE_PROC ;;
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;; ;;
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;; (standard driver proc) ;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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proc service_proc stdcall, ioctl:dword
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mov edx, [ioctl]
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mov eax, [edx + IOCTL.io_code]
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;------------------------------------------------------
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cmp eax, 0 ;SRV_GETVERSION
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jne @F
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cmp [edx + IOCTL.out_size], 4
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jb .fail
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mov eax, [edx + IOCTL.output]
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mov [eax], dword API_VERSION
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xor eax, eax
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ret
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;------------------------------------------------------
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@@:
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cmp eax, 1 ;SRV_HOOK
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jne .fail
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cmp [edx + IOCTL.inp_size], 3 ; Data input must be at least 3 bytes
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jb .fail
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mov eax, [edx + IOCTL.input]
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cmp byte [eax], 1 ; 1 means device number and bus number (pci) are given
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jne .fail ; other types arent supported for this card yet
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; check if the device is already listed
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mov esi, device_list
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mov ecx, [devices]
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test ecx, ecx
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jz .firstdevice
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mov ax, [eax+1] ; get the pci bus and device numbers
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.nextdevice:
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mov ebx, [esi]
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cmp al, byte[ebx + device.pci_bus]
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jne @f
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cmp ah, byte[ebx + device.pci_dev]
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je .find_devicenum ; Device is already loaded, let's find it's device number
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@@:
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add esi, 4
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loop .nextdevice
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; This device doesnt have its own eth_device structure yet, lets create one
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.firstdevice:
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cmp [devices], MAX_DEVICES ; First check if the driver can handle one more card
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jae .fail
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allocate_and_clear ebx, sizeof.device, .fail ; Allocate the buffer for device structure
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; Fill in the direct call addresses into the struct
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mov [ebx + device.reset], reset
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mov [ebx + device.transmit], transmit
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mov [ebx + device.unload], unload
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mov [ebx + device.name], my_service
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; save the pci bus and device numbers
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mov eax, [edx + IOCTL.input]
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movzx ecx, byte[eax+1]
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mov [ebx + device.pci_bus], ecx
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movzx ecx, byte[eax+2]
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mov [ebx + device.pci_dev], ecx
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; Now, it's time to find the base io addres of the PCI device
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stdcall PCI_find_io, [ebx + device.pci_bus], [ebx + device.pci_dev]
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mov [ebx + device.io_addr], eax
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; We've found the io address, find IRQ now
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invoke PciRead8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.interrupt_line
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mov [ebx + device.irq_line], al
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DEBUGF 1, "Hooking into device, devfn:%x, bus:%x, irq:%x, I/O addr:%x\n",\
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[ebx + device.pci_dev]:2,[ebx + device.pci_bus]:2,[ebx + device.irq_line]:2,[ebx + device.io_addr]:4
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; Allocate the receive buffer
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invoke CreateRingBuffer, dword (RX_BUFFER_SIZE), dword PG_SW
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test eax, eax
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jz .err
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mov [ebx + device.rx_buffer], eax
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; Ok, the eth_device structure is ready, let's probe the device
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call probe ; this function will output in eax
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test eax, eax
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jnz .err ; If an error occured, exit
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mov eax, [devices] ; Add the device structure to our device list
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mov [device_list+4*eax], ebx ; (IRQ handler uses this list to find device)
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inc [devices] ;
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call reset
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test eax, eax
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jnz .destroy
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mov [ebx + device.type], NET_TYPE_ETH
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invoke NetRegDev
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cmp eax, -1
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je .destroy
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ret
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; If the device was already loaded, find the device number and return it in eax
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.find_devicenum:
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DEBUGF 1, "Trying to find device number of already registered device\n"
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invoke NetPtrToNum ; This kernel procedure converts a pointer to device struct in ebx
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; into a device number in edi
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mov eax, edi ; Application wants it in eax instead
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DEBUGF 1, "Kernel says: %u\n", eax
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ret
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; If an error occured, remove all allocated data and exit (returning -1 in eax)
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.destroy:
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; unregister device from device_list
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mov eax, [devices]
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mov dword[device_list-4+4*eax], 0
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dec [devices]
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.err:
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DEBUGF 2, "Fatal error occured, aborting\n"
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invoke KernelFree, [ebx + device.rx_buffer]
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invoke KernelFree, ebx
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.fail:
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or eax, -1
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ret
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;------------------------------------------------------
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endp
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;;/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\;;
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;; ;;
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;; Actual Hardware dependent code starts here ;;
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;; ;;
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;;/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\;;
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align 4
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unload:
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; TODO: (in this particular order)
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;
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; - Stop the device
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; - Detach int handler
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; - Remove device from local list (RTL8139_LIST)
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; - call unregister function in kernel
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; - Remove all allocated structures and buffers the card used
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or eax, -1
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ret
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;
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;; probe: enables the device (if it really is RTL8139)
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;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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align 4
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probe:
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DEBUGF 1, "Probing\n"
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; Make the device a bus master
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invoke PciRead32, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.command
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or al, PCI_CMD_MASTER or PCI_CMD_PIO
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invoke PciWrite32, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.command, eax
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; wake up old chips
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set_io [ebx + device.io_addr], 0
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set_io [ebx + device.io_addr], REG_HLTCLK
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mov al, 'R' ; run the clock
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out dx, al
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; get chip version
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set_io [ebx + device.io_addr], 0
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set_io [ebx + device.io_addr], REG_TXCONFIG + 2
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in ax, dx
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shr ah, 2
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shr ax, 6
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and al, 0x7f
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DEBUGF 1, "Chip version: %x\n", eax:2
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; now find it in our array
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mov ecx, HW_VERSIONS
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@@:
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cmp al, [hw_ver_array + ecx]
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je @f
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dec ecx
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jnz @r
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@@:
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mov [ebx + device.hw_ver_id], cl
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mov ecx, [hw_ver_names+ecx*4]
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mov [ebx + device.name], ecx
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DEBUGF 1, "Chip version: %s\n", ecx
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cmp [ebx + device.hw_ver_id], IDX_RTL8139B
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jae .new_chip
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; wake up older chips
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.old_chip:
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DEBUGF 1, "Wake up chip old style\n"
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set_io [ebx + device.io_addr], REG_CONFIG1
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in al, dx
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and al, not ((1 shl BIT_SLEEP) or (1 shl BIT_PWRDWN))
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out dx, al
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jmp .done
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; set LWAKE pin to active high (default value).
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; it is for Wake-On-LAN functionality of some motherboards.
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; this signal is used to inform the motherboard to execute a wake-up process.
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; only at newer chips.
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.new_chip:
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DEBUGF 1, "Wake up chip new style\n"
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; unlock config and BMCR registers
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set_io [ebx + device.io_addr], 0
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set_io [ebx + device.io_addr], REG_9346CR
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mov al, (1 shl BIT_93C46_EEM1) or (1 shl BIT_93C46_EEM0)
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out dx, al
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;
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set_io [ebx + device.io_addr], REG_CONFIG1
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in al, dx
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or al, (1 shl BIT_PMEn)
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and al, not (1 shl BIT_LWACT)
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out dx, al
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;
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set_io [ebx + device.io_addr], REG_CONFIG4
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in al, dx
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and al, not (1 shl BIT_LWPTN)
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out dx, al
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; lock config and BMCR registers
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xor al, al
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set_io [ebx + device.io_addr], REG_9346CR
|
|
out dx, al
|
|
|
|
.done:
|
|
DEBUGF 1, "probing done!\n"
|
|
xor eax, eax
|
|
ret
|
|
|
|
|
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
;;
|
|
;; reset: Set up all registers and descriptors, clear some values
|
|
;;
|
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
|
|
reset:
|
|
DEBUGF 1, "Reset\n"
|
|
|
|
; reset chip
|
|
DEBUGF 1, "Resetting chip\n"
|
|
set_io [ebx + device.io_addr], 0
|
|
set_io [ebx + device.io_addr], REG_COMMAND
|
|
mov al, 1 shl BIT_RST
|
|
out dx, al
|
|
mov cx, 1000 ; wait no longer for the reset
|
|
@@:
|
|
in al, dx
|
|
test al, 1 shl BIT_RST
|
|
jz @f ; RST remains 1 during reset
|
|
dec cx
|
|
jnz @r
|
|
DEBUGF 2, "Reset timeout!\n"
|
|
or eax, -1
|
|
ret
|
|
@@:
|
|
|
|
; Read MAC address
|
|
call read_mac
|
|
|
|
; attach int handler
|
|
movzx eax, [ebx + device.irq_line]
|
|
DEBUGF 1, "Attaching int handler to irq %x\n", eax:1
|
|
invoke AttachIntHandler, eax, int_handler, ebx
|
|
test eax, eax
|
|
jnz @f
|
|
DEBUGF 2, "Could not attach int handler!\n"
|
|
or eax, -1
|
|
ret
|
|
@@:
|
|
|
|
; unlock config and BMCR registers
|
|
set_io [ebx + device.io_addr], 0
|
|
set_io [ebx + device.io_addr], REG_9346CR
|
|
mov al, (1 shl BIT_93C46_EEM1) or (1 shl BIT_93C46_EEM0)
|
|
out dx, al
|
|
|
|
; initialize multicast registers (no filtering)
|
|
mov eax, 0xffffffff
|
|
set_io [ebx + device.io_addr], REG_MAR0
|
|
out dx, eax
|
|
set_io [ebx + device.io_addr], REG_MAR4
|
|
out dx, eax
|
|
|
|
; enable Rx/Tx
|
|
mov al, (1 shl BIT_RE) or (1 shl BIT_TE)
|
|
set_io [ebx + device.io_addr], REG_COMMAND
|
|
out dx, al
|
|
|
|
; Rxbuffer size, unlimited dma burst, no wrapping, no rx threshold
|
|
; accept broadcast packets, accept physical match packets
|
|
mov eax, RX_CONFIG
|
|
set_io [ebx + device.io_addr], REG_RXCONFIG
|
|
out dx, eax
|
|
|
|
; 1024 bytes DMA burst, total retries = 16 + 8 * 16 = 144
|
|
mov eax, (TX_MXDMA shl BIT_TX_MXDMA) or (TXRR shl BIT_TXRR) or BIT_IFG1 or BIT_IFG0
|
|
set_io [ebx + device.io_addr], REG_TXCONFIG
|
|
out dx, eax
|
|
|
|
; enable auto negotiation
|
|
set_io [ebx + device.io_addr], REG_BMCR
|
|
in ax, dx
|
|
or ax, (1 shl BIT_ANE)
|
|
out dx, ax
|
|
|
|
; set auto negotiation advertisement
|
|
set_io [ebx + device.io_addr], REG_ANAR
|
|
in ax, dx
|
|
or ax, (1 shl BIT_SELECTOR) or (1 shl BIT_10) or (1 shl BIT_10FD) or (1 shl BIT_TX) or (1 shl BIT_TXFD)
|
|
out dx, ax
|
|
|
|
; lock config and BMCR registers
|
|
xor eax, eax
|
|
set_io [ebx + device.io_addr], REG_9346CR
|
|
out dx, al
|
|
|
|
; init RX/TX pointers
|
|
mov [ebx + device.rx_data_offset], eax
|
|
mov [ebx + device.curr_tx_desc], al
|
|
; set_io [ebx + device.io_addr], REG_CAPR
|
|
; out dx, ax
|
|
|
|
; clear packet/byte counters
|
|
lea edi, [ebx + device.bytes_tx]
|
|
mov ecx, 6
|
|
rep stosd
|
|
|
|
; clear missing packet counter
|
|
set_io [ebx + device.io_addr], REG_MPC
|
|
out dx, eax
|
|
|
|
; set RxBuffer address, init RX buffer offset
|
|
mov eax, [ebx + device.rx_buffer]
|
|
mov dword[eax], 0 ; clear receive flags for first packet (really needed??)
|
|
DEBUGF 1, "RX buffer virtual addr=0x%x\n", eax
|
|
invoke GetPhysAddr
|
|
DEBUGF 1, "RX buffer physical addr=0x%x\n", eax
|
|
set_io [ebx + device.io_addr], REG_RBSTART
|
|
out dx, eax
|
|
|
|
; enable interrupts
|
|
set_io [ebx + device.io_addr], 0
|
|
set_io [ebx + device.io_addr], REG_IMR
|
|
mov ax, INTERRUPT_MASK
|
|
out dx, ax
|
|
|
|
; Set the mtu, kernel will be able to send now
|
|
mov [ebx + device.mtu], 1514
|
|
|
|
; Detect current link status
|
|
call link
|
|
|
|
; Indicate that we have successfully reset the card
|
|
xor eax, eax
|
|
ret
|
|
|
|
|
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
;; ;;
|
|
;; Transmit ;;
|
|
;; ;;
|
|
;; In: pointer to device structure in ebx ;;
|
|
;; Out: eax = 0 on success ;;
|
|
;; ;;
|
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
align 16
|
|
proc transmit stdcall bufferptr
|
|
|
|
spin_lock_irqsave
|
|
|
|
mov esi, [bufferptr]
|
|
DEBUGF 1,"Transmitting packet, buffer:%x, size:%u\n", [bufferptr], [esi + NET_BUFF.length]
|
|
lea eax, [esi + NET_BUFF.data]
|
|
DEBUGF 1,"To: %x-%x-%x-%x-%x-%x From: %x-%x-%x-%x-%x-%x Type:%x%x\n",\
|
|
[eax+00]:2,[eax+01]:2,[eax+02]:2,[eax+03]:2,[eax+04]:2,[eax+05]:2,\
|
|
[eax+06]:2,[eax+07]:2,[eax+08]:2,[eax+09]:2,[eax+10]:2,[eax+11]:2,\
|
|
[eax+13]:2,[eax+12]:2
|
|
|
|
cmp [esi + NET_BUFF.length], 1514
|
|
ja .error
|
|
cmp [esi + NET_BUFF.length], 60
|
|
jb .error
|
|
|
|
; check if we own the current discriptor
|
|
set_io [ebx + device.io_addr], 0
|
|
set_io [ebx + device.io_addr], REG_TSD0
|
|
movzx ecx, [ebx + device.curr_tx_desc]
|
|
shl ecx, 2
|
|
add edx, ecx
|
|
in eax, dx
|
|
test eax, (1 shl BIT_OWN)
|
|
jz .overrun
|
|
|
|
; Set the buffer address
|
|
set_io [ebx + device.io_addr], REG_TSAD0
|
|
mov [ebx + device.TX_DESC+ecx], esi
|
|
mov eax, esi
|
|
add eax, [eax + NET_BUFF.offset]
|
|
invoke GetPhysAddr
|
|
out dx, eax
|
|
|
|
; And the size of the buffer
|
|
set_io [ebx + device.io_addr], REG_TSD0
|
|
mov eax, [esi + NET_BUFF.length]
|
|
or eax, (ERTXTH shl BIT_ERTXTH) ; Early threshold
|
|
out dx, eax
|
|
|
|
; get next descriptor
|
|
inc [ebx + device.curr_tx_desc]
|
|
and [ebx + device.curr_tx_desc], NUM_TX_DESC-1
|
|
|
|
; Update stats
|
|
inc [ebx + device.packets_tx]
|
|
mov eax, [esi + NET_BUFF.length]
|
|
add dword[ebx + device.bytes_tx], eax
|
|
adc dword[ebx + device.bytes_tx + 4], 0
|
|
|
|
spin_unlock_irqrestore
|
|
xor eax, eax
|
|
ret
|
|
|
|
.error:
|
|
DEBUGF 2, "TX packet error\n"
|
|
inc [ebx + device.packets_tx_err]
|
|
invoke NetFree, [bufferptr]
|
|
|
|
spin_unlock_irqrestore
|
|
or eax, -1
|
|
ret
|
|
|
|
.overrun:
|
|
DEBUGF 2, "TX overrun\n"
|
|
inc [ebx + device.packets_tx_ovr]
|
|
invoke NetFree, [bufferptr]
|
|
|
|
spin_unlock_irqrestore
|
|
or eax, -1
|
|
ret
|
|
|
|
endp
|
|
|
|
|
|
|
|
|
|
|
|
;;;;;;;;;;;;;;;;;;;;;;;
|
|
;; ;;
|
|
;; Interrupt handler ;;
|
|
;; ;;
|
|
;;;;;;;;;;;;;;;;;;;;;;;
|
|
align 16
|
|
int_handler:
|
|
|
|
push ebx esi edi
|
|
|
|
mov ebx, [esp+4*4]
|
|
DEBUGF 1,"INT for 0x%x\n", ebx
|
|
|
|
; TODO? if we are paranoid, we can check that the value from ebx is present in the current device_list
|
|
|
|
set_io [ebx + device.io_addr], 0
|
|
set_io [ebx + device.io_addr], REG_ISR
|
|
in ax, dx ; Get interrupt status
|
|
test ax, ax
|
|
jz .nothing
|
|
|
|
out dx, ax ; ACK interrupt
|
|
DEBUGF 1, "Status: %x\n", ax
|
|
|
|
;----------------------------------------------------
|
|
; Received packet ok?
|
|
|
|
test ax, ISR_ROK
|
|
jz @f
|
|
push ax
|
|
|
|
.receive:
|
|
set_io [ebx + device.io_addr], 0
|
|
set_io [ebx + device.io_addr], REG_COMMAND
|
|
in al, dx
|
|
test al, BUFE ; test if RX buffer is empty
|
|
jnz .finish
|
|
|
|
DEBUGF 1, "RX:\n"
|
|
|
|
mov eax, [ebx + device.rx_buffer]
|
|
add eax, [ebx + device.rx_data_offset]
|
|
test byte [eax], (1 shl BIT_ROK) ; check if packet is ok
|
|
jz .reset_rx
|
|
|
|
; packet is ok, copy it
|
|
movzx ecx, word [eax+2] ; packet length
|
|
sub cx, 4 ; don't copy CRC
|
|
|
|
; Update stats
|
|
add dword [ebx + device.bytes_rx], ecx
|
|
adc dword [ebx + device.bytes_rx + 4], 0
|
|
inc [ebx + device.packets_rx]
|
|
|
|
DEBUGF 1, "Received %u bytes\n", ecx
|
|
|
|
push ebx eax ecx
|
|
add ecx, NET_BUFF.data
|
|
invoke NetAlloc, ecx ; Allocate a buffer to put packet into
|
|
pop ecx
|
|
test eax, eax ; Test if we allocated succesfully
|
|
jz .abort
|
|
mov [eax + NET_BUFF.length], ecx
|
|
mov [eax + NET_BUFF.device], ebx
|
|
mov [eax + NET_BUFF.offset], NET_BUFF.data
|
|
|
|
lea edi, [eax + NET_BUFF.data] ; Where we will copy too
|
|
mov esi, [esp] ; The buffer we will copy from
|
|
add esi, 4 ; Dont copy CRC
|
|
|
|
push .abort ; return addr for Eth_input
|
|
push eax ; buffer ptr for Eth_input
|
|
|
|
.copy:
|
|
shr ecx, 1
|
|
jnc .nb
|
|
movsb
|
|
.nb:
|
|
shr ecx, 1
|
|
jnc .nw
|
|
movsw
|
|
.nw:
|
|
jz .nd
|
|
rep movsd
|
|
.nd:
|
|
|
|
jmp [EthInput] ; Send it to kernel
|
|
|
|
.abort:
|
|
pop eax ebx
|
|
; update eth_data_start_offset
|
|
movzx eax, word [eax+2] ; packet length
|
|
add eax, [ebx + device.rx_data_offset]
|
|
add eax, 4+3 ; packet header is 4 bytes long + dword alignment
|
|
and eax, not 3 ; dword alignment
|
|
|
|
cmp eax, RX_BUFFER_SIZE
|
|
jb .no_wrap
|
|
DEBUGF 1, "Wrapping\n"
|
|
sub eax, RX_BUFFER_SIZE
|
|
.no_wrap:
|
|
mov [ebx + device.rx_data_offset], eax
|
|
DEBUGF 1, "New RX ptr: %d\n", eax
|
|
|
|
set_io [ebx + device.io_addr], 0
|
|
set_io [ebx + device.io_addr], REG_CAPR ; update 'Current Address of Packet Read register'
|
|
sub eax, 0x10 ; value 0x10 is a constant for CAPR
|
|
out dx, ax
|
|
|
|
jmp .receive ; check for multiple packets
|
|
|
|
.reset_rx:
|
|
test byte [eax], (1 shl BIT_CRC)
|
|
jz .no_crc_error
|
|
DEBUGF 2, "RX: CRC error!\n"
|
|
|
|
.no_crc_error:
|
|
test byte [eax], (1 shl BIT_FAE)
|
|
jz .no_fae_error
|
|
DEBUGF 2, "RX: Frame alignment error!\n"
|
|
|
|
.no_fae_error:
|
|
DEBUGF 1, "Reset RX\n"
|
|
in al, dx ; read command register
|
|
push ax
|
|
and al, not (1 shl BIT_RE) ; Clear the RE bit
|
|
out dx, al
|
|
pop ax
|
|
out dx, al ; write original command back
|
|
|
|
add edx, REG_RXCONFIG - REG_COMMAND ; Restore RX configuration
|
|
mov ax, RX_CONFIG
|
|
out dx, ax
|
|
|
|
.finish:
|
|
pop ax
|
|
@@:
|
|
|
|
;----------------------------------------------------
|
|
; Transmit ok / Transmit error
|
|
test ax, ISR_TOK + ISR_TER
|
|
jz @f
|
|
|
|
DEBUGF 1, "Transmit done!\n"
|
|
|
|
push ax
|
|
mov ecx, (NUM_TX_DESC-1)*4
|
|
.txdescloop:
|
|
set_io [ebx + device.io_addr], 0
|
|
set_io [ebx + device.io_addr], REG_TSD0
|
|
add edx, ecx
|
|
in eax, dx
|
|
|
|
test eax, TSR_OWN ; DMA operation completed
|
|
jz .notthisone
|
|
|
|
cmp [ebx + device.TX_DESC+ecx], 0
|
|
je .notthisone
|
|
|
|
DEBUGF 1, "TSD: 0x%x\n", eax
|
|
|
|
test eax, TSR_TUN
|
|
jz .no_bun
|
|
DEBUGF 2, "TX: FIFO Buffer underrun!\n"
|
|
|
|
.no_bun:
|
|
test eax, TSR_OWC
|
|
jz .no_owc
|
|
DEBUGF 2, "TX: OWC!\n"
|
|
|
|
.no_owc:
|
|
test eax, TSR_TABT
|
|
jz .no_tabt
|
|
DEBUGF 2, "TX: TABT!\n"
|
|
|
|
.no_tabt:
|
|
test eax, TSR_CRS
|
|
jz .no_csl
|
|
DEBUGF 2, "TX: Carrier Sense Lost!\n"
|
|
|
|
.no_csl:
|
|
test eax, TSR_TOK
|
|
jz .no_tok
|
|
DEBUGF 1, "TX: Transmit OK!\n"
|
|
|
|
.no_tok:
|
|
DEBUGF 1, "free transmit buffer 0x%x\n", [ebx + device.TX_DESC+ecx]:8
|
|
push ecx ebx
|
|
invoke NetFree, [ebx + device.TX_DESC+ecx]
|
|
pop ebx ecx
|
|
mov [ebx + device.TX_DESC+ecx], 0
|
|
|
|
.notthisone:
|
|
sub ecx, 4
|
|
jae .txdescloop
|
|
pop ax
|
|
@@:
|
|
|
|
;----------------------------------------------------
|
|
; Rx buffer overflow ?
|
|
test ax, ISR_RXOVW
|
|
jz @f
|
|
|
|
push ax
|
|
DEBUGF 2, "RX:buffer overflow!\n"
|
|
|
|
set_io [ebx + device.io_addr], 0
|
|
set_io [ebx + device.io_addr], REG_ISR
|
|
mov ax, ISR_FIFOOVW or ISR_RXOVW or ISR_ROK
|
|
out dx, ax
|
|
pop ax
|
|
@@:
|
|
|
|
;----------------------------------------------------
|
|
; Packet underrun?
|
|
test ax, ISR_PUN
|
|
jz @f
|
|
|
|
DEBUGF 1, "Packet underrun or link changed!\n"
|
|
|
|
call link
|
|
@@:
|
|
|
|
;----------------------------------------------------
|
|
; Receive FIFO overflow ?
|
|
test ax, ISR_FIFOOVW
|
|
jz @f
|
|
|
|
push ax
|
|
DEBUGF 2, "RX fifo overflow!\n"
|
|
|
|
set_io [ebx + device.io_addr], 0
|
|
set_io [ebx + device.io_addr], REG_ISR
|
|
mov ax, ISR_FIFOOVW or ISR_RXOVW or ISR_ROK
|
|
out dx, ax
|
|
pop ax
|
|
@@:
|
|
|
|
;----------------------------------------------------
|
|
; cable length changed ?
|
|
test ax, ISR_LENCHG
|
|
jz @f
|
|
|
|
DEBUGF 2, "Cable length changed!\n"
|
|
|
|
call link
|
|
@@:
|
|
|
|
pop edi esi ebx
|
|
xor eax, eax
|
|
inc eax
|
|
|
|
ret
|
|
|
|
.nothing:
|
|
pop edi esi ebx
|
|
xor eax, eax
|
|
|
|
ret
|
|
|
|
|
|
|
|
;;;;;;;;;;;;;;;;;;;;;;;
|
|
;; ;;
|
|
;; Check link status ;;
|
|
;; ;;
|
|
;;;;;;;;;;;;;;;;;;;;;;;
|
|
|
|
align 4
|
|
link:
|
|
DEBUGF 1, "Checking link status:\n"
|
|
|
|
set_io [ebx + device.io_addr], 0
|
|
set_io [ebx + device.io_addr], REG_MSR
|
|
in ax, dx
|
|
|
|
test al, 1 shl 2 ; 0 = link ok 1 = link fail
|
|
jnz .notconnected
|
|
|
|
mov ecx, ETH_LINK_SPEED_10M
|
|
test al, 1 shl 3 ; 0 = 100 Mbps 1 = 10 Mbps
|
|
jnz @f
|
|
mov ecx, ETH_LINK_SPEED_100M
|
|
@@:
|
|
|
|
set_io [ebx + device.io_addr], REG_BMCR
|
|
in ax, dx
|
|
test ax, 1 shl 8 ; Duplex mode
|
|
jz @f
|
|
or ecx, ETH_LINK_FULL_DUPLEX
|
|
@@:
|
|
|
|
mov [ebx + device.state], ecx
|
|
invoke NetLinkChanged
|
|
DEBUGF 2, "link is up\n"
|
|
ret
|
|
|
|
.notconnected:
|
|
mov [ebx + device.state], ETH_LINK_DOWN
|
|
invoke NetLinkChanged
|
|
DEBUGF 2, "link is down\n"
|
|
ret
|
|
|
|
|
|
|
|
;;;;;;;;;;;;;;;;;;;;;;;
|
|
;; ;;
|
|
;; Write MAC address ;;
|
|
;; ;;
|
|
;;;;;;;;;;;;;;;;;;;;;;;
|
|
|
|
align 4
|
|
write_mac: ; in: mac pushed onto stack (as 3 words)
|
|
|
|
DEBUGF 1, "Writing MAC\n"
|
|
|
|
; disable all in command registers
|
|
set_io [ebx + device.io_addr], 0
|
|
set_io [ebx + device.io_addr], REG_9346CR
|
|
xor eax, eax
|
|
out dx, al
|
|
|
|
set_io [ebx + device.io_addr], REG_IMR
|
|
xor eax, eax
|
|
out dx, ax
|
|
|
|
set_io [ebx + device.io_addr], REG_ISR
|
|
mov eax, -1
|
|
out dx, ax
|
|
|
|
; enable writing
|
|
set_io [ebx + device.io_addr], REG_9346CR
|
|
mov eax, REG_9346CR_WE
|
|
out dx, al
|
|
|
|
; write the mac ...
|
|
set_io [ebx + device.io_addr], REG_IDR0
|
|
pop eax
|
|
out dx, eax
|
|
|
|
set_io [ebx + device.io_addr], REG_IDR0+4
|
|
xor eax, eax
|
|
pop ax
|
|
out dx, eax
|
|
|
|
; disable writing
|
|
set_io [ebx + device.io_addr], REG_9346CR
|
|
xor eax, eax
|
|
out dx, al
|
|
|
|
DEBUGF 1, "MAC write ok!\n"
|
|
|
|
; Notice this procedure does not ret, but continues to read_mac instead.
|
|
|
|
|
|
;;;;;;;;;;;;;;;;;;;;;;
|
|
;; ;;
|
|
;; Read MAC address ;;
|
|
;; ;;
|
|
;;;;;;;;;;;;;;;;;;;;;;
|
|
|
|
read_mac:
|
|
DEBUGF 1, "Reading MAC:\n"
|
|
|
|
set_io [ebx + device.io_addr], 0
|
|
lea edi, [ebx + device.mac]
|
|
in eax, dx
|
|
stosd
|
|
add edx, 4
|
|
in ax, dx
|
|
stosw
|
|
|
|
DEBUGF 1, "%x-%x-%x-%x-%x-%x\n",[edi-6]:2,[edi-5]:2,[edi-4]:2,[edi-3]:2,[edi-2]:2,[edi-1]:2
|
|
|
|
ret
|
|
|
|
|
|
; End of code
|
|
|
|
data fixups
|
|
end data
|
|
|
|
include '../peimport.inc'
|
|
|
|
my_service db 'RTL8139',0 ; max 16 chars include zero
|
|
|
|
sz_unknown db 'Unknown RTL8139 clone', 0
|
|
sz_RTL8139 db 'Realtek 8139',0
|
|
sz_RTL8139_K db 'Realtek 8139 rev K',0
|
|
sz_RTL8139A db 'Realtek 8139A',0
|
|
sz_RTL8139A_G db 'Realtek 8139A rev G',0
|
|
sz_RTL8139B db 'Realtek 8139B',0
|
|
sz_RTL8130 db 'Realtek 8130',0
|
|
sz_RTL8139C db 'Realtek 8139C',0
|
|
sz_RTL8100 db 'Realtek 8100',0
|
|
sz_RTL8100_8139D db 'Realtek 8100B / 8139D',0
|
|
sz_RTL8139CP db 'Realtek 8139CP', 0
|
|
sz_RTL8101 db 'Realtek 8101',0
|
|
|
|
hw_ver_names:
|
|
dd sz_unknown
|
|
dd sz_RTL8139
|
|
dd sz_RTL8139_K
|
|
dd sz_RTL8139A
|
|
dd sz_RTL8139A_G
|
|
dd sz_RTL8139B
|
|
dd sz_RTL8130
|
|
dd sz_RTL8139C
|
|
dd sz_RTL8100
|
|
dd sz_RTL8100_8139D
|
|
dd sz_RTL8139CP
|
|
dd sz_RTL8101
|
|
|
|
hw_ver_array: ; This array is used by the probe routine to find out wich version of the RTL8139 we are working with
|
|
db 0
|
|
db VER_RTL8139
|
|
db VER_RTL8139_K
|
|
db VER_RTL8139A
|
|
db VER_RTL8139A_G
|
|
db VER_RTL8139B
|
|
db VER_RTL8130
|
|
db VER_RTL8139C
|
|
db VER_RTL8100
|
|
db VER_RTL8100_8139D
|
|
db VER_RTL8139CP
|
|
db VER_RTL8101
|
|
|
|
include_debug_strings ; All data wich FDO uses will be included here
|
|
|
|
align 4
|
|
devices dd 0
|
|
device_list rd MAX_DEVICES ; This list contains all pointers to device structures the driver is handling
|
|
|