forked from KolibriOS/kolibrios
621 lines
17 KiB
ArmAsm
621 lines
17 KiB
ArmAsm
/*
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* Simple IDCT
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*
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* Copyright (c) 2001 Michael Niedermayer <michaelni@gmx.at>
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* Copyright (c) 2006 Mans Rullgard <mans@mansr.com>
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "libavutil/arm/asm.S"
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#define W1 22725 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */
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#define W2 21407 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */
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#define W3 19266 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */
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#define W4 16383 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */
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#define W5 12873 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */
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#define W6 8867 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */
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#define W7 4520 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */
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#define ROW_SHIFT 11
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#define COL_SHIFT 20
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#define W13 (W1 | (W3 << 16))
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#define W26 (W2 | (W6 << 16))
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#define W57 (W5 | (W7 << 16))
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function idct_row_armv5te
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str lr, [sp, #-4]!
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ldrd v1, v2, [a1, #8]
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ldrd a3, a4, [a1] /* a3 = row[1:0], a4 = row[3:2] */
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orrs v1, v1, v2
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itt eq
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cmpeq v1, a4
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cmpeq v1, a3, lsr #16
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beq row_dc_only
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mov v1, #(1<<(ROW_SHIFT-1))
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mov ip, #16384
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sub ip, ip, #1 /* ip = W4 */
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smlabb v1, ip, a3, v1 /* v1 = W4*row[0]+(1<<(RS-1)) */
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ldr ip, =W26 /* ip = W2 | (W6 << 16) */
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smultb a2, ip, a4
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smulbb lr, ip, a4
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add v2, v1, a2
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sub v3, v1, a2
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sub v4, v1, lr
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add v1, v1, lr
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ldr ip, =W13 /* ip = W1 | (W3 << 16) */
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ldr lr, =W57 /* lr = W5 | (W7 << 16) */
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smulbt v5, ip, a3
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smultt v6, lr, a4
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smlatt v5, ip, a4, v5
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smultt a2, ip, a3
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smulbt v7, lr, a3
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sub v6, v6, a2
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smulbt a2, ip, a4
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smultt fp, lr, a3
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sub v7, v7, a2
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smulbt a2, lr, a4
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ldrd a3, a4, [a1, #8] /* a3=row[5:4] a4=row[7:6] */
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sub fp, fp, a2
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orrs a2, a3, a4
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beq 1f
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smlabt v5, lr, a3, v5
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smlabt v6, ip, a3, v6
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smlatt v5, lr, a4, v5
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smlabt v6, lr, a4, v6
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smlatt v7, lr, a3, v7
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smlatt fp, ip, a3, fp
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smulbt a2, ip, a4
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smlatt v7, ip, a4, v7
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sub fp, fp, a2
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ldr ip, =W26 /* ip = W2 | (W6 << 16) */
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mov a2, #16384
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sub a2, a2, #1 /* a2 = W4 */
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smulbb a2, a2, a3 /* a2 = W4*row[4] */
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smultb lr, ip, a4 /* lr = W6*row[6] */
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add v1, v1, a2 /* v1 += W4*row[4] */
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add v1, v1, lr /* v1 += W6*row[6] */
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add v4, v4, a2 /* v4 += W4*row[4] */
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sub v4, v4, lr /* v4 -= W6*row[6] */
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smulbb lr, ip, a4 /* lr = W2*row[6] */
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sub v2, v2, a2 /* v2 -= W4*row[4] */
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sub v2, v2, lr /* v2 -= W2*row[6] */
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sub v3, v3, a2 /* v3 -= W4*row[4] */
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add v3, v3, lr /* v3 += W2*row[6] */
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1: add a2, v1, v5
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mov a3, a2, lsr #11
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bic a3, a3, #0x1f0000
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sub a2, v2, v6
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mov a2, a2, lsr #11
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add a3, a3, a2, lsl #16
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add a2, v3, v7
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mov a4, a2, lsr #11
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bic a4, a4, #0x1f0000
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add a2, v4, fp
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mov a2, a2, lsr #11
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add a4, a4, a2, lsl #16
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strd a3, a4, [a1]
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sub a2, v4, fp
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mov a3, a2, lsr #11
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bic a3, a3, #0x1f0000
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sub a2, v3, v7
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mov a2, a2, lsr #11
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add a3, a3, a2, lsl #16
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add a2, v2, v6
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mov a4, a2, lsr #11
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bic a4, a4, #0x1f0000
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sub a2, v1, v5
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mov a2, a2, lsr #11
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add a4, a4, a2, lsl #16
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strd a3, a4, [a1, #8]
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ldr pc, [sp], #4
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row_dc_only:
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orr a3, a3, a3, lsl #16
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bic a3, a3, #0xe000
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mov a3, a3, lsl #3
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mov a4, a3
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strd a3, a4, [a1]
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strd a3, a4, [a1, #8]
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ldr pc, [sp], #4
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endfunc
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.macro idct_col
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ldr a4, [a1] /* a4 = col[1:0] */
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mov ip, #16384
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sub ip, ip, #1 /* ip = W4 */
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#if 0
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mov v1, #(1<<(COL_SHIFT-1))
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smlabt v2, ip, a4, v1 /* v2 = W4*col[1] + (1<<(COL_SHIFT-1)) */
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smlabb v1, ip, a4, v1 /* v1 = W4*col[0] + (1<<(COL_SHIFT-1)) */
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ldr a4, [a1, #(16*4)]
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#else
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mov v1, #((1<<(COL_SHIFT-1))/W4) /* this matches the C version */
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add v2, v1, a4, asr #16
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rsb v2, v2, v2, lsl #14
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mov a4, a4, lsl #16
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add v1, v1, a4, asr #16
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ldr a4, [a1, #(16*4)]
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rsb v1, v1, v1, lsl #14
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#endif
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smulbb lr, ip, a4
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smulbt a3, ip, a4
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sub v3, v1, lr
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sub v5, v1, lr
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add v7, v1, lr
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add v1, v1, lr
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sub v4, v2, a3
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sub v6, v2, a3
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add fp, v2, a3
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ldr ip, =W26
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ldr a4, [a1, #(16*2)]
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add v2, v2, a3
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smulbb lr, ip, a4
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smultb a3, ip, a4
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add v1, v1, lr
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sub v7, v7, lr
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add v3, v3, a3
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sub v5, v5, a3
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smulbt lr, ip, a4
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smultt a3, ip, a4
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add v2, v2, lr
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sub fp, fp, lr
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add v4, v4, a3
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ldr a4, [a1, #(16*6)]
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sub v6, v6, a3
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smultb lr, ip, a4
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smulbb a3, ip, a4
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add v1, v1, lr
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sub v7, v7, lr
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sub v3, v3, a3
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add v5, v5, a3
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smultt lr, ip, a4
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smulbt a3, ip, a4
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add v2, v2, lr
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sub fp, fp, lr
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sub v4, v4, a3
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add v6, v6, a3
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stmfd sp!, {v1, v2, v3, v4, v5, v6, v7, fp}
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ldr ip, =W13
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ldr a4, [a1, #(16*1)]
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ldr lr, =W57
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smulbb v1, ip, a4
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smultb v3, ip, a4
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smulbb v5, lr, a4
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smultb v7, lr, a4
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smulbt v2, ip, a4
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smultt v4, ip, a4
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smulbt v6, lr, a4
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smultt fp, lr, a4
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rsb v4, v4, #0
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ldr a4, [a1, #(16*3)]
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rsb v3, v3, #0
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smlatb v1, ip, a4, v1
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smlatb v3, lr, a4, v3
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smulbb a3, ip, a4
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smulbb a2, lr, a4
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sub v5, v5, a3
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sub v7, v7, a2
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smlatt v2, ip, a4, v2
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smlatt v4, lr, a4, v4
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smulbt a3, ip, a4
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smulbt a2, lr, a4
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sub v6, v6, a3
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ldr a4, [a1, #(16*5)]
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sub fp, fp, a2
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smlabb v1, lr, a4, v1
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smlabb v3, ip, a4, v3
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smlatb v5, lr, a4, v5
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smlatb v7, ip, a4, v7
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smlabt v2, lr, a4, v2
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smlabt v4, ip, a4, v4
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smlatt v6, lr, a4, v6
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ldr a3, [a1, #(16*7)]
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smlatt fp, ip, a4, fp
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smlatb v1, lr, a3, v1
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smlabb v3, lr, a3, v3
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smlatb v5, ip, a3, v5
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smulbb a4, ip, a3
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smlatt v2, lr, a3, v2
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sub v7, v7, a4
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smlabt v4, lr, a3, v4
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smulbt a4, ip, a3
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smlatt v6, ip, a3, v6
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sub fp, fp, a4
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.endm
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function idct_col_armv5te
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str lr, [sp, #-4]!
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idct_col
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ldmfd sp!, {a3, a4}
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adds a2, a3, v1
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mov a2, a2, lsr #20
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it mi
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orrmi a2, a2, #0xf000
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add ip, a4, v2
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mov ip, ip, asr #20
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orr a2, a2, ip, lsl #16
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str a2, [a1]
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subs a3, a3, v1
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mov a2, a3, lsr #20
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it mi
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orrmi a2, a2, #0xf000
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sub a4, a4, v2
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mov a4, a4, asr #20
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orr a2, a2, a4, lsl #16
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ldmfd sp!, {a3, a4}
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str a2, [a1, #(16*7)]
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subs a2, a3, v3
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mov a2, a2, lsr #20
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it mi
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orrmi a2, a2, #0xf000
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sub ip, a4, v4
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mov ip, ip, asr #20
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orr a2, a2, ip, lsl #16
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str a2, [a1, #(16*1)]
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adds a3, a3, v3
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mov a2, a3, lsr #20
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it mi
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orrmi a2, a2, #0xf000
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add a4, a4, v4
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mov a4, a4, asr #20
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orr a2, a2, a4, lsl #16
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ldmfd sp!, {a3, a4}
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str a2, [a1, #(16*6)]
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adds a2, a3, v5
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mov a2, a2, lsr #20
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it mi
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orrmi a2, a2, #0xf000
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add ip, a4, v6
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mov ip, ip, asr #20
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orr a2, a2, ip, lsl #16
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str a2, [a1, #(16*2)]
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subs a3, a3, v5
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mov a2, a3, lsr #20
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it mi
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orrmi a2, a2, #0xf000
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sub a4, a4, v6
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mov a4, a4, asr #20
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orr a2, a2, a4, lsl #16
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ldmfd sp!, {a3, a4}
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str a2, [a1, #(16*5)]
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adds a2, a3, v7
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mov a2, a2, lsr #20
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it mi
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orrmi a2, a2, #0xf000
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add ip, a4, fp
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mov ip, ip, asr #20
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orr a2, a2, ip, lsl #16
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str a2, [a1, #(16*3)]
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subs a3, a3, v7
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mov a2, a3, lsr #20
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it mi
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orrmi a2, a2, #0xf000
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sub a4, a4, fp
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mov a4, a4, asr #20
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orr a2, a2, a4, lsl #16
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str a2, [a1, #(16*4)]
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ldr pc, [sp], #4
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endfunc
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.macro clip dst, src:vararg
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movs \dst, \src
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it mi
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movmi \dst, #0
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cmp \dst, #255
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it gt
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movgt \dst, #255
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.endm
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.macro aclip dst, src:vararg
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adds \dst, \src
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it mi
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movmi \dst, #0
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cmp \dst, #255
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it gt
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movgt \dst, #255
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.endm
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function idct_col_put_armv5te
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str lr, [sp, #-4]!
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idct_col
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ldmfd sp!, {a3, a4}
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ldr lr, [sp, #32]
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add a2, a3, v1
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clip a2, a2, asr #20
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add ip, a4, v2
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clip ip, ip, asr #20
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orr a2, a2, ip, lsl #8
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sub a3, a3, v1
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clip a3, a3, asr #20
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sub a4, a4, v2
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clip a4, a4, asr #20
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ldr v1, [sp, #28]
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strh a2, [v1]
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add a2, v1, #2
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str a2, [sp, #28]
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orr a2, a3, a4, lsl #8
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rsb v2, lr, lr, lsl #3
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ldmfd sp!, {a3, a4}
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strh_pre a2, v2, v1
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sub a2, a3, v3
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clip a2, a2, asr #20
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sub ip, a4, v4
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clip ip, ip, asr #20
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orr a2, a2, ip, lsl #8
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strh_pre a2, v1, lr
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add a3, a3, v3
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clip a2, a3, asr #20
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add a4, a4, v4
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clip a4, a4, asr #20
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orr a2, a2, a4, lsl #8
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ldmfd sp!, {a3, a4}
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strh_dpre a2, v2, lr
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add a2, a3, v5
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clip a2, a2, asr #20
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add ip, a4, v6
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clip ip, ip, asr #20
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orr a2, a2, ip, lsl #8
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strh_pre a2, v1, lr
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sub a3, a3, v5
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clip a2, a3, asr #20
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sub a4, a4, v6
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clip a4, a4, asr #20
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orr a2, a2, a4, lsl #8
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ldmfd sp!, {a3, a4}
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strh_dpre a2, v2, lr
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add a2, a3, v7
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clip a2, a2, asr #20
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add ip, a4, fp
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clip ip, ip, asr #20
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orr a2, a2, ip, lsl #8
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strh a2, [v1, lr]
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sub a3, a3, v7
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clip a2, a3, asr #20
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sub a4, a4, fp
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clip a4, a4, asr #20
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orr a2, a2, a4, lsl #8
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strh_dpre a2, v2, lr
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ldr pc, [sp], #4
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endfunc
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function idct_col_add_armv5te
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str lr, [sp, #-4]!
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idct_col
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ldr lr, [sp, #36]
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ldmfd sp!, {a3, a4}
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ldrh ip, [lr]
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add a2, a3, v1
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sub a3, a3, v1
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and v1, ip, #255
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aclip a2, v1, a2, asr #20
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add v1, a4, v2
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mov v1, v1, asr #20
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aclip v1, v1, ip, lsr #8
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orr a2, a2, v1, lsl #8
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ldr v1, [sp, #32]
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sub a4, a4, v2
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rsb v2, v1, v1, lsl #3
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ldrh_pre ip, v2, lr
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strh a2, [lr]
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and a2, ip, #255
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aclip a3, a2, a3, asr #20
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mov a4, a4, asr #20
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aclip a4, a4, ip, lsr #8
|
|
add a2, lr, #2
|
|
str a2, [sp, #28]
|
|
orr a2, a3, a4, lsl #8
|
|
strh a2, [v2]
|
|
|
|
ldmfd sp!, {a3, a4}
|
|
ldrh_pre ip, lr, v1
|
|
sub a2, a3, v3
|
|
add a3, a3, v3
|
|
and v3, ip, #255
|
|
aclip a2, v3, a2, asr #20
|
|
sub v3, a4, v4
|
|
mov v3, v3, asr #20
|
|
aclip v3, v3, ip, lsr #8
|
|
orr a2, a2, v3, lsl #8
|
|
add a4, a4, v4
|
|
ldrh_dpre ip, v2, v1
|
|
strh a2, [lr]
|
|
and a2, ip, #255
|
|
aclip a3, a2, a3, asr #20
|
|
mov a4, a4, asr #20
|
|
aclip a4, a4, ip, lsr #8
|
|
orr a2, a3, a4, lsl #8
|
|
strh a2, [v2]
|
|
|
|
ldmfd sp!, {a3, a4}
|
|
ldrh_pre ip, lr, v1
|
|
add a2, a3, v5
|
|
sub a3, a3, v5
|
|
and v3, ip, #255
|
|
aclip a2, v3, a2, asr #20
|
|
add v3, a4, v6
|
|
mov v3, v3, asr #20
|
|
aclip v3, v3, ip, lsr #8
|
|
orr a2, a2, v3, lsl #8
|
|
sub a4, a4, v6
|
|
ldrh_dpre ip, v2, v1
|
|
strh a2, [lr]
|
|
and a2, ip, #255
|
|
aclip a3, a2, a3, asr #20
|
|
mov a4, a4, asr #20
|
|
aclip a4, a4, ip, lsr #8
|
|
orr a2, a3, a4, lsl #8
|
|
strh a2, [v2]
|
|
|
|
ldmfd sp!, {a3, a4}
|
|
ldrh_pre ip, lr, v1
|
|
add a2, a3, v7
|
|
sub a3, a3, v7
|
|
and v3, ip, #255
|
|
aclip a2, v3, a2, asr #20
|
|
add v3, a4, fp
|
|
mov v3, v3, asr #20
|
|
aclip v3, v3, ip, lsr #8
|
|
orr a2, a2, v3, lsl #8
|
|
sub a4, a4, fp
|
|
ldrh_dpre ip, v2, v1
|
|
strh a2, [lr]
|
|
and a2, ip, #255
|
|
aclip a3, a2, a3, asr #20
|
|
mov a4, a4, asr #20
|
|
aclip a4, a4, ip, lsr #8
|
|
orr a2, a3, a4, lsl #8
|
|
strh a2, [v2]
|
|
|
|
ldr pc, [sp], #4
|
|
endfunc
|
|
|
|
function ff_simple_idct_armv5te, export=1
|
|
stmfd sp!, {v1, v2, v3, v4, v5, v6, v7, fp, lr}
|
|
|
|
bl idct_row_armv5te
|
|
add a1, a1, #16
|
|
bl idct_row_armv5te
|
|
add a1, a1, #16
|
|
bl idct_row_armv5te
|
|
add a1, a1, #16
|
|
bl idct_row_armv5te
|
|
add a1, a1, #16
|
|
bl idct_row_armv5te
|
|
add a1, a1, #16
|
|
bl idct_row_armv5te
|
|
add a1, a1, #16
|
|
bl idct_row_armv5te
|
|
add a1, a1, #16
|
|
bl idct_row_armv5te
|
|
|
|
sub a1, a1, #(16*7)
|
|
|
|
bl idct_col_armv5te
|
|
add a1, a1, #4
|
|
bl idct_col_armv5te
|
|
add a1, a1, #4
|
|
bl idct_col_armv5te
|
|
add a1, a1, #4
|
|
bl idct_col_armv5te
|
|
|
|
ldmfd sp!, {v1, v2, v3, v4, v5, v6, v7, fp, pc}
|
|
endfunc
|
|
|
|
function ff_simple_idct_add_armv5te, export=1
|
|
stmfd sp!, {a1, a2, v1, v2, v3, v4, v5, v6, v7, fp, lr}
|
|
|
|
mov a1, a3
|
|
|
|
bl idct_row_armv5te
|
|
add a1, a1, #16
|
|
bl idct_row_armv5te
|
|
add a1, a1, #16
|
|
bl idct_row_armv5te
|
|
add a1, a1, #16
|
|
bl idct_row_armv5te
|
|
add a1, a1, #16
|
|
bl idct_row_armv5te
|
|
add a1, a1, #16
|
|
bl idct_row_armv5te
|
|
add a1, a1, #16
|
|
bl idct_row_armv5te
|
|
add a1, a1, #16
|
|
bl idct_row_armv5te
|
|
|
|
sub a1, a1, #(16*7)
|
|
|
|
bl idct_col_add_armv5te
|
|
add a1, a1, #4
|
|
bl idct_col_add_armv5te
|
|
add a1, a1, #4
|
|
bl idct_col_add_armv5te
|
|
add a1, a1, #4
|
|
bl idct_col_add_armv5te
|
|
|
|
add sp, sp, #8
|
|
ldmfd sp!, {v1, v2, v3, v4, v5, v6, v7, fp, pc}
|
|
endfunc
|
|
|
|
function ff_simple_idct_put_armv5te, export=1
|
|
stmfd sp!, {a1, a2, v1, v2, v3, v4, v5, v6, v7, fp, lr}
|
|
|
|
mov a1, a3
|
|
|
|
bl idct_row_armv5te
|
|
add a1, a1, #16
|
|
bl idct_row_armv5te
|
|
add a1, a1, #16
|
|
bl idct_row_armv5te
|
|
add a1, a1, #16
|
|
bl idct_row_armv5te
|
|
add a1, a1, #16
|
|
bl idct_row_armv5te
|
|
add a1, a1, #16
|
|
bl idct_row_armv5te
|
|
add a1, a1, #16
|
|
bl idct_row_armv5te
|
|
add a1, a1, #16
|
|
bl idct_row_armv5te
|
|
|
|
sub a1, a1, #(16*7)
|
|
|
|
bl idct_col_put_armv5te
|
|
add a1, a1, #4
|
|
bl idct_col_put_armv5te
|
|
add a1, a1, #4
|
|
bl idct_col_put_armv5te
|
|
add a1, a1, #4
|
|
bl idct_col_put_armv5te
|
|
|
|
add sp, sp, #8
|
|
ldmfd sp!, {v1, v2, v3, v4, v5, v6, v7, fp, pc}
|
|
endfunc
|