forked from KolibriOS/kolibrios
1382 lines
28 KiB
NASM
1382 lines
28 KiB
NASM
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;alpha version
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format MS COFF
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include 'proc32.inc'
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DEBUG equ 1
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REMAP_IRQ equ 0
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;irq 0,1,2,8,12,13 íåäîñòóïíû
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; FEDCBA9876543210
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VALID_IRQ equ 1100111011111000b
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ATTCH_IRQ equ 0000111010101000b
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IRQ_LINE equ 0
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CPU_FREQ equ 2600d
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BIT0 EQU 0x00000001
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BIT1 EQU 0x00000002
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BIT2 EQU 0x00000004
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BIT3 EQU 0x00000008
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BIT4 EQU 0x00000010
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BIT5 EQU 0x00000020
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BIT6 EQU 0x00000040
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BIT7 EQU 0x00000080
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BIT8 EQU 0x00000100
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BIT9 EQU 0x00000200
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BIT10 EQU 0x00000400
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BIT11 EQU 0x00000800
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BIT12 EQU 0x00001000
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BIT13 EQU 0x00002000
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BIT14 EQU 0x00004000
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BIT15 EQU 0x00008000
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BIT16 EQU 0x00010000
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BIT17 EQU 0x00020000
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BIT18 EQU 0x00040000
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BIT19 EQU 0x00080000
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BIT20 EQU 0x00100000
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BIT21 EQU 0x00200000
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BIT22 EQU 0x00400000
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BIT23 EQU 0x00800000
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BIT24 EQU 0x00100000
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BIT25 EQU 0x02000000
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BIT26 EQU 0x04000000
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BIT27 EQU 0x08000000
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BIT28 EQU 0x10000000
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BIT29 EQU 0x20000000
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BIT30 EQU 0x40000000
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BIT31 EQU 0x80000000
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VID_INTEL equ 0x8086
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VID_NVIDIA equ 0x10DE
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CTRL_ICH equ 0x2415
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CTRL_ICH0 equ 0x2425
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CTRL_ICH2 equ 0x2435
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CTRL_ICH3 equ 0x2445
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CTRL_ICH4 equ 0x24C5
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CTRL_ICH5 equ 0x24D5
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CTRL_ICH6 equ 0x266E
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CTRL_ICH7 equ 0x27DE
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CTRL_NFORCE equ 0x01B1
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CTRL_NFORCE2 equ 0x006A
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CTRL_NFORCE3 equ 0x00DA
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PCM_OUT_BDL equ 0x10 ; PCM out buffer descriptors list
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PCM_OUT_CR_REG equ 0x1b ; PCM out Control Register
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PCM_OUT_LVI_REG equ 0x15 ; PCM last valid index
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PCM_OUT_SR_REG equ 0x16 ; PCM out Status register
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PCM_OUT_PIV_REG equ 0x1a
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PCM_OUT_CIV_REG equ 0x14 ; PCM out current index
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PCM_IN_CR_REG equ 0x0b ; PCM in Control Register
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MC_IN_CR_REG equ 0x2b ; MIC in Control Register
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RR equ BIT1 ; reset registers. Nukes all regs
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CODEC_MASTER_VOL_REG equ 0x02
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CODEC_AUX_VOL equ 0x04 ;
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CODEC_PCM_OUT_REG equ 18h ; PCM output volume
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CODEC_EXT_AUDIO_REG equ 28h ; extended audio
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CODEC_EXT_AUDIO_CTRL_REG equ 2ah ; extended audio control
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CODEC_PCM_FRONT_DACRATE_REG equ 2ch ; PCM out sample rate
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CODEC_PCM_SURND_DACRATE_REG equ 2eh ; surround sound sample rate
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CODEC_PCM_LFE_DACRATE_REG equ 30h ; LFE sample rate
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GLOB_CTRL equ 0x2C ; Global Control
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CTRL_STAT equ 0x30 ; Global Status
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CTRL_CAS equ 0x34 ; Codec Access Semiphore
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CAS_FLAG equ 0x01 ; Codec Access Semiphore Bit
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CTRL_ST_CREADY equ BIT8+BIT9+BIT28 ; Primary Codec Ready
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CTRL_ST_RCS equ 0x00008000 ; Read Completion Status
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CTRL_CNT_CRIE equ BIT4+BIT5+BIT6 ; Codecs Resume Interrupt Enable
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CTRL_CNT_AC_OFF equ 0x00000008 ; ACLINK Off
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CTRL_CNT_WARM equ 0x00000004 ; AC97 Warm Reset
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CTRL_CNT_COLD equ 0x00000002 ; AC97 Cold Reset
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CTRL_CNT_GIE equ 0x00000001 ; GPI Interrupt Enable
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CODEC_REG_POWERDOWN equ 0x26
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CODEC_REG_ST equ 0x26
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DEV_PLAY equ 1
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DEV_STOP equ 2
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DEV_CALLBACK equ 3
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DEV_SET_BUFF equ 4
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DEV_NOTIFY equ 5
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DEV_SET_MASTERVOL equ 6
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DEV_GET_MASTERVOL equ 7
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DEV_GET_INFO equ 8
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struc AC_CNTRL ;AC controller base class
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{ .bus dd ?
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.devfn dd ?
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.vendor dd ?
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.dev_id dd ?
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.pci_cmd dd ?
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.pci_stat dd ?
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.codec_io_base dd ?
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.codec_mem_base dd ?
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.ctrl_io_base dd ?
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.ctrl_mem_base dd ?
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.cfg_reg dd ?
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.int_line dd ?
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.vendor_ids dd ? ;vendor id string
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.ctrl_ids dd ? ;hub id string
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.buffer dd ?
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.notify_pos dd ?
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.notify_task dd ?
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.lvi_reg dd ?
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.ctrl_setup dd ?
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.user_callback dd ?
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.codec_read16 dd ?
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.codec_write16 dd ?
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.ctrl_read8 dd ?
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.ctrl_read16 dd ?
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.ctrl_read32 dd ?
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.ctrl_write8 dd ?
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.ctrl_write16 dd ?
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.ctrl_write32 dd ?
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}
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struc CODEC ;Audio Chip base class
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{
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.chip_id dd ?
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.flags dd ?
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.status dd ?
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.ac_vendor_ids dd ? ;ac vendor id string
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.chip_ids dd ? ;chip model string
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.shadow_flag dd ?
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dd ?
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.regs dw ? ; codec registers
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.reg_master_vol dw ? ;0x02
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.reg_aux_out_vol dw ? ;0x04
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.reg_mone_vol dw ? ;0x06
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.reg_master_tone dw ? ;0x08
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.reg_beep_vol dw ? ;0x0A
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.reg_phone_vol dw ? ;0x0C
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.reg_mic_vol dw ? ;0x0E
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.reg_line_in_vol dw ? ;0x10
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.reg_cd_vol dw ? ;0x12
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.reg_video_vol dw ? ;0x14
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.reg_aux_in_vol dw ? ;0x16
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.reg_pcm_out_vol dw ? ;0x18
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.reg_rec_select dw ? ;0x1A
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.reg_rec_gain dw ? ;0x1C
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.reg_rec_gain_mic dw ? ;0x1E
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.reg_gen dw ? ;0x20
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.reg_3d_ctrl dw ? ;0X22
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.reg_page dw ? ;0X24
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.reg_powerdown dw ? ;0x26
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.reg_ext_audio dw ? ;0x28
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.reg_ext_st dw ? ;0x2a
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.reg_pcm_front_rate dw ? ;0x2c
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.reg_pcm_surr_rate dw ? ;0x2e
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.reg_lfe_rate dw ? ;0x30
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.reg_pcm_in_rate dw ? ;0x32
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dw ? ;0x34
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.reg_cent_lfe_vol dw ? ;0x36
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.reg_surr_vol dw ? ;0x38
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.reg_spdif_ctrl dw ? ;0x3A
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dw ? ;0x3C
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dw ? ;0x3E
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dw ? ;0x40
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dw ? ;0x42
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dw ? ;0x44
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dw ? ;0x46
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dw ? ;0x48
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dw ? ;0x4A
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dw ? ;0x4C
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dw ? ;0x4E
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dw ? ;0x50
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dw ? ;0x52
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dw ? ;0x54
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dw ? ;0x56
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dw ? ;0x58
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dw ? ;0x5A
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dw ? ;0x5C
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dw ? ;0x5E
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.reg_page_0 dw ? ;0x60
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.reg_page_1 dw ? ;0x62
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.reg_page_2 dw ? ;0x64
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.reg_page_3 dw ? ;0x66
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.reg_page_4 dw ? ;0x68
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.reg_page_5 dw ? ;0x6A
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.reg_page_6 dw ? ;0x6C
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.reg_page_7 dw ? ;0x6E
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dw ? ;0x70
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dw ? ;0x72
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dw ? ;0x74
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dw ? ;0x76
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dw ? ;0x78
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dw ? ;0x7A
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.reg_vendor_id_1 dw ? ;0x7C
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.reg_vendor_id_2 dw ? ;0x7E
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.reset dd ? ;virual
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.set_master_vol dd ?
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}
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struc CTRL_INFO
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{ .pci_cmd dd ?
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.irq dd ?
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.glob_cntrl dd ?
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.glob_sta dd ?
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.codec_io_base dd ?
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.ctrl_io_base dd ?
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.codec_mem_base dd ?
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.ctrl_mem_base dd ?
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.codec_id dd ?
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}
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struc IOCTL
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{ .handle dd ?
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.io_code dd ?
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.input dd ?
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.inp_size dd ?
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.output dd ?
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.out_size dd ?
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}
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virtual at 0
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IOCTL IOCTL
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end virtual
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EVENT_NOTIFY equ 0x00000200
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OS_BASE equ 0; 0x80400000
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new_app_base equ 0x60400000; 0x01000000
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PROC_BASE equ OS_BASE+0x0080000
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public START
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public STOP
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public service_proc
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extrn AttachIntHandler
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extrn SysMsgBoardStr
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extrn PciApi
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extrn PciRead32
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extrn PciRead8
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extrn PciWrite8
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extrn AllocKernelSpace
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extrn MapPage
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extrn RegService
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extrn KernelAlloc
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extrn GetPgAddr
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extrn GetCurrentTask
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section '.flat' code readable align 16
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START:
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if DEBUG
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mov esi, msgInit
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call SysMsgBoardStr
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end if
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call detect_controller
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test eax, eax
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jz .fail
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if DEBUG
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mov esi,[ctrl.vendor_ids]
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call SysMsgBoardStr
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mov esi, [ctrl.ctrl_ids]
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call SysMsgBoardStr
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end if
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call init_controller
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test eax, eax
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jz .fail
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if DEBUG
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mov esi, msgInitCodec
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call SysMsgBoardStr
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end if
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call init_codec
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test eax, eax
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jz .fail
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if DEBUG
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mov esi, [codec.ac_vendor_ids]
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call SysMsgBoardStr
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mov esi, [codec.chip_ids]
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call SysMsgBoardStr
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end if
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call reset_controller
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call setup_codec
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mov esi, msgPrimBuff
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call SysMsgBoardStr
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call create_primary_buff
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; if REMAP_IRQ
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; call get_LPC_bus
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; cmp eax, -1
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; jz .fail
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; mov [lpc_bus], 0 ;eax
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; call remap_irq
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; end if
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mov eax, VALID_IRQ
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mov ebx, [ctrl.int_line]
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mov esi, msgInvIRQ
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bt eax, ebx
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jnc .fail
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mov eax, ATTCH_IRQ
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mov esi, msgAttchIRQ
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bt eax, ebx
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jnc .fail
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stdcall AttachIntHandler, ebx, ac97_irq
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stdcall RegService, sz_sound_srv, service_proc
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ret
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.fail:
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if DEBUG
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mov esi, msgFail
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call SysMsgBoardStr
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end if
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xor eax, eax
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STOP:
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ret
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handle equ IOCTL.handle
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io_code equ IOCTL.io_code
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input equ IOCTL.input
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inp_size equ IOCTL.inp_size
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output equ IOCTL.output
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out_size equ IOCTL.out_size
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align 4
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proc service_proc stdcall, ioctl:dword
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mov edi, [ioctl]
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mov eax, [edi+io_code]
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cmp eax, DEV_PLAY
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jne @F
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if DEBUG
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mov esi, msgPlay
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call SysMsgBoardStr
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end if
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call play
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ret
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@@:
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cmp eax, DEV_STOP
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jne @F
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if DEBUG
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mov esi, msgStop
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call SysMsgBoardStr
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end if
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call stop
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ret
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@@:
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cmp eax, DEV_CALLBACK
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jne @F
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mov ebx, [edi+input]
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stdcall set_callback, [ebx]
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ret
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@@:
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cmp eax, DEV_SET_MASTERVOL
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jne @F
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mov ebx, [edi+input]
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stdcall set_master_vol, [ebx]
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ret
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@@:
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cmp eax, DEV_GET_MASTERVOL
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jne @F
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mov ebx, [edi+output]
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test ebx, ebx
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jz .fail
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stdcall get_master_vol, ebx
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ret
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@@:
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cmp eax, DEV_GET_INFO
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jne @F
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mov ebx, [edi+output]
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stdcall get_dev_info, ebx
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ret
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@@:
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.fail:
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xor eax, eax
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ret
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endp
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restore handle
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restore io_code
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restore input
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restore inp_size
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restore output
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restore out_size
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align 4
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proc remap_irq ;for Intel chipsets ONLY !!!
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mov eax, VALID_IRQ
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bt eax, IRQ_LINE
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jnc .exit
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mov edx, 0x4D0
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in ax,dx
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bts ax, IRQ_LINE
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out dx, aX
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stdcall PciWrite8, dword 0, dword 0xF8, dword 0x61, dword IRQ_LINE
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mov [ctrl.int_line], IRQ_LINE
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.exit:
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ret
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endp
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align 4
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proc ac97_irq
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; if DEBUG
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; mov esi, msgIRQ
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; call SysMsgBoardStr
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; end if
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mov edx, PCM_OUT_CR_REG
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mov al, 0x14
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call [ctrl.ctrl_write8]
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mov ax, 0x1c
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mov edx, PCM_OUT_SR_REG
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call [ctrl.ctrl_write16]
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mov edx, PCM_OUT_CIV_REG
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call [ctrl.ctrl_read8]
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and eax, 0x1F
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cmp eax, [civ_val]
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je .skip
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mov [civ_val], eax
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dec eax
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and eax, 0x1F
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mov [ctrl.lvi_reg], eax
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mov edx, PCM_OUT_LVI_REG
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call [ctrl.ctrl_write8]
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mov edx, PCM_OUT_CR_REG
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mov ax, 0x1D
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call [ctrl.ctrl_write8]
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mov eax, [civ_val]
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add eax, 2
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and eax, 31
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mov ebx, dword [buff_list+eax*4]
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cmp [ctrl.user_callback], 0
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je @f
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stdcall [ctrl.user_callback], ebx
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@@:
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ret
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.skip:
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mov edx, PCM_OUT_CR_REG
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mov ax, 0x1D
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call [ctrl.ctrl_write8]
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ret
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endp
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align 4
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proc create_primary_buff
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stdcall KernelAlloc, 0x10000
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mov [ctrl.buffer], eax
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mov edi, eax
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mov ecx, 0x10000/4
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xor eax, eax
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cld
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rep stosd
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stdcall GetPgAddr, [ctrl.buffer]
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mov ebx, 0xC0002000
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mov ecx, 4
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mov edi, pcmout_bdl
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@@:
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mov [edi], eax
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mov [edi+4], ebx
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mov [edi+32], eax
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mov [edi+4+32], ebx
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mov [edi+64], eax
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mov [edi+4+64], ebx
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mov [edi+96], eax
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mov [edi+4+96], ebx
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mov [edi+128], eax
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mov [edi+4+128], ebx
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mov [edi+160], eax
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mov [edi+4+160], ebx
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mov [edi+192], eax
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mov [edi+4+192], ebx
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mov [edi+224], eax
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mov [edi+4+224], ebx
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add eax, 0x4000
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add edi, 8
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loop @B
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mov edi, buff_list
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mov eax, [ctrl.buffer]
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mov ecx, 4
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@@:
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mov [edi], eax
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mov [edi+16], eax
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mov [edi+32], eax
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mov [edi+48], eax
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mov [edi+64], eax
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mov [edi+80], eax
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mov [edi+96], eax
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mov [edi+112], eax
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add eax, 0x4000
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add edi, 4
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loop @B
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mov ecx, pcmout_bdl
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stdcall GetPgAddr, ecx
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and ecx, 0xFFF
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add eax, ecx
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mov edx, PCM_OUT_BDL
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call [ctrl.ctrl_write32]
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mov eax, 16
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mov [ctrl.lvi_reg], eax
|
|
mov edx, PCM_OUT_LVI_REG
|
|
call [ctrl.ctrl_write8]
|
|
|
|
ret
|
|
endp
|
|
|
|
align 4
|
|
proc detect_controller
|
|
locals
|
|
last_bus dd ?
|
|
bus dd ?
|
|
devfn dd ?
|
|
endl
|
|
|
|
xor eax, eax
|
|
mov [bus], eax
|
|
inc eax
|
|
call PciApi
|
|
cmp eax, -1
|
|
je .no_pci
|
|
|
|
mov [last_bus], eax
|
|
|
|
.next_bus:
|
|
and [devfn], 0
|
|
.next_dev:
|
|
stdcall PciRead32, [bus], [devfn], dword 0
|
|
test eax, eax
|
|
jz .next
|
|
cmp eax, -1
|
|
je .next
|
|
|
|
mov edi, devices
|
|
@@:
|
|
mov ebx, [edi]
|
|
test ebx, ebx
|
|
jz .next
|
|
|
|
cmp eax, ebx
|
|
je .found
|
|
add edi, 12
|
|
jmp @B
|
|
|
|
.next: inc [devfn]
|
|
cmp [devfn], 256
|
|
jb .next_dev
|
|
mov eax, [bus]
|
|
inc eax
|
|
mov [bus], eax
|
|
cmp eax, [last_bus]
|
|
jna .next_bus
|
|
xor eax, eax
|
|
ret
|
|
.found:
|
|
mov ebx, [bus]
|
|
mov [ctrl.bus], ebx
|
|
|
|
mov ecx, [devfn]
|
|
mov [ctrl.devfn], ecx
|
|
|
|
mov edx, eax
|
|
and edx, 0xFFFF
|
|
mov [ctrl.vendor], edx
|
|
shr eax, 16
|
|
mov [ctrl.dev_id], eax
|
|
|
|
mov ebx, [edi+4]
|
|
mov [ctrl.ctrl_ids], ebx
|
|
mov esi, [edi+8]
|
|
mov [ctrl.ctrl_setup], esi
|
|
|
|
cmp ebx, VID_INTEL
|
|
jne @F
|
|
mov [ctrl.vendor_ids], msg_Intel
|
|
ret
|
|
@@:
|
|
cmp ebx, VID_NVIDIA
|
|
jne @F
|
|
mov [ctrl.vendor_ids], msg_NVidia
|
|
@@:
|
|
cmp ebx, 0x1274
|
|
jne @F
|
|
mov [ctrl.vendor_ids], msgEnsoniq
|
|
ret
|
|
@@:
|
|
mov [ctrl.vendor_ids], 0 ;something wrong ?
|
|
ret
|
|
.no_pci:
|
|
mov esi, msgPCI
|
|
call SysMsgBoardStr
|
|
.err:
|
|
xor eax, eax
|
|
ret
|
|
endp
|
|
|
|
align 4
|
|
proc get_LPC_bus ;for Intel chipsets ONLY !!!
|
|
locals
|
|
last_bus dd ?
|
|
bus dd ?
|
|
endl
|
|
|
|
xor eax, eax
|
|
mov [bus], eax
|
|
inc eax
|
|
call [PciApi]
|
|
cmp eax, -1
|
|
je .err
|
|
|
|
mov [last_bus], eax
|
|
.next_bus:
|
|
stdcall PciRead32, [bus], dword 0xF8, dword 0
|
|
test eax, eax
|
|
jz .next
|
|
cmp eax, -1
|
|
je .next
|
|
|
|
cmp eax, 0x24D08086
|
|
je .found
|
|
.next:
|
|
mov eax, [bus]
|
|
inc eax
|
|
cmp eax, [last_bus]
|
|
mov [bus], eax
|
|
jna .next_bus
|
|
.err:
|
|
xor eax, eax
|
|
dec eax
|
|
ret
|
|
.found:
|
|
mov eax, [bus]
|
|
ret
|
|
endp
|
|
|
|
align 4
|
|
proc init_controller
|
|
|
|
stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 4
|
|
mov ebx, eax
|
|
and eax, 0xFFFF
|
|
mov [ctrl.pci_cmd], eax
|
|
shr ebx, 16
|
|
mov [ctrl.pci_stat], ebx
|
|
|
|
stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x10
|
|
and eax,0xFFFE
|
|
mov [ctrl.codec_io_base], eax
|
|
|
|
stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x14
|
|
and eax, 0xFFC0
|
|
mov [ctrl.ctrl_io_base], eax
|
|
|
|
stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x18
|
|
mov [ctrl.codec_mem_base], eax
|
|
|
|
stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x1C
|
|
mov [ctrl.ctrl_mem_base], eax
|
|
|
|
stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x3C
|
|
and eax, 0xFF
|
|
mov [ctrl.int_line], eax
|
|
|
|
stdcall PciRead8, [ctrl.bus], [ctrl.devfn], dword 0x41
|
|
and eax, 0xFF
|
|
mov [ctrl.cfg_reg], eax
|
|
|
|
call [ctrl.ctrl_setup]
|
|
xor eax, eax
|
|
inc eax
|
|
ret
|
|
endp
|
|
|
|
align 4
|
|
proc set_ICH
|
|
mov [ctrl.codec_read16], codec_io_r16 ;virtual
|
|
mov [ctrl.codec_write16], codec_io_w16 ;virtual
|
|
|
|
mov [ctrl.ctrl_read8 ], ctrl_io_r8 ;virtual
|
|
mov [ctrl.ctrl_read16], ctrl_io_r16 ;virtual
|
|
mov [ctrl.ctrl_read32], ctrl_io_r32 ;virtual
|
|
|
|
mov [ctrl.ctrl_write8 ], ctrl_io_w8 ;virtual
|
|
mov [ctrl.ctrl_write16], ctrl_io_w16 ;virtual
|
|
mov [ctrl.ctrl_write32], ctrl_io_w32 ;virtual
|
|
ret
|
|
endp
|
|
|
|
PG_SW equ 0x003
|
|
PG_NOCACHE equ 0x018
|
|
|
|
align 4
|
|
proc set_ICH4
|
|
stdcall AllocKernelSpace, dword 0x2000
|
|
mov edi, eax
|
|
stdcall MapPage, edi,[ctrl.codec_mem_base],PG_SW+PG_NOCACHE
|
|
mov [ctrl.codec_mem_base], edi
|
|
add edi, 0x1000
|
|
stdcall MapPage, edi, [ctrl.ctrl_mem_base],PG_SW+PG_NOCACHE
|
|
mov [ctrl.ctrl_mem_base], edi
|
|
|
|
mov [ctrl.codec_read16], codec_mem_r16 ;virtual
|
|
mov [ctrl.codec_write16], codec_mem_w16 ;virtual
|
|
|
|
mov [ctrl.ctrl_read8 ], ctrl_mem_r8 ;virtual
|
|
mov [ctrl.ctrl_read16], ctrl_mem_r16 ;virtual
|
|
mov [ctrl.ctrl_read32], ctrl_mem_r32 ;virtual
|
|
|
|
mov [ctrl.ctrl_write8 ], ctrl_mem_w8 ;virtual
|
|
mov [ctrl.ctrl_write16], ctrl_mem_w16 ;virtual
|
|
mov [ctrl.ctrl_write32], ctrl_mem_w32 ;virtual
|
|
ret
|
|
endp
|
|
|
|
align 4
|
|
proc reset_controller
|
|
|
|
xor eax, eax
|
|
mov edx, PCM_IN_CR_REG
|
|
call [ctrl.ctrl_write8]
|
|
|
|
mov edx, PCM_OUT_CR_REG
|
|
call [ctrl.ctrl_write8]
|
|
|
|
mov edx, MC_IN_CR_REG
|
|
call [ctrl.ctrl_write8]
|
|
|
|
mov eax, RR
|
|
mov edx, PCM_IN_CR_REG
|
|
call [ctrl.ctrl_write8]
|
|
|
|
mov edx, PCM_OUT_CR_REG
|
|
call [ctrl.ctrl_write8]
|
|
|
|
mov edx, MC_IN_CR_REG
|
|
call [ctrl.ctrl_write8]
|
|
|
|
ret
|
|
endp
|
|
|
|
align 4
|
|
proc init_codec
|
|
locals
|
|
counter dd ?
|
|
endl
|
|
|
|
call reset_codec
|
|
and eax, eax
|
|
jz .err
|
|
|
|
xor edx, edx ;ac_reg_0
|
|
call [ctrl.codec_write16]
|
|
|
|
xor eax, eax
|
|
mov edx, CODEC_REG_POWERDOWN
|
|
call [ctrl.codec_write16]
|
|
|
|
mov [counter], 200 ; total 200*5 ms = 1s
|
|
.wait:
|
|
mov edx, CODEC_REG_POWERDOWN
|
|
call [ctrl.codec_read16]
|
|
and eax, 0x0F
|
|
cmp eax, 0x0F
|
|
jz .ready
|
|
|
|
mov eax, 5000 ; wait 5 ms
|
|
call StallExec
|
|
sub [counter] , 1
|
|
jnz .wait
|
|
.err:
|
|
xor eax, eax ; timeout error
|
|
ret
|
|
.ready:
|
|
call detect_codec
|
|
|
|
xor eax, eax
|
|
inc eax
|
|
ret
|
|
endp
|
|
|
|
align 4
|
|
proc reset_codec
|
|
mov edx, GLOB_CTRL
|
|
call [ctrl.ctrl_read32]
|
|
|
|
test eax, 0x02
|
|
jz .cold
|
|
|
|
call warm_reset
|
|
jnc .ok
|
|
.cold:
|
|
call cold_reset
|
|
jnc .ok
|
|
|
|
if DEBUG
|
|
mov esi, msgCFail
|
|
call SysMsgBoardStr
|
|
end if
|
|
xor eax, eax ; timeout error
|
|
ret
|
|
.ok:
|
|
if DEBUG
|
|
mov esi, msgResetOk
|
|
call SysMsgBoardStr
|
|
end if
|
|
|
|
xor eax, eax
|
|
inc eax
|
|
ret
|
|
endp
|
|
|
|
align 4
|
|
proc warm_reset
|
|
locals
|
|
counter dd ?
|
|
endl
|
|
|
|
mov eax, 0x06
|
|
mov edx, GLOB_CTRL
|
|
call [ctrl.ctrl_write32]
|
|
|
|
if DEBUG
|
|
mov esi, msgWarm
|
|
call SysMsgBoardStr
|
|
end if
|
|
|
|
mov [counter], 10 ; total 10*100 ms = 1s
|
|
.wait:
|
|
mov eax, 100000 ; wait 100 ms
|
|
call StallExec
|
|
|
|
mov edx, GLOB_CTRL
|
|
call [ctrl.ctrl_read32]
|
|
test eax, 4
|
|
jz .ok
|
|
sub [counter], 1
|
|
jnz .wait
|
|
|
|
if DEBUG
|
|
mov esi, msgWRFail
|
|
call SysMsgBoardStr
|
|
end if
|
|
|
|
stc
|
|
ret
|
|
.ok:
|
|
mov edx, CTRL_STAT
|
|
call [ctrl.ctrl_read32]
|
|
and eax, CTRL_ST_CREADY
|
|
jz .fail
|
|
clc
|
|
ret
|
|
.fail:
|
|
stc
|
|
ret
|
|
endp
|
|
|
|
align 4
|
|
proc cold_reset
|
|
locals
|
|
counter dd ?
|
|
endl
|
|
|
|
xor eax, eax
|
|
mov edx, GLOB_CTRL
|
|
call [ctrl.ctrl_write32]
|
|
|
|
if DEBUG
|
|
mov esi, msgCold
|
|
call SysMsgBoardStr
|
|
end if
|
|
|
|
mov eax, 1000000 ; wait 1 s
|
|
call StallExec
|
|
|
|
mov eax, 2
|
|
mov edx, GLOB_CTRL
|
|
call [ctrl.ctrl_write32]
|
|
|
|
mov [counter], 10 ; total 10*100 ms = 1s
|
|
.wait:
|
|
mov eax, 100000 ; wait 100 ms
|
|
call StallExec
|
|
|
|
mov edx, GLOB_CTRL
|
|
call [ctrl.ctrl_read32]
|
|
test eax, 4
|
|
jz .ok
|
|
sub [counter], 1
|
|
jnz .wait
|
|
|
|
if DEBUG
|
|
mov esi, msgCRFail
|
|
call SysMsgBoardStr
|
|
end if
|
|
stc
|
|
ret
|
|
.ok:
|
|
mov edx, CTRL_STAT
|
|
call [ctrl.ctrl_read32]
|
|
and eax, CTRL_ST_CREADY
|
|
jz .fail
|
|
clc
|
|
ret
|
|
.fail:
|
|
stc
|
|
ret
|
|
endp
|
|
|
|
align 4
|
|
proc play
|
|
|
|
mov eax, 16
|
|
mov [ctrl.lvi_reg], eax
|
|
mov edx, PCM_OUT_LVI_REG
|
|
call [ctrl.ctrl_write8]
|
|
|
|
mov edx, PCM_OUT_CR_REG
|
|
mov ax, 0x1D
|
|
call [ctrl.ctrl_write8]
|
|
ret
|
|
endp
|
|
|
|
align 4
|
|
proc stop
|
|
mov edx, PCM_OUT_CR_REG
|
|
mov ax, 0x14
|
|
call [ctrl.ctrl_write8]
|
|
|
|
mov eax, 16
|
|
mov [ctrl.lvi_reg], eax
|
|
mov edx, PCM_OUT_LVI_REG
|
|
call [ctrl.ctrl_write8]
|
|
|
|
ret
|
|
endp
|
|
|
|
align 4
|
|
proc get_dev_info stdcall, p_info:dword
|
|
virtual at esi
|
|
CTRL_INFO CTRL_INFO
|
|
end virtual
|
|
|
|
mov esi, [p_info]
|
|
mov eax, [ctrl.int_line]
|
|
mov ebx, [ctrl.codec_io_base]
|
|
mov ecx, [ctrl.ctrl_io_base]
|
|
mov edx, [ctrl.codec_mem_base]
|
|
mov edi, [ctrl.ctrl_mem_base]
|
|
|
|
mov [CTRL_INFO.irq], eax
|
|
mov [CTRL_INFO.codec_io_base], ebx
|
|
mov [CTRL_INFO.ctrl_io_base], ecx
|
|
mov [CTRL_INFO.codec_mem_base], edx
|
|
mov [CTRL_INFO.ctrl_mem_base], edi
|
|
|
|
mov eax, [codec.chip_id]
|
|
mov [CTRL_INFO.codec_id], eax
|
|
|
|
mov edx, GLOB_CTRL
|
|
call [ctrl.ctrl_read32]
|
|
mov [CTRL_INFO.glob_cntrl], eax
|
|
|
|
mov edx, CTRL_STAT
|
|
call [ctrl.ctrl_read32]
|
|
mov [CTRL_INFO.glob_sta], eax
|
|
|
|
mov ebx, [ctrl.pci_cmd]
|
|
mov [CTRL_INFO.pci_cmd], ebx
|
|
|
|
ret
|
|
endp
|
|
|
|
align 4
|
|
proc set_callback stdcall, handler:dword
|
|
mov eax, [handler]
|
|
mov [ctrl.user_callback], eax
|
|
ret
|
|
endp
|
|
|
|
align 4
|
|
proc codec_read stdcall, ac_reg:dword ; reg = edx, reval = eax
|
|
|
|
mov edx, [ac_reg]
|
|
|
|
mov ebx, edx
|
|
shr ebx, 1
|
|
bt [codec.shadow_flag], ebx
|
|
jc .use_shadow
|
|
|
|
call [ctrl.codec_read16] ;change edx !!!
|
|
mov ecx, eax
|
|
|
|
mov edx, CTRL_STAT
|
|
call [ctrl.ctrl_read32]
|
|
test eax, CTRL_ST_RCS
|
|
jz .read_ok
|
|
|
|
mov edx, CTRL_STAT
|
|
call [ctrl.ctrl_write32]
|
|
xor eax,eax
|
|
not eax ;timeout
|
|
ret
|
|
.read_ok:
|
|
mov edx, [ac_reg]
|
|
mov [codec.regs+edx], cx
|
|
bts [codec.shadow_flag], ebx
|
|
mov eax, ecx
|
|
ret
|
|
.use_shadow:
|
|
movzx eax, word [codec.regs+edx]
|
|
ret
|
|
endp
|
|
|
|
align 4
|
|
proc codec_write stdcall, ac_reg:dword
|
|
push eax
|
|
call check_semafore
|
|
and eax, eax
|
|
jz .err
|
|
pop eax
|
|
|
|
mov esi, [ac_reg]
|
|
mov edx, esi
|
|
call [ctrl.codec_write16]
|
|
mov [codec.regs+esi], ax
|
|
shr esi, 1
|
|
bts [codec.shadow_flag], esi
|
|
ret
|
|
.err:
|
|
pop eax
|
|
ret
|
|
endp
|
|
|
|
align 4
|
|
proc codec_check_ready
|
|
|
|
mov edx, CTRL_ST
|
|
call [ctrl.ctrl_read32]
|
|
and eax, CTRL_ST_CREADY
|
|
jz .not_ready
|
|
|
|
xor eax, wax
|
|
inc eax
|
|
ret
|
|
|
|
align 4
|
|
.not_ready:
|
|
xor eax, eax
|
|
ret
|
|
endp
|
|
|
|
align 4
|
|
proc check_semafore
|
|
local counter:DWORD
|
|
|
|
mov [counter], 100
|
|
.l1:
|
|
mov edx, CTRL_CAS
|
|
call [ctrl.ctrl_read8]
|
|
and eax, CAS_FLAG
|
|
jz .ok
|
|
|
|
mov eax, 1
|
|
call StallExec
|
|
sub [counter], 1
|
|
jnz .l1
|
|
xor eax, eax
|
|
ret
|
|
align 4
|
|
.ok:
|
|
xor eax,eax
|
|
inc eax
|
|
ret
|
|
endp
|
|
|
|
align 4
|
|
proc StallExec
|
|
push ecx
|
|
push edx
|
|
push ebx
|
|
push eax
|
|
|
|
mov ecx, CPU_FREQ
|
|
mul ecx
|
|
mov ebx, eax ;low
|
|
mov ecx, edx ;high
|
|
rdtsc
|
|
add ebx, eax
|
|
adc ecx,edx
|
|
@@:
|
|
rdtsc
|
|
sub eax, ebx
|
|
sbb edx, ecx
|
|
jb @B
|
|
|
|
pop eax
|
|
pop ebx
|
|
pop edx
|
|
pop ecx
|
|
ret
|
|
endp
|
|
|
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
; CONTROLLER IO functions
|
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
|
|
align 4
|
|
proc codec_io_r16
|
|
add edx, [ctrl.codec_io_base]
|
|
in ax, dx
|
|
ret
|
|
endp
|
|
|
|
align 4
|
|
proc codec_io_w16
|
|
add edx, [ctrl.codec_io_base]
|
|
out dx, ax
|
|
ret
|
|
endp
|
|
|
|
align 4
|
|
proc ctrl_io_r8
|
|
add edx, [ctrl.ctrl_io_base]
|
|
in al, dx
|
|
ret
|
|
endp
|
|
|
|
align 4
|
|
proc ctrl_io_r16
|
|
add edx, [ctrl.ctrl_io_base]
|
|
in ax, dx
|
|
ret
|
|
endp
|
|
|
|
align 4
|
|
proc ctrl_io_r32
|
|
add edx, [ctrl.ctrl_io_base]
|
|
in eax, dx
|
|
ret
|
|
endp
|
|
|
|
align 4
|
|
proc ctrl_io_w8
|
|
add edx, [ctrl.ctrl_io_base]
|
|
out dx, al
|
|
ret
|
|
endp
|
|
|
|
align 4
|
|
proc ctrl_io_w16
|
|
add edx, [ctrl.ctrl_io_base]
|
|
out dx, ax
|
|
ret
|
|
endp
|
|
|
|
align 4
|
|
proc ctrl_io_w32
|
|
add edx, [ctrl.ctrl_io_base]
|
|
out dx, eax
|
|
ret
|
|
endp
|
|
|
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
; MEMORY MAPPED IO (os depended)
|
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
|
|
align 4
|
|
proc codec_mem_r16
|
|
add edx, [ctrl.codec_mem_base]
|
|
mov ax, word [edx]
|
|
ret
|
|
endp
|
|
|
|
align 4
|
|
proc codec_mem_w16
|
|
add edx, [ctrl.codec_mem_base]
|
|
mov word [edx], ax
|
|
ret
|
|
endp
|
|
|
|
align 4
|
|
proc ctrl_mem_r8
|
|
add edx, [ctrl.ctrl_mem_base]
|
|
mov al, [edx]
|
|
ret
|
|
endp
|
|
|
|
align 4
|
|
proc ctrl_mem_r16
|
|
add edx, [ctrl.ctrl_mem_base]
|
|
mov ax, [edx]
|
|
ret
|
|
endp
|
|
|
|
align 4
|
|
proc ctrl_mem_r32
|
|
add edx, [ctrl.ctrl_mem_base]
|
|
mov eax, [edx]
|
|
ret
|
|
endp
|
|
|
|
align 4
|
|
proc ctrl_mem_w8
|
|
add edx, [ctrl.ctrl_mem_base]
|
|
mov [edx], al
|
|
|
|
ret
|
|
endp
|
|
|
|
align 4
|
|
proc ctrl_mem_w16
|
|
add edx, [ctrl.ctrl_mem_base]
|
|
mov [edx], ax
|
|
ret
|
|
endp
|
|
|
|
align 4
|
|
proc ctrl_mem_w32
|
|
add edx, [ctrl.ctrl_mem_base]
|
|
mov [edx], eax
|
|
ret
|
|
endp
|
|
|
|
|
|
include "codec.inc"
|
|
|
|
align 4
|
|
devices dd (CTRL_ICH shl 16)+VID_INTEL,msg_ICH, set_ICH
|
|
dd (CTRL_ICH0 shl 16)+VID_INTEL,msg_ICH0,set_ICH
|
|
dd (CTRL_ICH2 shl 16)+VID_INTEL,msg_ICH2,set_ICH
|
|
dd (CTRL_ICH3 shl 16)+VID_INTEL,msg_ICH3,set_ICH
|
|
dd (CTRL_ICH4 shl 16)+VID_INTEL,msg_ICH4,set_ICH4
|
|
dd (CTRL_ICH5 shl 16)+VID_INTEL,msg_ICH5,set_ICH4
|
|
dd (CTRL_ICH6 shl 16)+VID_INTEL,msg_ICH6,set_ICH4
|
|
dd (CTRL_ICH7 shl 16)+VID_INTEL,msg_ICH7,set_ICH4
|
|
|
|
dd (CTRL_NFORCE shl 16)+VID_NVIDIA,msg_NForce, set_ICH
|
|
dd (CTRL_NFORCE2 shl 16)+VID_NVIDIA,msg_NForce2,set_ICH
|
|
dd (CTRL_NFORCE3 shl 16)+VID_NVIDIA,msg_NForce3,set_ICH
|
|
dd (0x5000 shl 16)+0x1274,msgEnsoniq,set_ICH
|
|
|
|
dd 0 ;terminator
|
|
|
|
msg_ICH db 'Intel ICH', 13,10, 0
|
|
msg_ICH0 db 'Intel ICH0', 13,10, 0
|
|
msg_ICH2 db 'Intel ICH2', 13,10, 0
|
|
msg_ICH3 db 'Intel ICH3', 13,10, 0
|
|
msg_ICH4 db 'Intel ICH4', 13,10, 0
|
|
msg_ICH5 db 'Intel ICH5', 13,10, 0
|
|
msg_ICH6 db 'Intel ICH6', 13,10, 0
|
|
msg_ICH7 db 'Intel ICH7', 13,10, 0
|
|
msg_Intel db 'Intel Corp. ', 0
|
|
|
|
msg_NForce db 'NForce', 13,10, 0
|
|
msg_NForce2 db 'NForce 2', 13,10, 0
|
|
msg_NForce3 db 'NForce 3', 13,10, 0
|
|
msg_NVidia db 'NVidea', 0
|
|
|
|
msgEnsoniq db 'Ensonic 1371',0
|
|
|
|
szKernel db 'KERNEL', 0
|
|
sz_sound_srv db 'SOUND',0
|
|
|
|
msgInit db 'detect hardware...',13,10,0
|
|
msgPCI db 'PCI accsess not supported',13,10,0
|
|
msgFail db 'device not found',13,10,0
|
|
msgAttchIRQ db 'IRQ line not supported', 13,10, 0
|
|
msgInvIRQ db 'IRQ line not assigned or invalid', 13,10, 0
|
|
msgPlay db 'start play', 13,10,0
|
|
msgStop db 'stop play', 13,10,0
|
|
msgNotify db 'call notify',13,10,0
|
|
msgIRQ db 'AC97 IRQ', 13,10,0
|
|
msgInitCtrl db 'init controller',13,10,0
|
|
msgInitCodec db 'init codec',13,10,0
|
|
msgPrimBuff db 'create primary buffer',13,10,0
|
|
msgReg db 'set service handler',13,10,0
|
|
msgOk db 'service installed',13,10,0
|
|
msgCold db 'cold reset',13,10,0
|
|
msgWarm db 'warm reset',13,10,0
|
|
msgWRFail db 'warm reset failed',13,10,0
|
|
msgCRFail db 'cold reset failed',13,10,0
|
|
msgCFail db 'codec not ready',13,10,0
|
|
msgResetOk db 'reset complete',13,10,0
|
|
|
|
section '.data' data readable writable align 16
|
|
|
|
pcmout_bdl rq 32
|
|
buff_list rd 32
|
|
|
|
codec CODEC
|
|
ctrl AC_CNTRL
|
|
|
|
lpc_bus rd 1
|
|
civ_val rd 1
|
|
|
|
|