forked from KolibriOS/kolibrios
Clib char & math functions
git-svn-id: svn://kolibrios.org@554 a494cfbc-eb01-0410-851d-a64ba20cac60
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397
programs/develop/open watcom/trunk/clib/fpu/chipa32.asm
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397
programs/develop/open watcom/trunk/clib/fpu/chipa32.asm
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;*****************************************************************************
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;*
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;* Open Watcom Project
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;*
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;* Portions Copyright (c) 1983-2002 Sybase, Inc. All Rights Reserved.
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;*
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;* ========================================================================
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;*
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;* This file contains Original Code and/or Modifications of Original
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;* Code as defined in and that are subject to the Sybase Open Watcom
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;* Public License version 1.0 (the 'License'). You may not use this file
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;* except in compliance with the License. BY USING THIS FILE YOU AGREE TO
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;* ALL TERMS AND CONDITIONS OF THE LICENSE. A copy of the License is
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;* provided with the Original Code and Modifications, and is also
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;* available at www.sybase.com/developer/opensource.
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;*
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;* The Original Code and all software distributed under the License are
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;* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
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;* EXPRESS OR IMPLIED, AND SYBASE AND ALL CONTRIBUTORS HEREBY DISCLAIM
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;* ALL SUCH WARRANTIES, INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF
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;* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR
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;* NON-INFRINGEMENT. Please see the License for the specific language
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;* governing rights and limitations under the License.
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;*
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;* ========================================================================
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;*
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;* Description: WHEN YOU FIGURE OUT WHAT THIS FILE DOES, PLEASE
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;* DESCRIBE IT HERE!
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;*
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;*****************************************************************************
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; static char sccs_id[] = "@(#)fpatan32.asm 1.7 12/21/94 08:33:45";
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;
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; This code is being published by Intel to users of the Pentium(tm)
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; processor. Recipients are authorized to copy, modify, compile, use and
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; distribute the code.
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;
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; Intel makes no warranty of any kind with regard to this code, including
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; but not limited to, implied warranties or merchantability and fitness for
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; a particular purpose. Intel assumes no responsibility for any errors that
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; may appear in this code.
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;
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; No patent licenses are granted, express or implied.
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;
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;
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include mdef.inc
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.386
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.387
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_TEXT SEGMENT PARA PUBLIC USE32 'CODE'
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_TEXT ENDS
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CONST SEGMENT DWORD PUBLIC USE32 'DATA'
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CONST ENDS
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CONST2 SEGMENT DWORD PUBLIC USE32 'DATA'
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CONST2 ENDS
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DATA32 SEGMENT DWORD PUBLIC USE32 'DATA'
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Y EQU 0
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X EQU 12
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PREV_CW EQU 24
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PATCH_CW EQU 28
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SPILL EQU 32
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STACK_SIZE EQU 36
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pos_1 DD 00000000H
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DD 3ff00000H
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neg_1 DD 00000000H
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DD 0bff00000H
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dispatch_table DD offset label0
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DD offset label1
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DD offset label2
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DD offset label3
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DD offset label4
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DD offset label5
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DD offset label6
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DD offset label7
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;end dispatch table
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pi DB 35H
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DB 0c2H
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DD 0daa22168H
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DD 4000c90fH
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pi_by_2 DB 35H
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DB 0c2H
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DD 0daa22168H
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DD 3fffc90fH
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flt_sixteen DD 41800000H
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one_by_sixteen DD 3d800000H
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B1 DW 0AAA8H
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DD 0AAAAAAAAH
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DD 0BFFDAAAAH
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B2 DW 2D6EH
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DD 0CCCCCCCCH
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DD 3FFCCCCCH
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B3 DW 4892H
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DD 249241F9H
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DD 0BFFC9249H
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B4 DW 0C592H
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DD 3897CDECH
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DD 3FFBE38EH
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B5 DW 5DDDH
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DD 0C17BC162H
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DD 0BFFBBA2DH
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B6 DW 4854H
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DD 77C7C78EH
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DD 3FFB9C80H
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atan_k_by_16 dd 000000000H, 000000000H, 000000000H, 000000000H
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dd 067EF4E37H, 0FFAADDB9H, 000003FFAH, 000000000H
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dd 0617B6E33H, 0FEADD4D5H, 000003FFBH, 000000000H
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dd 072D81135H, 0BDCBDA5EH, 000003FFCH, 000000000H
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dd 06406EB15H, 0FADBAFC9H, 000003FFCH, 000000000H
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dd 03F5E5E6AH, 09B13B9B8H, 000003FFDH, 000000000H
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dd 026F78474H, 0B7B0CA0FH, 000003FFDH, 000000000H
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dd 0611FE5B6H, 0D327761EH, 000003FFDH, 000000000H
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dd 00DDA7B45H, 0ED63382BH, 000003FFDH, 000000000H
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dd 0D9867E2AH, 0832BF4A6H, 000003FFEH, 000000000H
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dd 0F7F59F9BH, 08F005D5EH, 000003FFEH, 000000000H
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dd 071BDDA20H, 09A2F80E6H, 000003FFEH, 000000000H
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dd 034F70924H, 0A4BC7D19H, 000003FFEH, 000000000H
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dd 0B4D8C080H, 0AEAC4C38H, 000003FFEH, 000000000H
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dd 0C2319E74H, 0B8053E2BH, 000003FFEH, 000000000H
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dd 0AC526641H, 0C0CE85B8H, 000003FFEH, 000000000H
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dd 02168C235H, 0C90FDAA2H, 000003FFEH, 000000000H
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DATA32 ENDS
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BSS32 SEGMENT DWORD PUBLIC USE32 'BSS'
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BSS32 ENDS
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EXTRN __fdiv_fpr:NEAR
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DGROUP GROUP CONST,CONST2,DATA32,BSS32
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_TEXT SEGMENT PARA PUBLIC USE32 'CODE'
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ASSUME CS:_TEXT,DS:DGROUP,ES:DGROUP, SS:nothing
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public __fpatan_chk
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defpe __fpatan_chk
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push eax
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push ecx
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push edx
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sub esp, STACK_SIZE
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fstp tbyte ptr [esp+X] ; save X
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fstp tbyte ptr [esp+Y] ; save Y
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mov ecx, [esp+Y+4]
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add ecx, ecx
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jnc hw_fpatan ; unnormals (explicit 1 missing)
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mov eax, [esp+X+4]
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add eax, eax
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jnc hw_fpatan ; unnormals (explicit 1 missing)
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mov ecx, [esp+Y+8] ; save high part of Y
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mov eax, [esp+X+8] ; save high part of Y
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and ecx, 7fffh ; Ey = exponent Y
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jz hw_fpatan ; Ey = 0
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and eax, 7fffh ; Ex = exponent X
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jz hw_fpatan ; Ex = 0
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cmp ecx, 7fffh ; check if Ey = 0x7fffh
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je hw_fpatan
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cmp eax, 7fffh ; check if Ex = 0x7fffh
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je hw_fpatan
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fld tbyte ptr [esp+X] ; reload X
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fabs ; |X| = u
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fld tbyte ptr [esp+Y] ; reload Y
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fabs ; |Y| = v
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; The following five lines turn off exceptions and set the
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; precision control to 80 bits. The former is necessary to
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; force any traps to be taken at the divide instead of the scaling
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; code. The latter is necessary in order to get full precision for
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; codes with incoming 32 and 64 bit precision settings. If
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; it can be guaranteed that before reaching this point, the underflow
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; exception is masked and the precision control is at 80 bits, these
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; five lines can be omitted.
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;
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fnstcw [PREV_CW+esp] ; save caller's control word
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mov edx, [PREV_CW+esp]
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or edx, 033fh ; mask exceptions, pc=80
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and edx, 0f3ffh
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mov [PATCH_CW+esp], edx
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fldcw [PATCH_CW+esp] ; mask exceptions & pc=80
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xor edx, edx ; initialize sflag = 0
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fcom ; |Y| > |x|
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push eax
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fstsw ax
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sahf
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pop eax
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jb order_X_Y_ok
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fxch
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inc edx ; sflag = 1
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order_X_Y_ok:
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push eax
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mov eax, 0fh
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call __fdiv_fpr ; v/u = z
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pop eax
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fld dword ptr flt_sixteen ; 16.0
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fmul st, st(1) ; z*16.0
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; Top of stack looks like k, z
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fistp dword ptr [SPILL+esp] ; store k as int
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mov ecx, [SPILL+esp]
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shl ecx, 4
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fild dword ptr[SPILL+esp]
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fmul dword ptr one_by_sixteen; 1.0/16.0
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; Top of stack looks like g, z
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fld st(1) ; duplicate g
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fsub st, st(1) ; z-g = r
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fxch
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; Top of stack looks like g, r, z
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fmulp st(2), st ; g*z
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; Top of stack looks like r, g*z
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fld qword ptr pos_1 ; load 1.0
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faddp st(2), st ; 1+g*z
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; Top of stack looks like r, 1+g*z
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push eax
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mov eax, 0fh
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call __fdiv_fpr ; v/u = z
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pop eax
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fld st(0) ; duplicate s
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fmul st,st(1) ; t = s*s
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; Top of stack looks like t, s
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fld st(0)
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fmul st, st(1)
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; Top of stack looks like t2, t, s
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fld st(0)
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fmul st, st(1)
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fld tbyte ptr B6
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fld tbyte ptr B5
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; Top of stack looks like B5, B6, t4, t2, t, s
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fxch
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fmul st, st(2)
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fld tbyte ptr B4
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fxch st(2)
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fmul st, st(3)
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; Top of stack looks like B5t4, B6t4, B4, t4, t2, t, s
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fld tbyte ptr B3
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fxch st(2)
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fmul st, st(5)
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; Top of stack looks like B6t6, B5t4, B3, B4, t4, t2, t, s
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fxch st(3)
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fmulp st(4), st
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fld tbyte ptr B2
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; Top of stack looks like B2, B5t4, B3, B6t6, B4t4, t2, t, s
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fxch st(3)
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faddp st(4), st
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mov eax, [esp+X+8]
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fld tbyte ptr B1
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fxch
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shl eax, 16
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; Top of stack looks like B5t4, B1, B3, B2, even, t2, t, s
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fmul st, st(6)
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fxch st(2)
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add eax, eax
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fmul st, st(5)
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; Top of stack looks like B3t2, B1, B5t5, B2, even, t2, t, s
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fxch st(3)
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adc edx, edx ; |sflag|Sx|
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fmulp st(5), st
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fxch st(2)
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mov eax, [Y+8+esp] ; save high part of Y
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fmul st, st(5)
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; Top of stack looks like B3t3, B5t5, B1, even, B2t2, t, s
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fxch st(2)
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shl eax, 16
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fmulp st(5), st
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; Top of stack looks like B5t5, B3t3, even, B2t2, B1t, s
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fxch st(2)
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faddp st(3), st
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add eax, eax
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faddp st(1), st
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adc edx, edx ; |sflag|Sx|Sy|
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; Top of stack looks like odd, even, B1t, s
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faddp st(2), st
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faddp st(1), st
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fmul st,st(1) ; s*(odd+even)
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faddp st(1), st ; poly
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fld tbyte ptr atan_k_by_16[ecx] ; arctan[k;16]
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faddp st(1), st ; w = poly + arctan(g)
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jmp dword ptr dispatch_table[edx*4]
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label0:
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fldcw [esp+PREV_CW]
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add esp, STACK_SIZE
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pop edx
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pop ecx
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pop eax
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ret
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label1:
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fchs
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fldcw [esp+PREV_CW]
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add esp, STACK_SIZE
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pop edx
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pop ecx
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pop eax
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ret
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label2:
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fld tbyte ptr pi
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fsubrp st(1), st ; pi - w
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fldcw [esp+PREV_CW]
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add esp, STACK_SIZE
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pop edx
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pop ecx
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pop eax
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ret
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label3:
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fld tbyte ptr pi
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fsubrp st(1), st ; pi - w
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fchs ; - (pi - w)
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fldcw [esp+PREV_CW]
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add esp, STACK_SIZE
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pop edx
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pop ecx
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pop eax
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ret
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label4:
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fld tbyte ptr pi_by_2
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fsubrp st(1), st ; pi/2 - w
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fldcw [esp+PREV_CW]
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add esp, STACK_SIZE
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pop edx
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pop ecx
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pop eax
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ret
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label5:
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fld tbyte ptr pi_by_2
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fsubrp st(1), st ; pi/2 - w
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fchs ; - (pi/2 - w)
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fldcw [esp+PREV_CW]
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add esp, STACK_SIZE
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pop edx
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pop ecx
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pop eax
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ret
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label6:
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fld tbyte ptr pi_by_2
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faddp st(1), st ; pi/2 + w
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fldcw [esp+PREV_CW]
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add esp, STACK_SIZE
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pop edx
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pop ecx
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pop eax
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ret
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label7:
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fld tbyte ptr pi_by_2
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faddp st(1), st ; pi/2 + w
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fchs ; -(pi/2+w)
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fldcw [esp+PREV_CW]
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add esp, STACK_SIZE
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pop edx
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pop ecx
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pop eax
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ret
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hw_fpatan:
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fld tbyte ptr [esp+Y] ; reload Y
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fld tbyte ptr [esp+X] ; reload X
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fpatan
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add esp, STACK_SIZE
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pop edx
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pop ecx
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pop eax
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ret
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__fpatan_chk ENDP
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_TEXT ENDS
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END
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Block a user