forked from KolibriOS/kolibrios
kms: rc8
git-svn-id: svn://kolibrios.org@1313 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
parent
baae07dc05
commit
5da0aff00a
@ -662,6 +662,12 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
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return NULL;
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return NULL;
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}
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}
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/* Some EDIDs have bogus h/vtotal values */
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if (mode->hsync_end > mode->htotal)
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mode->htotal = mode->hsync_end + 1;
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if (mode->vsync_end > mode->vtotal)
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mode->vtotal = mode->vsync_end + 1;
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drm_mode_set_name(mode);
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drm_mode_set_name(mode);
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if (pt->misc & DRM_EDID_PT_INTERLACED)
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if (pt->misc & DRM_EDID_PT_INTERLACED)
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@ -385,7 +385,7 @@ int drm_fb_helper_check_var(struct fb_var_screeninfo *var,
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struct drm_framebuffer *fb = fb_helper->fb;
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struct drm_framebuffer *fb = fb_helper->fb;
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int depth;
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int depth;
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if (var->pixclock == -1 || !var->pixclock)
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if (var->pixclock != 0)
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return -EINVAL;
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return -EINVAL;
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/* Need to resize the fb object !!! */
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/* Need to resize the fb object !!! */
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@ -477,7 +477,7 @@ int drm_fb_helper_set_par(struct fb_info *info)
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int ret;
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int ret;
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int i;
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int i;
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if (var->pixclock != -1) {
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if (var->pixclock != 0) {
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DRM_ERROR("PIXEL CLCOK SET\n");
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DRM_ERROR("PIXEL CLCOK SET\n");
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return -EINVAL;
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return -EINVAL;
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}
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}
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@ -690,7 +690,7 @@ int drm_fb_helper_single_fb_probe(struct drm_device *dev,
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fb_helper->fb = fb;
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fb_helper->fb = fb;
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if (new_fb) {
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if (new_fb) {
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info->var.pixclock = -1;
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info->var.pixclock = 0;
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// if (register_framebuffer(info) < 0)
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// if (register_framebuffer(info) < 0)
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// return -EINVAL;
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// return -EINVAL;
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} else {
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} else {
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@ -229,13 +229,15 @@ static inline void* __CreateObject(u32_t pid, size_t size)
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return retval;
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return retval;
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}
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}
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static inline void *__DestroyObject(void *obj)
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static inline void __DestroyObject(void *obj)
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{
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{
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__asm__ __volatile__ (
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__asm__ __volatile__ (
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"call *__imp__DestroyObject"
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"call *__imp__DestroyObject"
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:
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:
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:"a" (obj)
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:"a" (obj));
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:"ebx","edx","esi","edi", "memory");
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__asm__ __volatile__ (
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""
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:::"eax","ebx","ecx","edx","esi","edi","cc","memory");
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}
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}
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@ -107,6 +107,7 @@ static uint32_t atom_iio_execute(struct atom_context *ctx, int base,
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base += 3;
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base += 3;
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break;
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break;
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case ATOM_IIO_WRITE:
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case ATOM_IIO_WRITE:
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(void)ctx->card->reg_read(ctx->card, CU16(base + 1));
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ctx->card->reg_write(ctx->card, CU16(base + 1), temp);
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ctx->card->reg_write(ctx->card, CU16(base + 1), temp);
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base += 3;
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base += 3;
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break;
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break;
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@ -1141,7 +1141,7 @@ typedef struct _LVDS_ENCODER_CONTROL_PARAMETERS {
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/* ucTableFormatRevision=1,ucTableContentRevision=2 */
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/* ucTableFormatRevision=1,ucTableContentRevision=2 */
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typedef struct _LVDS_ENCODER_CONTROL_PARAMETERS_V2 {
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typedef struct _LVDS_ENCODER_CONTROL_PARAMETERS_V2 {
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USHORT usPixelClock; /* in 10KHz; for bios convenient */
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USHORT usPixelClock; /* in 10KHz; for bios convenient */
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UCHAR ucMisc; /* see PANEL_ENCODER_MISC_xx defintions below */
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UCHAR ucMisc; /* see PANEL_ENCODER_MISC_xx definitions below */
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UCHAR ucAction; /* 0: turn off encoder */
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UCHAR ucAction; /* 0: turn off encoder */
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/* 1: setup and turn on encoder */
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/* 1: setup and turn on encoder */
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UCHAR ucTruncate; /* bit0=0: Disable truncate */
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UCHAR ucTruncate; /* bit0=0: Disable truncate */
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@ -1424,7 +1424,7 @@ typedef struct _ATOM_MULTIMEDIA_CONFIG_INFO {
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/* Structures used in FirmwareInfoTable */
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/* Structures used in FirmwareInfoTable */
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/****************************************************************************/
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/****************************************************************************/
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/* usBIOSCapability Defintion: */
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/* usBIOSCapability Definition: */
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/* Bit 0 = 0: Bios image is not Posted, =1:Bios image is Posted; */
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/* Bit 0 = 0: Bios image is not Posted, =1:Bios image is Posted; */
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/* Bit 1 = 0: Dual CRTC is not supported, =1: Dual CRTC is supported; */
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/* Bit 1 = 0: Dual CRTC is not supported, =1: Dual CRTC is supported; */
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/* Bit 2 = 0: Extended Desktop is not supported, =1: Extended Desktop is supported; */
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/* Bit 2 = 0: Extended Desktop is not supported, =1: Extended Desktop is supported; */
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@ -2386,7 +2386,7 @@ typedef struct _ATOM_ANALOG_TV_INFO_V1_2 {
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} ATOM_ANALOG_TV_INFO_V1_2;
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} ATOM_ANALOG_TV_INFO_V1_2;
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/**************************************************************************/
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/**************************************************************************/
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/* VRAM usage and their defintions */
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/* VRAM usage and their definitions */
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/* One chunk of VRAM used by Bios are for HWICON surfaces,EDID data. */
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/* One chunk of VRAM used by Bios are for HWICON surfaces,EDID data. */
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/* Current Mode timing and Dail Timing and/or STD timing data EACH device. They can be broken down as below. */
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/* Current Mode timing and Dail Timing and/or STD timing data EACH device. They can be broken down as below. */
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@ -3046,7 +3046,7 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO {
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#define ATOM_S0_SYSTEM_POWER_STATE_VALUE_DC 2
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#define ATOM_S0_SYSTEM_POWER_STATE_VALUE_DC 2
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#define ATOM_S0_SYSTEM_POWER_STATE_VALUE_LITEAC 3
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#define ATOM_S0_SYSTEM_POWER_STATE_VALUE_LITEAC 3
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/* Byte aligned defintion for BIOS usage */
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/* Byte aligned definition for BIOS usage */
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#define ATOM_S0_CRT1_MONOb0 0x01
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#define ATOM_S0_CRT1_MONOb0 0x01
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#define ATOM_S0_CRT1_COLORb0 0x02
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#define ATOM_S0_CRT1_COLORb0 0x02
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#define ATOM_S0_CRT1_MASKb0 (ATOM_S0_CRT1_MONOb0+ATOM_S0_CRT1_COLORb0)
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#define ATOM_S0_CRT1_MASKb0 (ATOM_S0_CRT1_MONOb0+ATOM_S0_CRT1_COLORb0)
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@ -3131,7 +3131,7 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO {
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#define ATOM_S2_DISPLAY_ROTATION_DEGREE_SHIFT 30
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#define ATOM_S2_DISPLAY_ROTATION_DEGREE_SHIFT 30
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#define ATOM_S2_DISPLAY_ROTATION_ANGLE_MASK 0xC0000000L
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#define ATOM_S2_DISPLAY_ROTATION_ANGLE_MASK 0xC0000000L
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/* Byte aligned defintion for BIOS usage */
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/* Byte aligned definition for BIOS usage */
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#define ATOM_S2_TV1_STANDARD_MASKb0 0x0F
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#define ATOM_S2_TV1_STANDARD_MASKb0 0x0F
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#define ATOM_S2_CURRENT_BL_LEVEL_MASKb1 0xFF
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#define ATOM_S2_CURRENT_BL_LEVEL_MASKb1 0xFF
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#define ATOM_S2_CRT1_DPMS_STATEb2 0x01
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#define ATOM_S2_CRT1_DPMS_STATEb2 0x01
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@ -3190,7 +3190,7 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO {
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#define ATOM_S3_ALLOW_FAST_PWR_SWITCH 0x40000000L
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#define ATOM_S3_ALLOW_FAST_PWR_SWITCH 0x40000000L
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#define ATOM_S3_RQST_GPU_USE_MIN_PWR 0x80000000L
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#define ATOM_S3_RQST_GPU_USE_MIN_PWR 0x80000000L
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/* Byte aligned defintion for BIOS usage */
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/* Byte aligned definition for BIOS usage */
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#define ATOM_S3_CRT1_ACTIVEb0 0x01
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#define ATOM_S3_CRT1_ACTIVEb0 0x01
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#define ATOM_S3_LCD1_ACTIVEb0 0x02
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#define ATOM_S3_LCD1_ACTIVEb0 0x02
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#define ATOM_S3_TV1_ACTIVEb0 0x04
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#define ATOM_S3_TV1_ACTIVEb0 0x04
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@ -3230,7 +3230,7 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO {
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#define ATOM_S4_LCD1_REFRESH_MASK 0x0000FF00L
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#define ATOM_S4_LCD1_REFRESH_MASK 0x0000FF00L
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#define ATOM_S4_LCD1_REFRESH_SHIFT 8
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#define ATOM_S4_LCD1_REFRESH_SHIFT 8
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/* Byte aligned defintion for BIOS usage */
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/* Byte aligned definition for BIOS usage */
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#define ATOM_S4_LCD1_PANEL_ID_MASKb0 0x0FF
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#define ATOM_S4_LCD1_PANEL_ID_MASKb0 0x0FF
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#define ATOM_S4_LCD1_REFRESH_MASKb1 ATOM_S4_LCD1_PANEL_ID_MASKb0
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#define ATOM_S4_LCD1_REFRESH_MASKb1 ATOM_S4_LCD1_PANEL_ID_MASKb0
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#define ATOM_S4_VRAM_INFO_MASKb2 ATOM_S4_LCD1_PANEL_ID_MASKb0
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#define ATOM_S4_VRAM_INFO_MASKb2 ATOM_S4_LCD1_PANEL_ID_MASKb0
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@ -3310,7 +3310,7 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO {
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#define ATOM_S6_VRI_BRIGHTNESS_CHANGE 0x40000000L
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#define ATOM_S6_VRI_BRIGHTNESS_CHANGE 0x40000000L
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#define ATOM_S6_CONFIG_DISPLAY_CHANGE_MASK 0x80000000L
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#define ATOM_S6_CONFIG_DISPLAY_CHANGE_MASK 0x80000000L
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/* Byte aligned defintion for BIOS usage */
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/* Byte aligned definition for BIOS usage */
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#define ATOM_S6_DEVICE_CHANGEb0 0x01
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#define ATOM_S6_DEVICE_CHANGEb0 0x01
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#define ATOM_S6_SCALER_CHANGEb0 0x02
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#define ATOM_S6_SCALER_CHANGEb0 0x02
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#define ATOM_S6_LID_CHANGEb0 0x04
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#define ATOM_S6_LID_CHANGEb0 0x04
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@ -50,7 +50,7 @@ struct tag_display
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void (*show_cursor)(int show);
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void (*show_cursor)(int show);
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void (__stdcall *move_cursor)(cursor_t *cursor, int x, int y);
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void (__stdcall *move_cursor)(cursor_t *cursor, int x, int y);
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void (__stdcall *restore_cursor)(int x, int y);
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void (__stdcall *restore_cursor)(int x, int y);
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void (*disable_mouse)(void);
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};
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};
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extern display_t *rdisplay;
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extern display_t *rdisplay;
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@ -73,13 +73,14 @@ NAME_SRC= \
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rdisplay.c \
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rdisplay.c \
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rdisplay_kms.c \
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rdisplay_kms.c \
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radeon_pm.c \
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radeon_pm.c \
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cmdline.c
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cmdline.c \
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cursor.S
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SRC_DEP:=
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SRC_DEP:=
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NAME_OBJS = $(patsubst %.s, %.o, $(patsubst %.asm, %.o,\
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NAME_OBJS = $(patsubst %.S, %.o, $(patsubst %.asm, %.o,\
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$(patsubst %.c, %.o, $(NAME_SRC))))
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$(patsubst %.c, %.o, $(NAME_SRC))))
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@ -92,3 +93,6 @@ $(NAME).dll: $(NAME_OBJS) $(SRC_DEP) $(HFILES) atikms.lds Makefile
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%.o : %.c $(HFILES) Makefile
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%.o : %.c $(HFILES) Makefile
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$(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o $@ -c $<
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$(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o $@ -c $<
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%.o : %.S $(HFILES) Makefile
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as -o $@ $<
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@ -393,11 +393,11 @@ int r600_mc_init(struct radeon_device *rdev)
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* AGP so that GPU can catch out of VRAM/AGP access
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* AGP so that GPU can catch out of VRAM/AGP access
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*/
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*/
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if (rdev->mc.gtt_location > rdev->mc.mc_vram_size) {
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if (rdev->mc.gtt_location > rdev->mc.mc_vram_size) {
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/* Enought place before */
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/* Enough place before */
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rdev->mc.vram_location = rdev->mc.gtt_location -
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rdev->mc.vram_location = rdev->mc.gtt_location -
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rdev->mc.mc_vram_size;
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rdev->mc.mc_vram_size;
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} else if (tmp > rdev->mc.mc_vram_size) {
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} else if (tmp > rdev->mc.mc_vram_size) {
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/* Enought place after */
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/* Enough place after */
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rdev->mc.vram_location = rdev->mc.gtt_location +
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rdev->mc.vram_location = rdev->mc.gtt_location +
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rdev->mc.gtt_size;
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rdev->mc.gtt_size;
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} else {
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} else {
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@ -237,6 +237,18 @@ int radeon_agp_init(struct radeon_device *rdev)
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#endif
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#endif
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}
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}
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void radeon_agp_resume(struct radeon_device *rdev)
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{
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#if __OS_HAS_AGP
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int r;
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if (rdev->flags & RADEON_IS_AGP) {
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r = radeon_agp_init(rdev);
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if (r)
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dev_warn(rdev->dev, "radeon AGP reinit failed\n");
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}
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#endif
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}
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void radeon_agp_fini(struct radeon_device *rdev)
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void radeon_agp_fini(struct radeon_device *rdev)
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{
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{
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#if __OS_HAS_AGP
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#if __OS_HAS_AGP
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@ -566,8 +566,9 @@ static enum drm_connector_status radeon_vga_detect(struct drm_connector *connect
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radeon_i2c_do_lock(radeon_connector, 0);
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radeon_i2c_do_lock(radeon_connector, 0);
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if (!radeon_connector->edid) {
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if (!radeon_connector->edid) {
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DRM_ERROR("DDC responded but not EDID found for %s\n",
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DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
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drm_get_connector_name(connector));
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drm_get_connector_name(connector));
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ret = connector_status_connected;
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} else {
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} else {
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radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
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radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
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@ -720,7 +721,7 @@ static enum drm_connector_status radeon_dvi_detect(struct drm_connector *connect
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radeon_i2c_do_lock(radeon_connector, 0);
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radeon_i2c_do_lock(radeon_connector, 0);
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if (!radeon_connector->edid) {
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if (!radeon_connector->edid) {
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DRM_ERROR("DDC responded but not EDID found for %s\n",
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DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
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drm_get_connector_name(connector));
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drm_get_connector_name(connector));
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} else {
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} else {
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radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
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radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
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@ -1070,10 +1071,6 @@ radeon_add_legacy_connector(struct drm_device *dev,
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uint32_t subpixel_order = SubPixelNone;
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uint32_t subpixel_order = SubPixelNone;
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int ret;
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int ret;
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ENTER();
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dbgprintf("id %d device %x type %x i2c %x\n",
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connector_id, supported_device, connector_type, i2c_bus);
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/* fixme - tv/cv/din */
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/* fixme - tv/cv/din */
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if (connector_type == DRM_MODE_CONNECTOR_Unknown)
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if (connector_type == DRM_MODE_CONNECTOR_Unknown)
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return;
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return;
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@ -1083,7 +1080,6 @@ radeon_add_legacy_connector(struct drm_device *dev,
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radeon_connector = to_radeon_connector(connector);
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radeon_connector = to_radeon_connector(connector);
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if (radeon_connector->connector_id == connector_id) {
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if (radeon_connector->connector_id == connector_id) {
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radeon_connector->devices |= supported_device;
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radeon_connector->devices |= supported_device;
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LEAVE();
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return;
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return;
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}
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}
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}
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}
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@ -1154,6 +1150,13 @@ radeon_add_legacy_connector(struct drm_device *dev,
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if (ret)
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if (ret)
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goto failed;
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goto failed;
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radeon_connector->dac_load_detect = true;
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radeon_connector->dac_load_detect = true;
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/* RS400,RC410,RS480 chipset seems to report a lot
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* of false positive on load detect, we haven't yet
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* found a way to make load detect reliable on those
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* chipset, thus just disable it for TV.
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*/
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if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480)
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radeon_connector->dac_load_detect = false;
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drm_connector_attach_property(&radeon_connector->base,
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drm_connector_attach_property(&radeon_connector->base,
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rdev->mode_info.load_detect_property,
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rdev->mode_info.load_detect_property,
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1);
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1);
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@ -1178,7 +1181,6 @@ radeon_add_legacy_connector(struct drm_device *dev,
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connector->display_info.subpixel_order = subpixel_order;
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connector->display_info.subpixel_order = subpixel_order;
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drm_sysfs_connector_add(connector);
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drm_sysfs_connector_add(connector);
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LEAVE();
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return;
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return;
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|
|
||||||
failed:
|
failed:
|
||||||
@ -1186,5 +1188,4 @@ failed:
|
|||||||
radeon_i2c_destroy(radeon_connector->ddc_bus);
|
radeon_i2c_destroy(radeon_connector->ddc_bus);
|
||||||
drm_connector_cleanup(connector);
|
drm_connector_cleanup(connector);
|
||||||
kfree(connector);
|
kfree(connector);
|
||||||
LEAVE();
|
|
||||||
}
|
}
|
||||||
|
@ -895,7 +895,7 @@ u32_t drvEntry(int action, char *cmdline)
|
|||||||
return 0;
|
return 0;
|
||||||
};
|
};
|
||||||
}
|
}
|
||||||
dbgprintf("Radeon RC07 cmdline %s\n", cmdline);
|
dbgprintf("Radeon RC08 cmdline %s\n", cmdline);
|
||||||
|
|
||||||
enum_pci_devices();
|
enum_pci_devices();
|
||||||
|
|
||||||
|
@ -397,7 +397,7 @@ int radeon_gem_fb_object_create(struct radeon_device *rdev, int size,
|
|||||||
vm_node = kzalloc(sizeof(*vm_node),0);
|
vm_node = kzalloc(sizeof(*vm_node),0);
|
||||||
|
|
||||||
vm_node->free = 0;
|
vm_node->free = 0;
|
||||||
vm_node->size = 0x800000 >> 12;
|
vm_node->size = 0xC00000 >> 12;
|
||||||
vm_node->start = 0;
|
vm_node->start = 0;
|
||||||
vm_node->mm = NULL;
|
vm_node->mm = NULL;
|
||||||
|
|
||||||
|
@ -52,8 +52,8 @@ int radeon_object_init(struct radeon_device *rdev)
|
|||||||
|
|
||||||
ENTER();
|
ENTER();
|
||||||
|
|
||||||
r = drm_mm_init(&mm_vram, 0x800000 >> PAGE_SHIFT,
|
r = drm_mm_init(&mm_vram, 0xC00000 >> PAGE_SHIFT,
|
||||||
((rdev->mc.real_vram_size - 0x800000) >> PAGE_SHIFT));
|
((rdev->mc.real_vram_size - 0xC00000) >> PAGE_SHIFT));
|
||||||
if (r) {
|
if (r) {
|
||||||
DRM_ERROR("Failed initializing VRAM heap.\n");
|
DRM_ERROR("Failed initializing VRAM heap.\n");
|
||||||
return r;
|
return r;
|
||||||
@ -297,8 +297,6 @@ int radeon_object_kmap(struct radeon_object *robj, void **ptr)
|
|||||||
(robj->vm_addr << PAGE_SHIFT);
|
(robj->vm_addr << PAGE_SHIFT);
|
||||||
robj->kptr = (void*)MapIoMem(robj->cpu_addr,
|
robj->kptr = (void*)MapIoMem(robj->cpu_addr,
|
||||||
robj->mm_node->size << 12, PG_SW);
|
robj->mm_node->size << 12, PG_SW);
|
||||||
// dbgprintf("map io mem %x at %x\n", robj->cpu_addr, robj->kptr);
|
|
||||||
|
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
@ -328,7 +326,6 @@ void radeon_object_kunmap(struct radeon_object *robj)
|
|||||||
// spin_unlock(&robj->tobj.lock);
|
// spin_unlock(&robj->tobj.lock);
|
||||||
}
|
}
|
||||||
|
|
||||||
#if 0
|
|
||||||
|
|
||||||
void radeon_object_unpin(struct radeon_object *robj)
|
void radeon_object_unpin(struct radeon_object *robj)
|
||||||
{
|
{
|
||||||
@ -347,24 +344,14 @@ void radeon_object_unpin(struct radeon_object *robj)
|
|||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
// spin_unlock(&robj->tobj.lock);
|
// spin_unlock(&robj->tobj.lock);
|
||||||
r = radeon_object_reserve(robj, false);
|
|
||||||
if (unlikely(r != 0)) {
|
drm_mm_put_block(robj->mm_node);
|
||||||
DRM_ERROR("radeon: failed to reserve object for unpinning it.\n");
|
|
||||||
return;
|
kfree(robj);
|
||||||
}
|
|
||||||
flags = robj->tobj.mem.placement;
|
|
||||||
robj->tobj.proposed_placement = flags & ~TTM_PL_FLAG_NO_EVICT;
|
|
||||||
r = ttm_buffer_object_validate(&robj->tobj,
|
|
||||||
robj->tobj.proposed_placement,
|
|
||||||
false, false);
|
|
||||||
if (unlikely(r != 0)) {
|
|
||||||
DRM_ERROR("radeon: failed to unpin buffer.\n");
|
|
||||||
}
|
|
||||||
radeon_object_unreserve(robj);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
#if 0
|
||||||
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
@ -13,6 +13,11 @@ display_t *rdisplay;
|
|||||||
static cursor_t* __stdcall select_cursor(cursor_t *cursor);
|
static cursor_t* __stdcall select_cursor(cursor_t *cursor);
|
||||||
static void __stdcall move_cursor(cursor_t *cursor, int x, int y);
|
static void __stdcall move_cursor(cursor_t *cursor, int x, int y);
|
||||||
|
|
||||||
|
extern void destroy_cursor(void);
|
||||||
|
|
||||||
|
void disable_mouse(void)
|
||||||
|
{};
|
||||||
|
|
||||||
int init_cursor(cursor_t *cursor)
|
int init_cursor(cursor_t *cursor)
|
||||||
{
|
{
|
||||||
struct radeon_device *rdev;
|
struct radeon_device *rdev;
|
||||||
@ -55,9 +60,20 @@ int init_cursor(cursor_t *cursor)
|
|||||||
|
|
||||||
radeon_object_kunmap(cursor->robj);
|
radeon_object_kunmap(cursor->robj);
|
||||||
|
|
||||||
|
cursor->header.destroy = destroy_cursor;
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
void fini_cursor(cursor_t *cursor)
|
||||||
|
{
|
||||||
|
list_del(&cursor->list);
|
||||||
|
radeon_object_unpin(cursor->robj);
|
||||||
|
KernelFree(cursor->data);
|
||||||
|
__DestroyObject(cursor);
|
||||||
|
};
|
||||||
|
|
||||||
|
|
||||||
static void radeon_show_cursor()
|
static void radeon_show_cursor()
|
||||||
{
|
{
|
||||||
struct radeon_device *rdev = (struct radeon_device *)rdisplay->ddev->dev_private;
|
struct radeon_device *rdev = (struct radeon_device *)rdisplay->ddev->dev_private;
|
||||||
@ -188,6 +204,7 @@ bool init_display(struct radeon_device *rdev, mode_t *usermode)
|
|||||||
rdisplay->show_cursor = NULL;
|
rdisplay->show_cursor = NULL;
|
||||||
rdisplay->move_cursor = move_cursor;
|
rdisplay->move_cursor = move_cursor;
|
||||||
rdisplay->restore_cursor = restore_cursor;
|
rdisplay->restore_cursor = restore_cursor;
|
||||||
|
rdisplay->disable_mouse = disable_mouse;
|
||||||
|
|
||||||
select_cursor(rdisplay->cursor);
|
select_cursor(rdisplay->cursor);
|
||||||
radeon_show_cursor();
|
radeon_show_cursor();
|
||||||
|
@ -14,6 +14,8 @@ static void __stdcall move_cursor_kms(cursor_t *cursor, int x, int y);
|
|||||||
|
|
||||||
int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled);
|
int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled);
|
||||||
|
|
||||||
|
void disable_mouse(void);
|
||||||
|
|
||||||
static void radeon_show_cursor_kms(struct drm_crtc *crtc)
|
static void radeon_show_cursor_kms(struct drm_crtc *crtc)
|
||||||
{
|
{
|
||||||
struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
|
struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
|
||||||
@ -369,6 +371,7 @@ bool init_display_kms(struct radeon_device *rdev, mode_t *usermode)
|
|||||||
rdisplay->show_cursor = NULL;
|
rdisplay->show_cursor = NULL;
|
||||||
rdisplay->move_cursor = move_cursor_kms;
|
rdisplay->move_cursor = move_cursor_kms;
|
||||||
rdisplay->restore_cursor = restore_cursor;
|
rdisplay->restore_cursor = restore_cursor;
|
||||||
|
rdisplay->disable_mouse = disable_mouse;
|
||||||
|
|
||||||
select_cursor_kms(rdisplay->cursor);
|
select_cursor_kms(rdisplay->cursor);
|
||||||
radeon_show_cursor_kms(rdisplay->crtc);
|
radeon_show_cursor_kms(rdisplay->crtc);
|
||||||
|
@ -142,8 +142,6 @@ int rv515_mc_wait_for_idle(struct radeon_device *rdev)
|
|||||||
|
|
||||||
void rv515_vga_render_disable(struct radeon_device *rdev)
|
void rv515_vga_render_disable(struct radeon_device *rdev)
|
||||||
{
|
{
|
||||||
WREG32(R_000330_D1VGA_CONTROL, 0);
|
|
||||||
WREG32(R_000338_D2VGA_CONTROL, 0);
|
|
||||||
WREG32(R_000300_VGA_RENDER_CONTROL,
|
WREG32(R_000300_VGA_RENDER_CONTROL,
|
||||||
RREG32(R_000300_VGA_RENDER_CONTROL) & C_000300_VGA_VSTATUS_CNTL);
|
RREG32(R_000300_VGA_RENDER_CONTROL) & C_000300_VGA_VSTATUS_CNTL);
|
||||||
}
|
}
|
||||||
@ -391,7 +389,6 @@ void rv515_mc_stop(struct radeon_device *rdev, struct rv515_mc_save *save)
|
|||||||
save->d2crtc_control = RREG32(R_006880_D2CRTC_CONTROL);
|
save->d2crtc_control = RREG32(R_006880_D2CRTC_CONTROL);
|
||||||
|
|
||||||
/* Stop all video */
|
/* Stop all video */
|
||||||
WREG32(R_000330_D1VGA_CONTROL, 0);
|
|
||||||
WREG32(R_0068E8_D2CRTC_UPDATE_LOCK, 0);
|
WREG32(R_0068E8_D2CRTC_UPDATE_LOCK, 0);
|
||||||
WREG32(R_000300_VGA_RENDER_CONTROL, 0);
|
WREG32(R_000300_VGA_RENDER_CONTROL, 0);
|
||||||
WREG32(R_0060E8_D1CRTC_UPDATE_LOCK, 1);
|
WREG32(R_0060E8_D1CRTC_UPDATE_LOCK, 1);
|
||||||
@ -400,6 +397,8 @@ void rv515_mc_stop(struct radeon_device *rdev, struct rv515_mc_save *save)
|
|||||||
WREG32(R_006880_D2CRTC_CONTROL, 0);
|
WREG32(R_006880_D2CRTC_CONTROL, 0);
|
||||||
WREG32(R_0060E8_D1CRTC_UPDATE_LOCK, 0);
|
WREG32(R_0060E8_D1CRTC_UPDATE_LOCK, 0);
|
||||||
WREG32(R_0068E8_D2CRTC_UPDATE_LOCK, 0);
|
WREG32(R_0068E8_D2CRTC_UPDATE_LOCK, 0);
|
||||||
|
WREG32(R_000330_D1VGA_CONTROL, 0);
|
||||||
|
WREG32(R_000338_D2VGA_CONTROL, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
void rv515_mc_resume(struct radeon_device *rdev, struct rv515_mc_save *save)
|
void rv515_mc_resume(struct radeon_device *rdev, struct rv515_mc_save *save)
|
||||||
@ -413,14 +412,14 @@ void rv515_mc_resume(struct radeon_device *rdev, struct rv515_mc_save *save)
|
|||||||
WREG32(R_000328_VGA_HDP_CONTROL, save->vga_hdp_control);
|
WREG32(R_000328_VGA_HDP_CONTROL, save->vga_hdp_control);
|
||||||
mdelay(1);
|
mdelay(1);
|
||||||
/* Restore video state */
|
/* Restore video state */
|
||||||
|
WREG32(R_000330_D1VGA_CONTROL, save->d1vga_control);
|
||||||
|
WREG32(R_000338_D2VGA_CONTROL, save->d2vga_control);
|
||||||
WREG32(R_0060E8_D1CRTC_UPDATE_LOCK, 1);
|
WREG32(R_0060E8_D1CRTC_UPDATE_LOCK, 1);
|
||||||
WREG32(R_0068E8_D2CRTC_UPDATE_LOCK, 1);
|
WREG32(R_0068E8_D2CRTC_UPDATE_LOCK, 1);
|
||||||
WREG32(R_006080_D1CRTC_CONTROL, save->d1crtc_control);
|
WREG32(R_006080_D1CRTC_CONTROL, save->d1crtc_control);
|
||||||
WREG32(R_006880_D2CRTC_CONTROL, save->d2crtc_control);
|
WREG32(R_006880_D2CRTC_CONTROL, save->d2crtc_control);
|
||||||
WREG32(R_0060E8_D1CRTC_UPDATE_LOCK, 0);
|
WREG32(R_0060E8_D1CRTC_UPDATE_LOCK, 0);
|
||||||
WREG32(R_0068E8_D2CRTC_UPDATE_LOCK, 0);
|
WREG32(R_0068E8_D2CRTC_UPDATE_LOCK, 0);
|
||||||
WREG32(R_000330_D1VGA_CONTROL, save->d1vga_control);
|
|
||||||
WREG32(R_000338_D2VGA_CONTROL, save->d2vga_control);
|
|
||||||
WREG32(R_000300_VGA_RENDER_CONTROL, save->vga_render_control);
|
WREG32(R_000300_VGA_RENDER_CONTROL, save->vga_render_control);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -831,11 +831,11 @@ int rv770_mc_init(struct radeon_device *rdev)
|
|||||||
* AGP so that GPU can catch out of VRAM/AGP access
|
* AGP so that GPU can catch out of VRAM/AGP access
|
||||||
*/
|
*/
|
||||||
if (rdev->mc.gtt_location > rdev->mc.mc_vram_size) {
|
if (rdev->mc.gtt_location > rdev->mc.mc_vram_size) {
|
||||||
/* Enought place before */
|
/* Enough place before */
|
||||||
rdev->mc.vram_location = rdev->mc.gtt_location -
|
rdev->mc.vram_location = rdev->mc.gtt_location -
|
||||||
rdev->mc.mc_vram_size;
|
rdev->mc.mc_vram_size;
|
||||||
} else if (tmp > rdev->mc.mc_vram_size) {
|
} else if (tmp > rdev->mc.mc_vram_size) {
|
||||||
/* Enought place after */
|
/* Enough place after */
|
||||||
rdev->mc.vram_location = rdev->mc.gtt_location +
|
rdev->mc.vram_location = rdev->mc.gtt_location +
|
||||||
rdev->mc.gtt_size;
|
rdev->mc.gtt_size;
|
||||||
} else {
|
} else {
|
||||||
|
@ -338,37 +338,58 @@ addr_t __fastcall mem_alloc(size_t size, u32_t flags)
|
|||||||
addr_t *pte = &((addr_t*)page_tabs)[heap >> PAGE_WIDTH];
|
addr_t *pte = &((addr_t*)page_tabs)[heap >> PAGE_WIDTH];
|
||||||
addr_t *mpte = &map->pte[0];
|
addr_t *mpte = &map->pte[0];
|
||||||
|
|
||||||
#if 0
|
mem = heap;
|
||||||
|
|
||||||
if( flags & PG_MAP )
|
if( flags & PG_MAP )
|
||||||
|
{
|
||||||
|
|
||||||
|
#ifdef ALLOC_IMM
|
||||||
|
|
||||||
|
while( pages )
|
||||||
|
{
|
||||||
|
u32_t order;
|
||||||
|
addr_t page_frame;
|
||||||
|
|
||||||
|
asm volatile ("bsr %0, %1":"=&r"(order):"r"(tmp):"cc");
|
||||||
|
asm volatile ("btr %0, %1" :"=r"(tmp):"r"(order):"cc");
|
||||||
|
|
||||||
|
page_frame = frame_alloc(1 << order) | (flags & 0xFFF);
|
||||||
|
|
||||||
|
for(i = 0; i < 1 << order; i++)
|
||||||
|
{
|
||||||
|
*pte++ = 0; //page;
|
||||||
|
*mpte++ = page;
|
||||||
|
|
||||||
|
asm volatile ( "invlpg (%0)" ::"r" (mem) );
|
||||||
|
mem+= 4096;
|
||||||
|
};
|
||||||
|
}
|
||||||
|
#else
|
||||||
|
|
||||||
page = PG_DEMAND | (flags & 0xFFF);
|
page = PG_DEMAND | (flags & 0xFFF);
|
||||||
|
|
||||||
mem = heap;
|
while(pages--)
|
||||||
while(pages--)
|
{
|
||||||
{
|
*pte++ = 0;
|
||||||
*pte++ = 0; //page;
|
*mpte++ = page;
|
||||||
*mpte++ = page;
|
asm volatile ( "invlpg (%0)" ::"r" (mem) );
|
||||||
|
mem+= 4096;
|
||||||
asm volatile ( "invlpg (%0)" ::"r" (mem) );
|
};
|
||||||
mem+= 4096;
|
|
||||||
};
|
|
||||||
#else
|
|
||||||
mem = heap;
|
|
||||||
|
|
||||||
while(pages--)
|
|
||||||
{
|
|
||||||
if( flags & PG_MAP )
|
|
||||||
page = alloc_page();
|
|
||||||
|
|
||||||
page |= flags & 0xFFF;
|
|
||||||
|
|
||||||
*pte++ = 0;
|
|
||||||
*mpte++ = page;
|
|
||||||
|
|
||||||
asm volatile ( "invlpg (%0)" ::"r" (mem) );
|
|
||||||
mem+= 4096;
|
|
||||||
};
|
|
||||||
#endif
|
#endif
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
while(pages--)
|
||||||
|
{
|
||||||
|
*pte++ = 0; //page;
|
||||||
|
*mpte++ = 0;
|
||||||
|
|
||||||
|
asm volatile ( "invlpg (%0)" ::"r" (mem) );
|
||||||
|
mem+= 4096;
|
||||||
|
};
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif
|
||||||
DBG("%s %x size %d order %d\n", __FUNCTION__, heap, size, order);
|
DBG("%s %x size %d order %d\n", __FUNCTION__, heap, size, order);
|
||||||
|
|
||||||
return heap;
|
return heap;
|
||||||
@ -429,8 +450,10 @@ void __fastcall mem_free(addr_t addr)
|
|||||||
spinlock_unlock(&z_heap.lock);
|
spinlock_unlock(&z_heap.lock);
|
||||||
safe_sti(efl);
|
safe_sti(efl);
|
||||||
|
|
||||||
for( i = 0; i < (map->size >> PAGE_WIDTH); i++)
|
for( i = 0; i < (map->size >> PAGE_WIDTH); )
|
||||||
frame_free(map->pte[i]);
|
{
|
||||||
|
i+= frame_free(map->pte[i]);
|
||||||
|
}
|
||||||
|
|
||||||
frame_free( KA2PA(map) );
|
frame_free( KA2PA(map) );
|
||||||
}
|
}
|
||||||
@ -441,7 +464,6 @@ void __fastcall mem_free(addr_t addr)
|
|||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
void __fastcall heap_fault(addr_t faddr, u32_t code)
|
void __fastcall heap_fault(addr_t faddr, u32_t code)
|
||||||
{
|
{
|
||||||
index_t idx;
|
index_t idx;
|
||||||
@ -466,7 +488,6 @@ void __fastcall heap_fault(addr_t faddr, u32_t code)
|
|||||||
|
|
||||||
if( page != 0)
|
if( page != 0)
|
||||||
{
|
{
|
||||||
#if 0
|
|
||||||
if( page & PG_DEMAND)
|
if( page & PG_DEMAND)
|
||||||
{
|
{
|
||||||
page &= ~PG_DEMAND;
|
page &= ~PG_DEMAND;
|
||||||
@ -474,7 +495,6 @@ void __fastcall heap_fault(addr_t faddr, u32_t code)
|
|||||||
|
|
||||||
map->pte[idx] = page;
|
map->pte[idx] = page;
|
||||||
};
|
};
|
||||||
#endif
|
|
||||||
((addr_t*)page_tabs)[faddr >> PAGE_WIDTH] = page;
|
((addr_t*)page_tabs)[faddr >> PAGE_WIDTH] = page;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
@ -449,13 +449,17 @@ struc CURSOR
|
|||||||
.base dd ? ;allocated memory
|
.base dd ? ;allocated memory
|
||||||
.hot_x dd ? ;hotspot coords
|
.hot_x dd ? ;hotspot coords
|
||||||
.hot_y dd ?
|
.hot_y dd ?
|
||||||
|
|
||||||
|
.list_next dd ? ;next cursor in cursor list
|
||||||
|
.list_prev dd ? ;prev cursor in cursor list
|
||||||
|
.dev_obj dd ? ;device depended data
|
||||||
|
|
||||||
.sizeof:
|
.sizeof:
|
||||||
}
|
}
|
||||||
virtual at 0
|
virtual at 0
|
||||||
CURSOR CURSOR
|
CURSOR CURSOR
|
||||||
end virtual
|
end virtual
|
||||||
|
|
||||||
CURSOR_SIZE equ 32
|
|
||||||
|
|
||||||
struc EVENT
|
struc EVENT
|
||||||
{
|
{
|
||||||
|
@ -300,7 +300,7 @@ vesa_cursor:
|
|||||||
push ebx
|
push ebx
|
||||||
|
|
||||||
mov ebx, eax
|
mov ebx, eax
|
||||||
mov eax, CURSOR_SIZE
|
mov eax, CURSOR.sizeof
|
||||||
call create_kernel_object
|
call create_kernel_object
|
||||||
test eax, eax
|
test eax, eax
|
||||||
jz .fail
|
jz .fail
|
||||||
|
Loading…
Reference in New Issue
Block a user