map_io_mem: set proper region size

git-svn-id: svn://kolibrios.org@2217 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
Sergey Semyonov (Serge) 2011-09-20 21:11:22 +00:00
parent 8ec96e9db0
commit 9447e850cf
3 changed files with 246 additions and 247 deletions

View File

@ -17,19 +17,19 @@ IOAPIC_base rd 1
LAPIC_BASE rd 1
endg
APIC_ID equ 0x20
APIC_TPR equ 0x80
APIC_EOI equ 0xb0
APIC_LDR equ 0xd0
APIC_DFR equ 0xe0
APIC_SVR equ 0xf0
APIC_ISR equ 0x100
APIC_ESR equ 0x280
APIC_ICRL equ 0x300
APIC_ICRH equ 0x310
APIC_ID equ 0x20
APIC_TPR equ 0x80
APIC_EOI equ 0xb0
APIC_LDR equ 0xd0
APIC_DFR equ 0xe0
APIC_SVR equ 0xf0
APIC_ISR equ 0x100
APIC_ESR equ 0x280
APIC_ICRL equ 0x300
APIC_ICRH equ 0x310
APIC_LVT_LINT0 equ 0x350
APIC_LVT_LINT1 equ 0x360
APIC_LVT_err equ 0x370
APIC_LVT_err equ 0x370
; APIC timer
APIC_LVT_timer equ 0x320
@ -37,95 +37,99 @@ APIC_timer_div equ 0x3e0
APIC_timer_init equ 0x380
APIC_timer_cur equ 0x390
; IOAPIC
IOAPIC_ID equ 0x0
IOAPIC_VER equ 0x1
IOAPIC_ARB equ 0x2
IOAPIC_REDTBL equ 0x10
IOAPIC_ID equ 0x0
IOAPIC_VER equ 0x1
IOAPIC_ARB equ 0x2
IOAPIC_REDTBL equ 0x10
align 4
APIC_init:
mov dword[APIC], 0
mov dword[APIC], 0
mov eax, [acpi_ioapic_base]
test eax, eax
jz .no_apic
mov eax, [acpi_ioapic_base]
test eax, eax
jz .no_apic
call IRQ_mask_all
call IRQ_mask_all
; IOAPIC init
stdcall map_io_mem, [acpi_ioapic_base], 0x20, PG_SW
mov [IOAPIC_base], eax
stdcall map_io_mem, [acpi_ioapic_base], 0x20, PG_SW
mov [IOAPIC_base], eax
mov eax, IOAPIC_VER
call IOAPIC_read
shr eax, 16
inc al
movzx eax, al
cmp al, IRQ_RESERVED
jbe @f
mov al, IRQ_RESERVED
mov eax, IOAPIC_VER
call IOAPIC_read
shr eax, 16
inc al
movzx eax, al
cmp al, IRQ_RESERVED
jbe @f
mov al, IRQ_RESERVED
@@:
mov [IRQ_COUNT], eax
mov [IRQ_COUNT], eax
; Reroute IOAPIC & mask all interrupts
xor ecx, ecx
mov eax, IOAPIC_REDTBL
@@: mov ebx, eax
call IOAPIC_read
mov ah, 0x09 ; Delivery Mode: Lowest Priority, Destination Mode: Logical
mov al, cl
add al, 0x20 ; vector
or eax, 0x10000 ; Mask Interrupt
cmp ecx, 16
jb .set
or eax, 0xa000 ;<<< level-triggered active-low for IRQ16+
xor ecx, ecx
mov eax, IOAPIC_REDTBL
@@:
mov ebx, eax
call IOAPIC_read
mov ah, 0x09 ; Delivery Mode: Lowest Priority, Destination Mode: Logical
mov al, cl
add al, 0x20 ; vector
or eax, 0x10000 ; Mask Interrupt
cmp ecx, 16
jb .set
or eax, 0xa000 ;<<< level-triggered active-low for IRQ16+
.set:
xchg eax, ebx
call IOAPIC_write
inc eax
mov ebx, eax
call IOAPIC_read
or eax, 0xff000000 ; Destination Field
xchg eax, ebx
call IOAPIC_write
inc eax
inc ecx
cmp ecx, [IRQ_COUNT]
jb @b
xchg eax, ebx
call IOAPIC_write
inc eax
mov ebx, eax
call IOAPIC_read
or eax, 0xff000000 ; Destination Field
xchg eax, ebx
call IOAPIC_write
inc eax
inc ecx
cmp ecx, [IRQ_COUNT]
jb @b
call LAPIC_init
call LAPIC_init
mov dword[APIC], 0xffffffff
mov dword[APIC], 0xffffffff
mov al, 0x70
out 0x22, al
mov al, 1
out 0x23, al
mov al, 0x70
out 0x22, al
mov al, 1
out 0x23, al
; mov dword[irq_type_to_set], IRQ_TYPE_APIC
.no_apic:
;init handlers table
mov ecx, IRQ_RESERVED
mov edi, irqh_tab
mov ecx, IRQ_RESERVED
mov edi, irqh_tab
@@:
mov eax, edi
stosd
stosd
loop @B
mov ecx, 47
mov eax, irqh_pool+IRQH.sizeof
mov [next_irqh], irqh_pool
mov eax, edi
stosd
stosd
loop @B
mov ecx, 47
mov eax, irqh_pool+IRQH.sizeof
mov [next_irqh], irqh_pool
@@:
mov [eax-IRQH.sizeof], eax
add eax, IRQH.sizeof
loop @B
mov [eax-IRQH.sizeof], eax
add eax, IRQH.sizeof
loop @B
mov [eax-IRQH.sizeof], dword 0
mov [eax-IRQH.sizeof], dword 0
.no_apic:
ret
ret
;===========================================================
align 4
@ -137,158 +141,148 @@ LAPIC_init:
; rdmsr ; it may be replaced to
; and ax, 0xf000 ; mov eax, 0xfee00000
stdcall map_io_mem, [acpi_lapic_base], 0x1000, PG_SW
mov [LAPIC_BASE], eax
mov esi, eax
stdcall map_io_mem, [acpi_lapic_base], 0x1000, PG_SW
mov [LAPIC_BASE], eax
mov esi, eax
; Program Destination Format Register for Flat mode.
mov eax, [esi + APIC_DFR]
or eax, 0xf0000000
mov [esi + APIC_DFR], eax
mov eax, [esi + APIC_DFR]
or eax, 0xf0000000
mov [esi + APIC_DFR], eax
; Program Logical Destination Register.
mov eax, [esi + APIC_LDR]
;and eax, 0xff000000
and eax, 0x00ffffff
or eax, 0x01000000 ;!!!!!!!!!!!!
mov [esi + APIC_LDR], eax
mov eax, [esi + APIC_LDR]
;and eax, 0xff000000
and eax, 0x00ffffff
or eax, 0x01000000 ;!!!!!!!!!!!!
mov [esi + APIC_LDR], eax
; Task Priority Register initialization.
mov eax, [esi + APIC_TPR]
and eax, 0xffffff00
mov [esi + APIC_TPR], eax
mov eax, [esi + APIC_TPR]
and eax, 0xffffff00
mov [esi + APIC_TPR], eax
; Flush the queue
mov edx, 0
.nxt2: mov ecx, 32
mov eax, [esi + APIC_ISR + edx]
.nxt: shr eax, 1
jnc @f
mov dword [esi + APIC_EOI], 0 ; EOI
@@: loop .nxt
add edx, 0x10
cmp edx, 0x170
jbe .nxt2
mov edx, 0
.nxt2:
mov ecx, 32
mov eax, [esi + APIC_ISR + edx]
.nxt:
shr eax, 1
jnc @f
mov dword [esi + APIC_EOI], 0 ; EOI
@@:
loop .nxt
add edx, 0x10
cmp edx, 0x170
jbe .nxt2
; Spurious-Interrupt Vector Register initialization.
mov eax, [esi + APIC_SVR]
or eax, 0x1ff
and eax, 0xfffffdff
mov [esi + APIC_SVR], eax
mov eax, [esi + APIC_SVR]
or eax, 0x1ff
and eax, 0xfffffdff
mov [esi + APIC_SVR], eax
; Initialize LVT LINT0 register. (INTR)
mov eax, 0x00700
; mov eax, 0x10700
mov [esi + APIC_LVT_LINT0], eax
mov eax, 0x00700
; mov eax, 0x10700
mov [esi + APIC_LVT_LINT0], eax
; Initialize LVT LINT1 register. (NMI)
mov eax, 0x00400
mov [esi + APIC_LVT_LINT1], eax
mov eax, 0x00400
mov [esi + APIC_LVT_LINT1], eax
; Initialize LVT Error register.
mov eax, [esi + APIC_LVT_err]
or eax, 0x10000 ; bit 16
mov [esi + APIC_LVT_err], eax
mov eax, [esi + APIC_LVT_err]
or eax, 0x10000 ; bit 16
mov [esi + APIC_LVT_err], eax
; LAPIC timer
; pre init
mov dword[esi + APIC_timer_div], 1011b ; 1
mov dword[esi + APIC_timer_init], 0xffffffff ; max val
push esi
mov esi, 640 ; wait 0.64 sec
call delay_ms
pop esi
mov eax, [esi + APIC_timer_cur] ; read current tick couner
xor eax, 0xffffffff ; eax = 0xffffffff - eax
shr eax, 6 ; eax /= 64; APIC ticks per 0.01 sec
mov dword[esi + APIC_timer_div], 1011b ; 1
mov dword[esi + APIC_timer_init], 0xffffffff ; max val
push esi
mov esi, 640 ; wait 0.64 sec
call delay_ms
pop esi
mov eax, [esi + APIC_timer_cur] ; read current tick couner
xor eax, 0xffffffff ; eax = 0xffffffff - eax
shr eax, 6 ; eax /= 64; APIC ticks per 0.01 sec
; Start (every 0.01 sec)
mov dword[esi + APIC_LVT_timer], 0x30020 ; periodic int 0x20
mov dword[esi + APIC_timer_init], eax
mov dword[esi + APIC_LVT_timer], 0x30020 ; periodic int 0x20
mov dword[esi + APIC_timer_init], eax
ret
ret
;===========================================================
; IOAPIC implementation
align 4
IOAPIC_read:
; in : EAX - IOAPIC register
; out: EAX - readed value
push esi
mov esi, [IOAPIC_base]
mov [esi], eax
mov eax, [esi + 0x10]
pop esi
ret
push esi
mov esi, [IOAPIC_base]
mov [esi], eax
mov eax, [esi + 0x10]
pop esi
ret
align 4
IOAPIC_write:
; in : EAX - IOAPIC register
; EBX - value
; out: none
push esi
mov esi, [IOAPIC_base]
mov [esi], eax
mov [esi + 0x10], ebx
pop esi
ret
push esi
mov esi, [IOAPIC_base]
mov [esi], eax
mov [esi + 0x10], ebx
pop esi
ret
;===========================================================
; Remap all IRQ to 0x20+ Vectors
; IRQ0 to vector 0x20, IRQ1 to vector 0x21....
PIC_init:
cli
mov al,0x11 ; icw4, edge triggered
out 0x20,al
call pic_delay
out 0xA0,al
call pic_delay
cli
mov al,0x11 ; icw4, edge triggered
out 0x20,al
out 0xA0,al
mov al,0x20 ; generate 0x20 +
out 0x21,al
call pic_delay
mov al,0x28 ; generate 0x28 +
out 0xA1,al
call pic_delay
mov al,0x20 ; generate 0x20 +
out 0x21,al
mov al,0x28 ; generate 0x28 +
out 0xA1,al
mov al,0x04 ; slave at irq2
out 0x21,al
call pic_delay
mov al,0x02 ; at irq9
out 0xA1,al
call pic_delay
mov al,0x04 ; slave at irq2
out 0x21,al
mov al,0x02 ; at irq9
out 0xA1,al
mov al,0x01 ; 8086 mode
out 0x21,al
call pic_delay
out 0xA1,al
call pic_delay
mov al,0x01 ; 8086 mode
out 0x21,al
out 0xA1,al
call IRQ_mask_all
cli
call IRQ_mask_all
; mov dword[irq_type_to_set], IRQ_TYPE_PIC
ret
; -----------------------------------------
pic_delay:
jmp pdl1
pdl1: ret
ret
; -----------------------------------------
; TIMER SET TO 1/100 S
PIT_init:
mov al,0x34 ; set to 100Hz
out 0x43,al
mov al,0x9b ; lsb 1193180 / 1193
out 0x40,al
mov al,0x2e ; msb
out 0x40,al
ret
mov al,0x34 ; set to 100Hz
out 0x43,al
mov al,0x9b ; lsb 1193180 / 1193
out 0x40,al
mov al,0x2e ; msb
out 0x40,al
ret
; -----------------------------------------
unmask_timer:
test dword[APIC], 0xffffffff
jnz @f
stdcall enable_irq, 0
ret
test dword[APIC], 0xffffffff
jnz @f
stdcall enable_irq, 0
ret
@@:
; use PIT
; in some systems PIT no connected to IOAPIC
@ -304,83 +298,85 @@ unmask_timer:
; ret
; use LAPIC timer
mov esi, [LAPIC_BASE]
mov eax, [esi + APIC_LVT_timer]
and eax, 0xfffeffff
mov [esi + APIC_LVT_timer], eax
ret
mov esi, [LAPIC_BASE]
mov eax, [esi + APIC_LVT_timer]
and eax, 0xfffeffff
mov [esi + APIC_LVT_timer], eax
ret
; -----------------------------------------
; Disable all IRQ
IRQ_mask_all:
test dword[APIC], 0xffffffff
jnz .APIC
mov al, 0xFF
out 0x21, al
out 0xA1, al
mov ecx,0x1000
cld
@@: call pic_delay
loop @b
ret
test dword[APIC], 0xffffffff
jnz .APIC
mov al, 0xFF
out 0x21, al
out 0xA1, al
mov ecx,0x1000
ret
.APIC:
mov ecx, [IRQ_COUNT]
mov eax, 0x10
@@: mov ebx, eax
call IOAPIC_read
or eax, 0x10000 ; bit 16
xchg eax, ebx
call IOAPIC_write
inc eax
inc eax
loop @b
ret
mov ecx, [IRQ_COUNT]
mov eax, 0x10
@@:
mov ebx, eax
call IOAPIC_read
or eax, 0x10000 ; bit 16
xchg eax, ebx
call IOAPIC_write
inc eax
inc eax
loop @b
ret
; -----------------------------------------
; End Of Interrupt
; cl - IRQ number
align 16
irq_eoi: ; __fastcall
test dword[APIC], 0xffffffff
jnz .APIC
cmp cl, 8
mov al, 0x20
jb @f
out 0xa0, al
test dword[APIC], 0xffffffff
jnz .APIC
cmp cl, 8
mov al, 0x20
jb @f
out 0xa0, al
@@:
out 0x20, al
ret
out 0x20, al
ret
.APIC:
mov eax, [LAPIC_BASE]
mov dword [eax + APIC_EOI], 0 ; EOI
ret
mov eax, [LAPIC_BASE]
mov dword [eax + APIC_EOI], 0 ; EOI
ret
; -----------------------------------------
; from dll.inc
align 4
proc enable_irq stdcall, irq_line:dword
mov ebx, [irq_line]
test dword[APIC], 0xffffffff
jnz .APIC
mov edx, 0x21
cmp ebx, 8
jb @F
mov edx, 0xA1
sub ebx,8
mov ebx, [irq_line]
test dword[APIC], 0xffffffff
jnz .APIC
mov edx, 0x21
cmp ebx, 8
jb @F
mov edx, 0xA1
sub ebx,8
@@:
in al,dx
btr eax, ebx
out dx, al
ret
in al,dx
btr eax, ebx
out dx, al
ret
.APIC:
shl ebx, 1
add ebx, 0x10
mov eax, ebx
call IOAPIC_read
and eax, 0xfffeffff ; bit 16
xchg eax, ebx
call IOAPIC_write
ret
shl ebx, 1
add ebx, 0x10
mov eax, ebx
call IOAPIC_read
and eax, 0xfffeffff ; bit 16
xchg eax, ebx
call IOAPIC_write
ret
endp

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@ -171,9 +171,14 @@ proc map_io_mem stdcall, base:dword, size:dword, flags:dword
push ebx
push edi
mov eax, [size]
add eax, [base]
add eax, 4095
and eax, -4096
mov ecx, [base]
and ecx, -4096
sub eax, ecx
mov [size], eax
stdcall alloc_kernel_space, eax
test eax, eax
jz .fail
@ -189,9 +194,7 @@ proc map_io_mem stdcall, base:dword, size:dword, flags:dword
or edx, [flags]
@@:
mov [page_tabs+eax*4], edx
; push eax
invlpg [ebx]
; pop eax
inc eax
add ebx, edi
add edx, edi

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@ -691,9 +691,9 @@ end if
movzx ecx, word [boot_y]
if lang eq ru
or ecx, (10+30*6) shl 16
else
else
or ecx, (10+29*6) shl 16
end if
end if
sub ecx, 10
mov edx, 0xFFFFFF
mov ebx, [MEM_AMOUNT]
@ -814,9 +814,9 @@ end if
movzx ecx, word [boot_y]
if lang eq ru
add ecx, (10+19*6) shl 16 - 10; 'Determining amount of memory'
else
else
add ecx, (10+17*6) shl 16 - 10; 'Determining amount of memory'
end if
end if
mov edx, 0xFFFFFF
xor edi,edi
mov eax, 0x00040000
@ -1013,15 +1013,15 @@ include 'fdo.inc'
align 4
boot_log:
pushad
pushad
mov ebx,10*65536
mov bx,word [boot_y]
add [boot_y],dword 10
mov ecx,0x80ffffff ; ASCIIZ string with white color
xor edi,edi
xor edi,edi
mov edx,esi
inc edi
inc edi
call dtext
mov [novesachecksum],1000
@ -1039,8 +1039,8 @@ boot_log:
align 32
osloop:
call [draw_pointer]
call window_check_events
call mouse_check_events
call window_check_events
call mouse_check_events
call checkmisc
call checkVga_N13
call stack_handler