forked from KolibriOS/kolibrios
858 lines
18 KiB
C++
858 lines
18 KiB
C++
// DGen/SDL v1.29+
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// Megadrive C++ module - misc memory
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#include <stdlib.h>
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#include <stdio.h>
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#include <stdint.h>
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#include <assert.h>
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#include "md.h"
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#include "mem.h"
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/**
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* Read one byte from the memory space.
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* @param a Address to read
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* @return byte or 0 if invalid.
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*/
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uint8_t md::z80_read(uint16_t a)
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{
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/* 0x0000-0x3fff: Z80 RAM */
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if (a <= Z80_RAM_END)
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return z80ram[(a & 0x1fff)];
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/* 0x4000-0x5fff: YM2612 */
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if (a <= YM2612_RAM_END)
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return myfm_read(a);
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/* 0x6000-0x6fff: bank register */
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if (a <= BANK_RAM_END)
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return 0; /* invalid address */
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/* 0x7000-0x7fff: PSG/VDP */
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if (a <= PSGVDP_RAM_END)
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return 0; /* invalid address */
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/* 0x8000-0xffff: M68K bank */
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return misc_readbyte(z80_bank68k + (a & 0x7fff));
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}
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/**
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* Write one byte to the memory
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* @param a Address to read
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* @param d Data (byte) to write.
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*/
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void md::z80_write(uint16_t a, uint8_t d)
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{
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/* 0x0000-0x3fff: Z80 RAM */
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if (a <= Z80_RAM_END) {
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z80ram[(a & 0x1fff)] = d;
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return;
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}
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/* 0x4000-0x5fff: YM2612 */
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if (a <= YM2612_RAM_END) {
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myfm_write(a, d, 1);
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return;
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}
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/* 0x6000-0x6fff: bank register */
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if (a <= BANK_RAM_END) {
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uint32_t tmp;
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if (a > 0x60ff)
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return; /* invalid address */
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tmp = (z80_bank68k >> 1);
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tmp |= ((d & 1) << 23);
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z80_bank68k = (tmp & 0xff8000);
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return;
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}
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/* 0x7000-0x7fff: PSG */
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if (a <= PSGVDP_RAM_END) {
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if (a == 0x7f11) {
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mysn_write(d);
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return;
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}
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return; /* invalid address */
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}
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/* 0x8000-0xffff: M68K bank */
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misc_writebyte((z80_bank68k + (a & 0x7fff)), d);
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}
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/**
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* Port read to Z80.
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* This is a NOP
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* @param a address (ignored)
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* @return always returns 0xff
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*/
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uint8_t md::z80_port_read(uint16_t a)
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{
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(void)a;
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return 0xff;
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}
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/**
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* Port write to z80
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* This is a Nop
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* @param a address (ignored)
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* @param d data (ignored)
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*/
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void md::z80_port_write(uint16_t a, uint8_t d)
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{
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(void)a;
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(void)d;
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}
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uint8_t md::m68k_ROM_read(uint32_t a)
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{
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/* save RAM */
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if ((save_active) && (save_len) &&
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(a >= save_start) && ((a - save_start) < save_len))
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return saveram[((a ^ 1) - save_start)];
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/* ROM */
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if (ROM_ADDR(a) < romlen)
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return rom[ROM_ADDR(a)];
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/* empty area */
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return 0;
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}
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uint8_t md::m68k_IO_read(uint32_t a)
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{
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/* Z80 */
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if (a < 0xa10000) {
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if ((!z80_st_busreq) && (a < 0xa04000))
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return 0;
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return z80_read(a & 0xffff);
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}
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/* version */
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if (a == 0xa10000)
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return 0;
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if (a == 0xa10001) {
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uint8_t c = region;
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/* If region hasn't been defined, guess it. */
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if (c == '\0')
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c = region_guess();
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region_info(c, 0, 0, 0, 0, &c);
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/* Remove PAL flag if we're not in PAL mode. */
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if (!pal)
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c &= ~0x40;
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return c;
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}
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/* data 1 (pad 0) */
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if (a == 0xa10002)
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return 0;
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if (a == 0xa10003) {
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if (aoo3_six == 3) {
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/* extended pad info */
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if (aoo3_toggle == 0)
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return (((pad[0] >> 8) & 0x30) + 0x00);
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return ((pad[0] & 0x30) + 0x40 +
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((pad[0] >> 16) & 0x0f));
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}
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if (aoo3_toggle == 0) {
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if (aoo3_six == 4)
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return (((pad[0] >> 8) & 0x30) +
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0x00 + 0x0f);
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return (((pad[0] >> 8) & 0x30) +
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0x00 + (pad[0] & 0x03));
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}
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return ((pad[0] & 0x30) + 0x40 + (pad[0] & 0x0f));
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}
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/* data 2 (pad 1) */
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if (a == 0xa10004)
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return 0;
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if (a == 0xa10005) {
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if (aoo5_six == 3) {
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/* extended pad info */
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if (aoo5_toggle == 0)
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return (((pad[1] >> 8) & 0x30) + 0x00);
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return ((pad[1] & 0x30) + 0x40 +
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((pad[1] >> 16) & 0x0f));
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}
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if (aoo5_toggle == 0) {
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if (aoo5_six == 4)
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return (((pad[1] >> 8) & 0x30) +
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0x00 + 0x0f);
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return (((pad[1] >> 8) & 0x30) +
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0x00 + (pad[1] & 0x03));
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}
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return ((pad[1] & 0x30) + 0x40 + (pad[1] & 0x0f));
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}
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/* data 3 (exp) */
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if (a == 0xa10006)
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return 0;
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if (a == 0xa10007)
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return 0xff;
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/* ctrl 1 */
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if (a == 0xa10008)
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return 0;
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if (a == 0xa10009)
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return pad_com[0];
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/* ctrl 2 */
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if (a == 0xa1000a)
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return 0;
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if (a == 0xa1000b)
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return pad_com[1];
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/* ctrl 3 */
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if ((a & 0xa1000c) == 0xa1000c)
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return 0;
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/* memory mode */
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if ((a & 0xfffffe) == 0xa11000)
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return 0xff;
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/* Z80 BUSREQ */
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if ((a & 0xffff01) == 0xa11100)
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return (!z80_st_busreq | ((m68k_read_pc() >> 8) & 0xfe));
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if ((a & 0xffff01) == 0xa11101)
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return (m68k_read_pc() & 0xff);
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/* Z80 RESET */
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if ((a & 0xffff01) == 0xa11200)
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return (m68k_read_pc() >> 8);
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if ((a & 0xffff01) == 0xa11201)
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return (m68k_read_pc() & 0xff);
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return 0; /* invalid address */
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}
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uint8_t md::m68k_VDP_read(uint32_t a)
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{
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a &= 0xe700ff;
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/* data */
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if (a < 0xc00004) {
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if (a & 0x01)
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return 0;
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vdp.cmd_pending = false;
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return vdp.readbyte();
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}
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/* control */
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if (a < 0xc00008) {
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vdp.cmd_pending = false;
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if ((a & 0x01) == 0)
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return coo4;
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return coo5;
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}
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/* HV counters */
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if (a == 0xc00008)
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return calculate_coo8();
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if (a == 0xc00009)
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return calculate_coo9();
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/* PSG */
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if (a == 0xc00011)
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return (0);
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return 0; /* invalid address */
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}
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/**
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* Read a byte from the m68Ks ram.
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* @param a Address to read.
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*/
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uint8_t md::misc_readbyte(uint32_t a)
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{
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/* clip to 24-bit */
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a &= 0x00ffffff;
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/* 0x000000-0x7fffff: ROM */
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if (a <= M68K_ROM_END) {
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return m68k_ROM_read(a);
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}
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#ifdef WITH_PICO
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/* 0x800000-0x80001f: Sega Pico I/O area */
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if ((pico_enabled) &&
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((a >= 0x800000) && (a <= 0x80001f))) {
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a &= 0x1f;
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switch(a) {
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case 1: // Version register
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switch (region) {
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case 'J': // Japan
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return 0;
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case 'E': // Europe
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return 32;
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case 'U': // USA
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return 64;
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}
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return 0;
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case 3: // Pico pad
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return pad[0];
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case 5: // MSB of X coordinate for pen
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return pico_pen_coords[0] >> 8;
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case 7: // LSB of X coordinate for pen
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return pico_pen_coords[0] & 0xff;
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case 9: // MSB of Y coordinate for pen
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return pico_pen_coords[1] >> 8;
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case 0xB: // LSB of Y coordinate for pen
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return pico_pen_coords[1] & 0xff;
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}
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}
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/* 0x800020-0xafffff: Sega Pico empty area */
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if ((pico_enabled) &&
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(a <= M68K_IO_END))
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return 0;
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#endif
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/* 0x800000-0x9fffff: empty area */
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if (a <= M68K_EMPTY1_END) {
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/*
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* http://cgfm2.emuviews.com/txt/gen-hw.txt
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* see section 1 point 3 for what these addresses do.
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*/
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return 0;
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}
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/* 0xa00000-0xafffff: system I/O and control */
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if (a <= M68K_IO_END) {
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return m68k_IO_read(a);
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}
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/* 0xb00000-0xbfffff: empty area */
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if (a <= M68K_EMPTY2_END)
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return 0;
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/* 0xc00000-0xdfffff: VDP/PSG */
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if (a <= M68K_VDP_END) {
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return m68k_VDP_read(a);
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}
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/* 0xe00000-0xfeffff: invalid addresses, mirror RAM */
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/* 0xff0000-0xffffff: RAM */
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return ram[((a ^ 1) & 0xffff)];
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}
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void md::m68k_ROM_write(uint32_t a, uint8_t d)
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{
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/* save RAM */
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if ((!save_prot) && (save_len) &&
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(a >= save_start) && ((a - save_start) < save_len))
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saveram[((a ^ 1) - save_start)] = d;
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#ifdef WITH_DEBUGGER
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/* Allow debugger to write to the ROM. */
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if ((debug_trap) && (ROM_ADDR(a) < romlen))
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rom[ROM_ADDR(a)] = d;
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#endif
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}
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void md::m68k_IO_write(uint32_t a, uint8_t d)
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{
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/* Z80 */
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if (a < 0xa10000) {
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if ((!z80_st_busreq) && (a < 0xa04000))
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return;
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z80_write((a & 0xffff), d);
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return;
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}
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if (a == 0xa11100) {
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/* Z80 BUSREQ */
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if (d & 0x01)
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m68k_busreq_request();
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else
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m68k_busreq_cancel();
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return;
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}
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if (a == 0xa11101)
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return;
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/* Z80 RESET */
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if (a == 0xa11200) {
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/* cancel RESET state if nonzero */
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if (d)
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z80_st_reset = 0;
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else if (z80_st_reset == 0) {
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if (z80_st_busreq == 0)
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z80_sync(0);
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z80_st_reset = 1;
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z80_reset();
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fm_reset();
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}
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return;
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}
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if (a == 0xa11201)
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return;
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/* I/O port access */
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if (a < 0xa1000d) {
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if (a == 0xa10003) {
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if ((aoo3_six >= 0) && ((d & 0x40) == 0) &&
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(aoo3_toggle))
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++aoo3_six;
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if (aoo3_six > 0xc00000)
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aoo3_six &= ~0x400000;
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/* keep it circling around a high value */
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if (d & 0x40)
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aoo3_toggle = 1;
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else
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aoo3_toggle = 0;
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aoo3_six_timeout = 0;
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return;
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}
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if (a == 0xa10005) {
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if ((aoo5_six >= 0) && ((d & 0x40) == 0) &&
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(aoo5_toggle))
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++aoo5_six;
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if (aoo5_six > 0xc00000)
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aoo5_six &= ~0x400000;
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/* keep it circling around a high value */
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if (d & 0x40)
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aoo5_toggle = 1;
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else
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aoo5_toggle = 0;
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aoo5_six_timeout = 0;
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return;
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}
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return;
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}
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/* save RAM status */
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if (a == 0xa130f1) {
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/*
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Bit 0: 0 = ROM active, 1 = SRAM active
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Bit 1: 0 = writable protect
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*/
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save_active = (d & 1);
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save_prot = (d & 2);
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return;
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}
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return;
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}
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/**
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* write a byte to the m68Ks ram.
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* @param a Address to write.
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* @param d Date (byte) two write.
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*/
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void md::misc_writebyte(uint32_t a, uint8_t d)
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{
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/* clip to 24-bit */
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a &= 0x00ffffff;
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/* 0x000000-0x7fffff: ROM */
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if (a <= M68K_ROM_END) {
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m68k_ROM_write(a, d);
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return;
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}
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/* 0x800000-0x9fffff: empty area */
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if (a <= M68K_EMPTY1_END)
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return;
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/* 0xa00000-0xafffff: system I/O and control */
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if (a <= M68K_IO_END) {
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m68k_IO_write(a, d);
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return;
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}
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/* 0xb00000-0xbfffff: empty area */
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if (a <= M68K_EMPTY2_END)
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return;
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/* 0xc00000-0xdfffff: VDP/PSG */
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if (a < M68K_VDP_END) {
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a &= 0xe700ff;
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if (a < 0xc00008) {
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misc_writeword(a, (d | (d << 8)));
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return;
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}
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/* PSG */
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if (a == 0xc00011)
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mysn_write(d);
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return;
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}
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/* 0xe00000-0xfeffff: invalid addresses, mirror RAM */
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/* 0xff0000-0xffffff: RAM */
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ram[((a ^ 1) & 0xffff)] = d;
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}
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/**
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* Read a word from the m68k memory.
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* There are quirks with word wide reads see section 1.2 of
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* http://cgfm2.emuviews.com/txt/gen-hw.txt
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* @param a Address to read
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* @return word from memory.
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*/
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uint16_t md::misc_readword(uint32_t a)
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{
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uint16_t ret;
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a &= 0x00ffffff;
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/* BUSREQ */
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if ((a & 0xffff00) == 0xa11100)
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return ((!z80_st_busreq << 8) | (m68k_read_pc() & 0xfeff));
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/* RESET */
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if ((a & 0xffff00) == 0xa11200)
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return m68k_read_pc();
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/* VDP */
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if ((a >= 0xc00000) && (a < 0xe00000)) {
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a &= 0xe700ff;
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if (a < 0xc00004) {
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if (a & 0x01)
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return 0;
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vdp.cmd_pending = false;
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return vdp.readword();
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}
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if (a < 0xc00008) {
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if (a & 0x01)
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return 0;
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return (((coo4 & 0xff) << 8) | (coo5 & 0xff));
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}
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if (a == 0xc00008) {
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if (a & 0x01)
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return 0;
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return ((calculate_coo8() << 8) |
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(calculate_coo9() & 0xff));
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}
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}
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/* else pass onto readbyte */
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ret = (misc_readbyte(a) << 8);
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ret |= misc_readbyte(a + 1);
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return ret;
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}
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/**
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* Write a word to m68k memory
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* @param a Address to write to.
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* @param d Data to write.
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*/
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void md::misc_writeword(uint32_t a, uint16_t d)
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{
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a &= 0x00ffffff;
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/* Z80 */
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if ((a >= 0xa00000) && (a < 0xa10000)) {
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if ((!z80_st_busreq) && (a < 0xa04000))
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return;
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z80_write((a & 0xffff), (d >> 8));
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return;
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}
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/* BUSREQ and RESET */
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if ((a == 0xa11100) ||
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(a == 0xa11200)) {
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misc_writebyte(a, (d >> 8));
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return;
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}
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/* VDP */
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if ((a >= 0xc00000) && (a < 0xe00000)) {
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a &= 0xe700ff;
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if (a < 0xc00004) {
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if (a & 0x01)
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return;
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vdp.writeword(d);
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vdp.cmd_pending = false;
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return;
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}
|
|
if (a < 0xc00008) {
|
|
if (a & 0x01)
|
|
return;
|
|
/* second half of a command */
|
|
if (vdp.cmd_pending) {
|
|
vdp.command(d);
|
|
return;
|
|
}
|
|
/* register write */
|
|
if ((d & 0xc000) == 0x8000) {
|
|
uint8_t addr = ((d >> 8) & 0x1f);
|
|
vdp.write_reg(addr, d);
|
|
return;
|
|
}
|
|
/* first half of a command */
|
|
vdp.command(d);
|
|
vdp.cmd_pending = true;
|
|
return;
|
|
}
|
|
}
|
|
/* else pass onto writebyte */
|
|
misc_writebyte(a, (d >> 8));
|
|
misc_writebyte((a + 1), (d & 0xff));
|
|
}
|
|
|
|
#ifdef WITH_MUSA
|
|
|
|
// read/write functions called by the CPU to access memory.
|
|
// while values used are 32 bits, only the appropriate number
|
|
// of bits are relevant (i.e. in write_memory_8, only the lower 8 bits
|
|
// of value should be written to memory).
|
|
// address will be a 24-bit value.
|
|
|
|
/* Read from anywhere */
|
|
extern "C" unsigned int m68k_read_memory_8(unsigned int address)
|
|
{
|
|
return md::md_musa->misc_readbyte(address);
|
|
}
|
|
|
|
extern "C" unsigned int m68k_read_memory_16(unsigned int address)
|
|
{
|
|
return md::md_musa->misc_readword(address);
|
|
}
|
|
|
|
extern "C" unsigned int m68k_read_memory_32(unsigned int address)
|
|
{
|
|
return ((md::md_musa->misc_readword(address) << 16) |
|
|
(md::md_musa->misc_readword(address + 2) & 0xffff));
|
|
}
|
|
|
|
/* Read data immediately following the PC */
|
|
extern "C" unsigned int m68k_read_immediate_8(unsigned int address)
|
|
{
|
|
return m68k_read_memory_8(address);
|
|
}
|
|
|
|
extern "C" unsigned int m68k_read_immediate_16(unsigned int address)
|
|
{
|
|
return m68k_read_memory_16(address);
|
|
}
|
|
|
|
extern "C" unsigned int m68k_read_immediate_32(unsigned int address)
|
|
{
|
|
return m68k_read_memory_32(address);
|
|
}
|
|
|
|
/* Read an instruction (16-bit word immeditately after PC) */
|
|
extern "C" unsigned int m68k_read_instruction(unsigned int address)
|
|
{
|
|
return m68k_read_memory_16(address);
|
|
}
|
|
|
|
/* Write to anywhere */
|
|
extern "C" void m68k_write_memory_8(unsigned int address, unsigned int value)
|
|
{
|
|
md::md_musa->misc_writebyte(address, value);
|
|
}
|
|
|
|
extern "C" void m68k_write_memory_16(unsigned int address, unsigned int value)
|
|
{
|
|
md::md_musa->misc_writeword(address, value);
|
|
}
|
|
|
|
extern "C" void m68k_write_memory_32(unsigned int address, unsigned int value)
|
|
{
|
|
md::md_musa->misc_writeword(address, ((value >> 16) & 0xffff));
|
|
md::md_musa->misc_writeword((address + 2), (value & 0xffff));
|
|
}
|
|
|
|
#endif // WITH_MUSA
|
|
|
|
#ifdef WITH_CYCLONE
|
|
|
|
/* Read from anywhere */
|
|
extern "C" uint32_t cyclone_read_memory_8(uint32_t address)
|
|
{
|
|
return md::md_cyclone->misc_readbyte(address);
|
|
}
|
|
|
|
extern "C" uint32_t cyclone_read_memory_16(uint32_t address)
|
|
{
|
|
return md::md_cyclone->misc_readword(address);
|
|
}
|
|
|
|
extern "C" uint32_t cyclone_read_memory_32(uint32_t address)
|
|
{
|
|
return ((md::md_cyclone->misc_readword(address) << 16) |
|
|
(md::md_cyclone->misc_readword(address + 2) & 0xffff));
|
|
}
|
|
|
|
/* Write to anywhere */
|
|
extern "C" void cyclone_write_memory_8(uint32_t address, uint8_t value)
|
|
{
|
|
md::md_cyclone->misc_writebyte(address, value);
|
|
}
|
|
|
|
extern "C" void cyclone_write_memory_16(uint32_t address, uint16_t value)
|
|
{
|
|
md::md_cyclone->misc_writeword(address, value);
|
|
}
|
|
|
|
extern "C" void cyclone_write_memory_32(uint32_t address, uint32_t value)
|
|
{
|
|
md::md_cyclone->misc_writeword(address, ((value >> 16) & 0xffff));
|
|
md::md_cyclone->misc_writeword((address + 2), (value & 0xffff));
|
|
}
|
|
|
|
uintptr_t md::checkpc(uintptr_t pc)
|
|
{
|
|
static uint8_t zero[(M68K_EMPTY1_END + 1)];
|
|
|
|
pc -= cyclonecpu.membase; // Get the real program counter.
|
|
|
|
pc &= 0x00ffffff; // Clip to 24-bit.
|
|
if ((save_active) && (save_len) &&
|
|
(pc >= save_start) && ((pc - save_start) < save_len)) {
|
|
cyclonecpu.membase = (uintptr_t)saveram;
|
|
pc -= save_start;
|
|
}
|
|
if (pc <= romlen)
|
|
cyclonecpu.membase = (uintptr_t)rom; // Jump to ROM.
|
|
else if (pc <= M68K_EMPTY1_END)
|
|
cyclonecpu.membase = (uintptr_t)zero; // Scratch area.
|
|
else if (pc >= 0xe00000) {
|
|
pc &= 0xffff;
|
|
cyclonecpu.membase = (uintptr_t)ram; // Jump to RAM.
|
|
}
|
|
else {
|
|
DEBUG(("PC out of bounds: %06x", pc));
|
|
// Freeze, avoid crashing the emulator.
|
|
cyclonecpu.membase = (uintptr_t)no_rom;
|
|
pc = 0;
|
|
}
|
|
return (cyclonecpu.membase + pc); // New program counter.
|
|
}
|
|
|
|
extern "C" uintptr_t cyclone_checkpc(uintptr_t pc)
|
|
{
|
|
return md::md_cyclone->checkpc(pc);
|
|
}
|
|
|
|
#endif // WITH_CYCLONE
|
|
|
|
#ifdef WITH_STAR
|
|
|
|
extern "C" unsigned star_readbyte(unsigned a, unsigned d)
|
|
{
|
|
(void)d;
|
|
return md::md_star->misc_readbyte(a);
|
|
}
|
|
|
|
extern "C" unsigned star_readword(unsigned a, unsigned d)
|
|
{
|
|
(void)d;
|
|
return md::md_star->misc_readword(a);
|
|
}
|
|
|
|
extern "C" unsigned star_writebyte(unsigned a, unsigned d)
|
|
{
|
|
md::md_star->misc_writebyte(a, d);
|
|
return 0;
|
|
}
|
|
|
|
extern "C" unsigned star_writeword(unsigned a, unsigned d)
|
|
{
|
|
md::md_star->misc_writeword(a, d);
|
|
return 0;
|
|
}
|
|
|
|
#endif // WITH_STAR
|
|
|
|
#ifdef WITH_MZ80
|
|
|
|
/*
|
|
In case the assembly version of MZ80 is used (WITH_X86_MZ80), prevent
|
|
GCC from optimizing sibling calls (-foptimize-sibling-calls, enabled
|
|
by default at -O2 and above). The ASM code doesn't expect this and
|
|
crashes otherwise.
|
|
*/
|
|
|
|
#ifdef WITH_X86_MZ80
|
|
#define MZ80_NOSIBCALL(t, w) *((volatile t *)&(w))
|
|
#else
|
|
#define MZ80_NOSIBCALL(t, w) (w)
|
|
#endif
|
|
|
|
extern "C" UINT8 mz80_read(UINT32 a, struct MemoryReadByte *unused)
|
|
{
|
|
(void)unused;
|
|
return md::md_mz80->z80_read(MZ80_NOSIBCALL(UINT32, a));
|
|
}
|
|
|
|
extern "C" void mz80_write(UINT32 a, UINT8 d, struct MemoryWriteByte *unused)
|
|
{
|
|
(void)unused;
|
|
md::md_mz80->z80_write(MZ80_NOSIBCALL(UINT32, a), d);
|
|
}
|
|
|
|
extern "C" UINT16 mz80_ioread(UINT16 a, struct z80PortRead *unused)
|
|
{
|
|
(void)unused;
|
|
return md::md_mz80->z80_port_read(MZ80_NOSIBCALL(UINT16, a));
|
|
}
|
|
|
|
extern "C" void mz80_iowrite(UINT16 a, UINT8 d, struct z80PortWrite *unused)
|
|
{
|
|
(void)unused;
|
|
return md::md_mz80->z80_port_write(MZ80_NOSIBCALL(UINT16, a), d);
|
|
}
|
|
|
|
#endif // WITH_MZ80
|
|
|
|
#ifdef WITH_CZ80
|
|
|
|
extern "C" uint8_t cz80_memread(void *ctx, uint16_t a)
|
|
{
|
|
class md* md = (class md*)ctx;
|
|
|
|
return md->z80_read(a);
|
|
}
|
|
|
|
extern "C" void cz80_memwrite(void *ctx, uint16_t a, uint8_t d)
|
|
{
|
|
class md* md = (class md*)ctx;
|
|
|
|
md->z80_write(a, d);
|
|
}
|
|
|
|
extern "C" uint16_t cz80_memread16(void *ctx, uint16_t a)
|
|
{
|
|
class md* md = (class md*)ctx;
|
|
|
|
return ((uint16_t)md->z80_read(a) |
|
|
((uint16_t)md->z80_read(a + 1) << 8));
|
|
}
|
|
|
|
extern "C" void cz80_memwrite16(void *ctx, uint16_t a, uint16_t d)
|
|
{
|
|
class md* md = (class md*)ctx;
|
|
|
|
md->z80_write(a, (uint8_t)d);
|
|
md->z80_write((a + 1), (uint8_t)(d >> 8));
|
|
}
|
|
|
|
extern "C" uint8_t cz80_ioread(void *ctx, uint16_t a)
|
|
{
|
|
class md* md = (class md*)ctx;
|
|
|
|
return md->z80_port_read(a);
|
|
}
|
|
|
|
extern "C" void cz80_iowrite(void *ctx, uint16_t a, uint8_t d)
|
|
{
|
|
class md* md = (class md*)ctx;
|
|
|
|
md->z80_port_write(a, d);
|
|
}
|
|
|
|
#endif // WITH_CZ80
|
|
|
|
#ifdef WITH_DRZ80
|
|
|
|
uintptr_t md::drz80_rebase_pc(uint16_t address)
|
|
{
|
|
// PC in memory - rebase PC into memory.
|
|
drz80.Z80PC_BASE = (uintptr_t)z80ram;
|
|
return (drz80.Z80PC_BASE + address);
|
|
}
|
|
|
|
uintptr_t md::drz80_rebase_sp(uint16_t address)
|
|
{
|
|
// SP in memory - rebase SP into memory.
|
|
drz80.Z80SP_BASE = (uintptr_t)z80ram;
|
|
return (drz80.Z80SP_BASE + address);
|
|
}
|
|
|
|
uintptr_t drz80_rebaseSP(uint16_t new_sp)
|
|
{
|
|
return md::md_drz80->drz80_rebase_sp(new_sp);
|
|
}
|
|
|
|
uintptr_t drz80_rebasePC(uint16_t new_pc)
|
|
{
|
|
return md::md_drz80->drz80_rebase_pc(new_pc);
|
|
}
|
|
|
|
uint8_t drz80_read8(uint16_t a)
|
|
{
|
|
return md::md_drz80->z80_read(a);
|
|
}
|
|
|
|
uint16_t drz80_read16(uint16_t a)
|
|
{
|
|
return ((uint16_t)md::md_drz80->z80_read(a) |
|
|
((uint16_t)md::md_drz80->z80_read(a + 1) << 8));
|
|
}
|
|
|
|
void drz80_write8(uint8_t d, uint16_t a)
|
|
{
|
|
md::md_drz80->z80_write(a, d);
|
|
}
|
|
|
|
void drz80_write16(uint16_t d, uint16_t a)
|
|
{
|
|
md::md_drz80->z80_write(a, (uint8_t)d);
|
|
md::md_drz80->z80_write((a + 1), (uint8_t)(d >> 8));
|
|
}
|
|
|
|
uint8_t drz80_in(uint16_t p)
|
|
{
|
|
(void)p;
|
|
return 0xff;
|
|
}
|
|
|
|
void drz80_out(uint16_t p, uint8_t d)
|
|
{
|
|
(void)p;
|
|
(void)d;
|
|
}
|
|
|
|
#endif // WITH_DRZ80
|