forked from KolibriOS/kolibrios
1259 lines
36 KiB
NASM
1259 lines
36 KiB
NASM
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; ;;
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;; Copyright (C) KolibriOS team 2004-2010. All rights reserved. ;;
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;; Distributed under terms of the GNU General Public License ;;
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;; ;;
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;; MTD80x driver for KolibriOS ;;
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;; ;;
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;; Based on mtd80x.c from the etherboot project ;;
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;; ;;
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;; Written by hidnplayr@kolibrios.org ;;
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;; ;;
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;; GNU GENERAL PUBLIC LICENSE ;;
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;; Version 2, June 1991 ;;
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;; ;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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format MS COFF
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API_VERSION equ 0x01000100
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DRIVER_VERSION equ 5
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MAX_DEVICES equ 16
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DEBUG equ 1
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__DEBUG__ equ 1
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__DEBUG_LEVEL__ equ 1
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NUM_TX_DESC equ 4
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NUM_RX_DESC equ 4
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include 'proc32.inc'
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include 'imports.inc'
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include 'fdo.inc'
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include 'netdrv.inc'
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public START
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public service_proc
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public version
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; for different PHY
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MysonPHY equ 1
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AhdocPHY equ 2
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SeeqPHY equ 3
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MarvellPHY equ 4
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Myson981 equ 5
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LevelOnePHY equ 6
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OtherPHY equ 10
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; Offsets to the Command and Status Registers.
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PAR0 equ 0x0 ; physical address 0-3
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PAR1 equ 0x04 ; physical address 4-5
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MAR0 equ 0x08 ; multicast address 0-3
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MAR1 equ 0x0C ; multicast address 4-7
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FAR0 equ 0x10 ; flow-control address 0-3
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FAR1 equ 0x14 ; flow-control address 4-5
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TCRRCR equ 0x18 ; receive & transmit configuration
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BCR equ 0x1C ; bus command
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TXPDR equ 0x20 ; transmit polling demand
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RXPDR equ 0x24 ; receive polling demand
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RXCWP equ 0x28 ; receive current word pointer
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TXLBA equ 0x2C ; transmit list base address
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RXLBA equ 0x30 ; receive list base address
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ISR equ 0x34 ; interrupt status
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IMR equ 0x38 ; interrupt mask
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FTH equ 0x3C ; flow control high/low threshold
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MANAGEMENT equ 0x40 ; bootrom/eeprom and mii management
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TALLY equ 0x44 ; tally counters for crc and mpa
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TSR equ 0x48 ; tally counter for transmit status
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BMCRSR equ 0x4c ; basic mode control and status
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PHYIDENTIFIER equ 0x50 ; phy identifier
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ANARANLPAR equ 0x54 ; auto-negotiation advertisement and link partner ability
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ANEROCR equ 0x58 ; auto-negotiation expansion and pci conf.
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BPREMRPSR equ 0x5c ; bypass & receive error mask and phy status
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; Bits in the interrupt status/enable registers.
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RFCON equ 0x00020000 ; receive flow control xon packet
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RFCOFF equ 0x00010000 ; receive flow control xoff packet
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LSCStatus equ 0x00008000 ; link status change
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ANCStatus equ 0x00004000 ; autonegotiation completed
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FBE equ 0x00002000 ; fatal bus error
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FBEMask equ 0x00001800 ; mask bit12-11
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ParityErr equ 0x00000000 ; parity error
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TargetErr equ 0x00001000 ; target abort
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MasterErr equ 0x00000800 ; master error
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TUNF equ 0x00000400 ; transmit underflow
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ROVF equ 0x00000200 ; receive overflow
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ETI equ 0x00000100 ; transmit early int
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ERI equ 0x00000080 ; receive early int
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CNTOVF equ 0x00000040 ; counter overflow
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RBU equ 0x00000020 ; receive buffer unavailable
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TBU equ 0x00000010 ; transmit buffer unavilable
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TI equ 0x00000008 ; transmit interrupt
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RI equ 0x00000004 ; receive interrupt
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RxErr equ 0x00000002 ; receive error
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; Bits in the NetworkConfig register.
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RxModeMask equ 0xe0
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AcceptAllPhys equ 0x80 ; promiscuous mode
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AcceptBroadcast equ 0x40 ; accept broadcast
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AcceptMulticast equ 0x20 ; accept mutlicast
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AcceptRunt equ 0x08 ; receive runt pkt
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ALP equ 0x04 ; receive long pkt
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AcceptErr equ 0x02 ; receive error pkt
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AcceptMyPhys equ 0x00000000
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RxEnable equ 0x00000001
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RxFlowCtrl equ 0x00002000
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TxEnable equ 0x00040000
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TxModeFDX equ 0x00100000
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TxThreshold equ 0x00e00000
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PS1000 equ 0x00010000
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PS10 equ 0x00080000
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FD equ 0x00100000
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; Bits in network_desc.status
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RXOWN equ 0x80000000 ; own bit
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FLNGMASK equ 0x0fff0000 ; frame length
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FLNGShift equ 16
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MARSTATUS equ 0x00004000 ; multicast address received
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BARSTATUS equ 0x00002000 ; broadcast address received
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PHYSTATUS equ 0x00001000 ; physical address received
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RXFSD equ 0x00000800 ; first descriptor
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RXLSD equ 0x00000400 ; last descriptor
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ErrorSummary equ 0x80 ; error summary
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RUNT equ 0x40 ; runt packet received
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LONG equ 0x20 ; long packet received
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FAE equ 0x10 ; frame align error
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CRC equ 0x08 ; crc error
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RXER equ 0x04 ; receive error
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; rx_desc_control_bits
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RXIC equ 0x00800000 ; interrupt control
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RBSShift equ 0
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; tx_desc_status_bits
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TXOWN equ 0x80000000 ; own bit
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JABTO equ 0x00004000 ; jabber timeout
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CSL equ 0x00002000 ; carrier sense lost
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LC equ 0x00001000 ; late collision
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EC equ 0x00000800 ; excessive collision
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UDF equ 0x00000400 ; fifo underflow
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DFR equ 0x00000200 ; deferred
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HF equ 0x00000100 ; heartbeat fail
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NCRMask equ 0x000000ff ; collision retry count
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NCRShift equ 0
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; tx_desc_control_bits
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TXIC equ 0x80000000 ; interrupt control
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ETIControl equ 0x40000000 ; early transmit interrupt
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TXLD equ 0x20000000 ; last descriptor
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TXFD equ 0x10000000 ; first descriptor
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CRCEnable equ 0x08000000 ; crc control
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PADEnable equ 0x04000000 ; padding control
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RetryTxLC equ 0x02000000 ; retry late collision
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PKTSMask equ 0x3ff800 ; packet size bit21-11
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PKTSShift equ 11
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TBSMask equ 0x000007ff ; transmit buffer bit 10-0
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TBSShift equ 0
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; BootROM/EEPROM/MII Management Register
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MASK_MIIR_MII_READ equ 0x00000000
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MASK_MIIR_MII_WRITE equ 0x00000008
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MASK_MIIR_MII_MDO equ 0x00000004
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MASK_MIIR_MII_MDI equ 0x00000002
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MASK_MIIR_MII_MDC equ 0x00000001
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; ST+OP+PHYAD+REGAD+TA
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OP_READ equ 0x6000 ; ST:01+OP:10+PHYAD+REGAD+TA:Z0
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OP_WRITE equ 0x5002 ; ST:01+OP:01+PHYAD+REGAD+TA:10
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; -------------------------------------------------------------------------
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; Constants for Myson PHY
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; -------------------------------------------------------------------------
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MysonPHYID equ 0xd0000302
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MysonPHYID0 equ 0x0302
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StatusRegister equ 18
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SPEED100 equ 0x0400 ; bit10
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FULLMODE equ 0x0800 ; bit11
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; -------------------------------------------------------------------------
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; Constants for Seeq 80225 PHY
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; -------------------------------------------------------------------------
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SeeqPHYID0 equ 0x0016
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MIIRegister18 equ 18
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SPD_DET_100 equ 0x80
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DPLX_DET_FULL equ 0x40
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; -------------------------------------------------------------------------
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; Constants for Ahdoc 101 PHY
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; -------------------------------------------------------------------------
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AhdocPHYID0 equ 0x0022
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DiagnosticReg equ 18
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DPLX_FULL equ 0x0800
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Speed_100 equ 0x0400
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; --------------------------------------------------------------------------
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; Constants
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; --------------------------------------------------------------------------
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MarvellPHYID0 equ 0x0141
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LevelOnePHYID0 equ 0x0013
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MII1000BaseTControlReg equ 9
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MII1000BaseTStatusReg equ 10
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SpecificReg equ 17
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; for 1000BaseT Control Register
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PHYAbletoPerform1000FullDuplex equ 0x0200
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PHYAbletoPerform1000HalfDuplex equ 0x0100
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PHY1000AbilityMask equ 0x300
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; for phy specific status register, marvell phy.
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SpeedMask equ 0x0c000
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Speed_1000M equ 0x08000
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Speed_100M equ 0x4000
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Speed_10M equ 0
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Full_Duplex equ 0x2000
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; for phy specific status register, levelone phy
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LXT1000_100M equ 0x08000
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LXT1000_1000M equ 0x0c000
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LXT1000_Full equ 0x200
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; for PHY
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LinkIsUp equ 0x0004
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LinkIsUp2 equ 0x00040000
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virtual at 0
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mtd_desc:
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.status dd ?
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.control dd ?
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.buffer dd ?
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.next_desc dd ?
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.next_desc_logical dd ?
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.skbuff dd ?
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.reserved1 dd ?
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.reserved2 dd ?
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.size = $
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end virtual
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virtual at ebx
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device:
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ETH_DEVICE
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.tx_desc rb NUM_TX_DESC*mtd_desc.size
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.rx_desc rb NUM_RX_DESC*mtd_desc.size
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.io_addr dd ?
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.pci_bus db ?
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.pci_dev db ?
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.irq_line db ?
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.dev_id dw ?
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.flags dd ?
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.crvalue dd ?
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.bcrvalue dd ?
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.cur_rx dd ?
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.cur_tx dd ?
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; These values are keep track of the transceiver/media in use.
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.linkok dd ?
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.line_speed dd ?
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.duplexmode dd ?
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.default_port dd ?
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.PHYType dd ?
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; MII transceiver section.
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.mii_cnt dd ? ; MII device addresses.
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.phys db ? ; MII device addresses.
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device_size = $ - device
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end virtual
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section '.flat' code readable align 16
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; ;;
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;; proc START ;;
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;; ;;
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;; (standard driver proc) ;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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align 4
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proc START stdcall, state:dword
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cmp [state], 1
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jne .exit
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.entry:
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DEBUGF 2,"Loading mtd80x driver\n"
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stdcall RegService, my_service, service_proc
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ret
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.fail:
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.exit:
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xor eax, eax
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ret
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endp
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; ;;
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;; proc SERVICE_PROC ;;
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;; ;;
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;; (standard driver proc) ;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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align 4
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proc service_proc stdcall, ioctl:dword
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mov edx, [ioctl]
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mov eax, [IOCTL.io_code]
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;------------------------------------------------------
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cmp eax, 0 ;SRV_GETVERSION
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jne @F
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cmp [IOCTL.out_size], 4
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jl .fail
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mov eax, [IOCTL.output]
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mov [eax], dword API_VERSION
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xor eax, eax
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ret
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;------------------------------------------------------
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@@:
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cmp eax, 1 ;SRV_HOOK
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jne .fail
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cmp [IOCTL.inp_size], 3 ; Data input must be at least 3 bytes
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jl .fail
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mov eax, [IOCTL.input]
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cmp byte [eax], 1 ; 1 means device number and bus number (pci) are given
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jne .fail ; other types arent supported for this card yet
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; check if the device is already listed
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mov esi, device_list
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mov ecx, [devices]
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test ecx, ecx
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jz .firstdevice
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; mov eax, [IOCTL.input] ; get the pci bus and device numbers
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mov ax , [eax+1] ;
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.nextdevice:
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mov ebx, [esi]
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cmp ax , word [device.pci_bus] ; compare with pci and device num in device list (notice the usage of word instead of byte)
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je .find_devicenum ; Device is already loaded, let's find it's device number
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add esi, 4
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loop .nextdevice
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; This device doesnt have its own eth_device structure yet, lets create one
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.firstdevice:
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cmp [devices], MAX_DEVICES ; First check if the driver can handle one more card
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jge .fail
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allocate_and_clear ebx, device_size, .fail
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; Fill in the direct call addresses into the struct
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mov [device.reset], reset
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mov [device.transmit], transmit
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mov [device.get_MAC], read_mac
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mov [device.set_MAC], write_mac
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mov [device.unload], unload
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mov [device.name], my_service
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; save the pci bus and device numbers
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mov eax, [IOCTL.input]
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mov cl , [eax+1]
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mov [device.pci_bus], cl
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mov cl , [eax+2]
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mov [device.pci_dev], cl
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; Now, it's time to find the base io addres of the PCI device
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find_io [device.pci_bus], [device.pci_dev], [device.io_addr]
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; We've found the io address, find IRQ now
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find_irq [device.pci_bus], [device.pci_dev], [device.irq_line]
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DEBUGF 2,"Hooking into device, dev:%x, bus:%x, irq:%x, addr:%x\n",\
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[device.pci_dev]:1,[device.pci_bus]:1,[device.irq_line]:1,[device.io_addr]:8
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; Ok, the eth_device structure is ready, let's probe the device
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; Because initialization fires IRQ, IRQ handler must be aware of this device
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mov eax, [devices] ; Add the device structure to our device list
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mov [device_list+4*eax], ebx ; (IRQ handler uses this list to find device)
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inc [devices] ;
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call probe ; this function will output in eax
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test eax, eax
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jnz .err2 ; If an error occured, exit
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mov [device.type], NET_TYPE_ETH
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call NetRegDev
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cmp eax, -1
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je .destroy
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ret
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; If the device was already loaded, find the device number and return it in eax
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.find_devicenum:
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DEBUGF 2,"Trying to find device number of already registered device\n"
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call NetPtrToNum ; This kernel procedure converts a pointer to device struct in ebx
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; into a device number in edi
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mov eax, edi ; Application wants it in eax instead
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DEBUGF 2,"Kernel says: %u\n", eax
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ret
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; If an error occured, remove all allocated data and exit (returning -1 in eax)
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.destroy:
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; todo: reset device into virgin state
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.err2:
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dec [devices]
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.err:
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DEBUGF 2,"removing device structure\n"
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stdcall KernelFree, ebx
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.fail:
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or eax, -1
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ret
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;------------------------------------------------------
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endp
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;;/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\;;
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;; ;;
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;; Actual Hardware dependent code starts here ;;
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;; ;;
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;;/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\;;
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align 4
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unload:
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; TODO: (in this particular order)
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;
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; - Stop the device
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; /* Disable Tx Rx*/
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; outl( mtdx.crvalue & (~TxEnable) & (~RxEnable), mtdx.ioaddr + TCRRCR );
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;
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; /* Reset the chip to erase previous misconfiguration. */
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; mtd_reset(nic);
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; - Detach int handler
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; - Remove device from local list (device_list)
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; - call unregister function in kernel
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; - Remove all allocated structures and buffers the card used
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or eax,-1
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ret
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;-------
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;
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; PROBE
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;
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;-------
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align 4
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probe:
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DEBUGF 2,"Probing mtd80x device\n"
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make_bus_master [device.pci_bus], [device.pci_dev]
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movzx eax, [device.pci_bus]
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movzx ecx, [device.pci_dev]
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stdcall PciRead32, eax ,ecx ,0
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cmp ax , 0x1516
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jne .notfound
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shr eax, 16
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mov [device.dev_id], ax
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cmp ax, 0x0800
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je .has_mii_xcvr
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cmp ax, 0x0803
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je .has_chip_xcvr
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cmp ax, 0x0891
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je .has_mii_xcvr
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.notfound:
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DEBUGF 1,"Device not supported!\n"
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xor eax, eax
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dec eax
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ret
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.has_chip_xcvr:
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DEBUGF 1,"Device has chip xcvr\n"
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jmp .xcvr_set
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.has_mii_xcvr:
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DEBUGF 1,"Device has mii xcvr\n"
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.xcvr_set:
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call read_mac
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; Reset the chip to erase previous misconfiguration.
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set_io 0
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set_io BCR
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xor eax, eax
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inc eax
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out dx, eax
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; find the connected MII xcvrs
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cmp [device.dev_id], 0x0803
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je .is_803
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; int phy, phy_idx equ 0;
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;
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; for (phy equ 1; phy < 32 && phy_idx < 1; phy++) {
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; int mii_status equ mdio_read(nic, phy, 1);
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;
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; if (mii_status !equ 0xffff && mii_status !equ 0x0000) {
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; mtdx.phys[phy_idx] equ phy;
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;
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; DBG ( "%s: MII PHY found at address %d, status "
|
|
; "0x%4.4x.\n", mtdx.nic_name, phy, mii_status );
|
|
; /* get phy type */
|
|
; {
|
|
; unsigned int data;
|
|
;
|
|
; data equ mdio_read(nic, mtdx.phys[phy_idx], 2);
|
|
; if (data equequ SeeqPHYID0)
|
|
; mtdx.PHYType equ SeeqPHY;
|
|
; else if (data equequ AhdocPHYID0)
|
|
; mtdx.PHYType equ AhdocPHY;
|
|
; else if (data equequ MarvellPHYID0)
|
|
; mtdx.PHYType equ MarvellPHY;
|
|
; else if (data equequ MysonPHYID0)
|
|
; mtdx.PHYType equ Myson981;
|
|
; else if (data equequ LevelOnePHYID0)
|
|
; mtdx.PHYType equ LevelOnePHY;
|
|
; else
|
|
; mtdx.PHYType equ OtherPHY;
|
|
; }
|
|
; phy_idx++;
|
|
; }
|
|
; }
|
|
;
|
|
; mtdx.mii_cnt equ phy_idx;
|
|
; if (phy_idx equequ 0) {
|
|
; printf("%s: MII PHY not found -- this device may "
|
|
; "not operate correctly.\n", mtdx.nic_name);
|
|
; }
|
|
|
|
jmp .no_803
|
|
|
|
.is_803:
|
|
|
|
mov [device.phys], 32
|
|
|
|
; get phy type
|
|
set_io 0
|
|
set_io PHYIDENTIFIER
|
|
in eax, dx
|
|
|
|
cmp eax, MysonPHYID
|
|
jne @f
|
|
|
|
mov [device.PHYType], MysonPHY
|
|
DEBUGF 1,"MysonPHY\n"
|
|
jmp .no_803
|
|
|
|
@@:
|
|
mov [device.PHYType], OtherPHY
|
|
DEBUGF 1,"OtherPHY\n"
|
|
|
|
.no_803:
|
|
|
|
;-------
|
|
;
|
|
; RESET
|
|
;
|
|
;-------
|
|
align 4
|
|
reset:
|
|
|
|
DEBUGF 1,"Resetting mtd80x\n"
|
|
|
|
;--------------------------------
|
|
; insert irq handler on given irq
|
|
|
|
movzx eax, [device.irq_line]
|
|
DEBUGF 1,"Attaching int handler to irq %x\n", eax:1
|
|
stdcall AttachIntHandler, eax, int_handler, dword 0
|
|
test eax, eax
|
|
jnz @f
|
|
DEBUGF 1,"\nCould not attach int handler!\n"
|
|
; or eax, -1
|
|
; ret
|
|
@@:
|
|
|
|
; Reset the chip to erase previous misconfiguration.
|
|
|
|
set_io 0
|
|
set_io BCR
|
|
xor eax, eax
|
|
inc eax
|
|
out dx, eax
|
|
|
|
call init_ring
|
|
|
|
; Initialize other registers.
|
|
; Configure the PCI bus bursts and FIFO thresholds.
|
|
|
|
mov [device.bcrvalue], 0x10 ; little-endian, 8 burst length
|
|
mov [device.crvalue], 0xa00 ; 128 burst length
|
|
|
|
cmp [device.dev_id], 0x891
|
|
jne @f
|
|
or [device.bcrvalue], 0x200 ; set PROG bit
|
|
or [device.crvalue], 0x02000000 ; set enhanced bit
|
|
@@:
|
|
|
|
or [device.crvalue], RxEnable + TxThreshold + TxEnable
|
|
|
|
call set_rx_mode
|
|
|
|
set_io 0
|
|
set_io BCR
|
|
mov eax, [device.bcrvalue]
|
|
out dx, eax
|
|
|
|
set_io TCRRCR
|
|
mov eax, [device.crvalue]
|
|
out dx, eax
|
|
|
|
call getlinkstatus
|
|
call getlinktype
|
|
|
|
; Restart Rx engine if stopped.
|
|
|
|
set_io 0
|
|
set_io RXPDR
|
|
xor eax, eax
|
|
out dx, eax
|
|
|
|
; Enable interrupts
|
|
|
|
set_io 0
|
|
set_io ISR
|
|
mov eax, (FBE or TUNF or CNTOVF or RBU or TI or RI)
|
|
out dx, eax
|
|
|
|
set_io IMR
|
|
; mov eax, (FBE or TUNF or CNTOVF or RBU or TI or RI)
|
|
out dx, eax
|
|
|
|
; clear packet/byte counters
|
|
|
|
xor eax, eax
|
|
lea edi, [device.bytes_tx]
|
|
mov ecx, 6
|
|
rep stosd
|
|
|
|
mov [device.mtu], 1514
|
|
xor eax, eax
|
|
|
|
ret
|
|
|
|
|
|
|
|
|
|
align 4
|
|
init_ring:
|
|
|
|
DEBUGF 1,"initializing rx and tx ring\n"
|
|
|
|
; Initialize all Rx descriptors
|
|
|
|
lea esi, [device.rx_desc]
|
|
mov [device.cur_rx], esi
|
|
mov ecx, NUM_RX_DESC
|
|
.rx_desc_loop:
|
|
mov [esi + mtd_desc.status], RXOWN
|
|
mov [esi + mtd_desc.control], 1536 shl RBSShift
|
|
|
|
lea eax, [esi + mtd_desc.size]
|
|
mov [esi + mtd_desc.next_desc_logical], eax
|
|
push ecx esi
|
|
GetRealAddr
|
|
mov [esi + mtd_desc.next_desc], eax
|
|
|
|
stdcall KernelAlloc, 1536
|
|
pop esi
|
|
push esi
|
|
mov [esi + mtd_desc.skbuff], eax
|
|
call GetPgAddr
|
|
pop esi ecx
|
|
mov [esi + mtd_desc.buffer], eax
|
|
|
|
add esi, mtd_desc.size
|
|
loop .rx_desc_loop
|
|
|
|
; Mark the last entry as wrapping the ring.
|
|
|
|
lea eax, [device.rx_desc]
|
|
mov [esi - mtd_desc.size + mtd_desc.next_desc_logical], eax
|
|
push esi
|
|
GetRealAddr
|
|
pop esi
|
|
mov [esi - mtd_desc.size + mtd_desc.next_desc], eax
|
|
|
|
set_io 0
|
|
set_io RXLBA
|
|
out dx, eax
|
|
|
|
; Initialize all Tx descriptors
|
|
|
|
lea esi, [device.tx_desc]
|
|
mov [device.cur_tx], esi
|
|
mov ecx, NUM_TX_DESC
|
|
.tx_desc_loop:
|
|
mov [esi + mtd_desc.status], 0
|
|
|
|
lea eax, [esi + mtd_desc.size]
|
|
mov [esi + mtd_desc.next_desc_logical], eax
|
|
push ecx esi
|
|
GetRealAddr
|
|
pop esi ecx
|
|
mov [esi + mtd_desc.next_desc], eax
|
|
|
|
add esi, mtd_desc.size
|
|
loop .tx_desc_loop
|
|
|
|
; Mark the last entry as wrapping the ring.
|
|
|
|
lea eax, [device.tx_desc]
|
|
mov [esi - mtd_desc.size + mtd_desc.next_desc_logical], eax
|
|
push esi
|
|
GetRealAddr
|
|
pop esi
|
|
mov [esi - mtd_desc.size + mtd_desc.next_desc], eax
|
|
|
|
set_io 0
|
|
set_io TXLBA
|
|
out dx, eax
|
|
|
|
ret
|
|
|
|
|
|
align 4
|
|
set_rx_mode:
|
|
|
|
DEBUGF 1,"Setting RX mode\n"
|
|
|
|
; Too many to match, or accept all multicasts.
|
|
|
|
set_io 0
|
|
set_io MAR0
|
|
xor eax, eax
|
|
not eax
|
|
out dx, eax
|
|
set_io MAR1
|
|
out dx, eax
|
|
|
|
and [device.crvalue], not (RxModeMask)
|
|
or [device.crvalue], AcceptBroadcast + AcceptMulticast + AcceptMyPhys
|
|
|
|
ret
|
|
|
|
|
|
align 4
|
|
getlinkstatus:
|
|
|
|
DEBUGF 1,"Getting link status\n"
|
|
|
|
mov [device.linkok], 0
|
|
|
|
cmp [device.PHYType], MysonPHY
|
|
jne .no_myson_phy
|
|
|
|
set_io 0
|
|
set_io BMCRSR
|
|
mov ecx, 1000
|
|
.loop1:
|
|
in eax, dx
|
|
test eax, LinkIsUp2
|
|
jnz .link_ok
|
|
|
|
push ecx edx ebx
|
|
mov esi, 10
|
|
call Sleep
|
|
pop ebx edx ecx
|
|
loop .loop1
|
|
|
|
ret
|
|
|
|
.no_myson_phy:
|
|
|
|
; for (i equ 0; i < DelayTime; ++i) {
|
|
; if (mdio_read(nic, mtdx.phys[0], MII_BMSR) & BMSR_LSTATUS) {
|
|
; mtdx.linkok equ 1;
|
|
; return;
|
|
; }
|
|
; m80x_delay(100);
|
|
|
|
ret
|
|
|
|
.link_ok:
|
|
DEBUGF 1,"Link is up\n"
|
|
inc [device.linkok]
|
|
ret
|
|
|
|
|
|
|
|
|
|
align 4
|
|
getlinktype:
|
|
|
|
DEBUGF 1,"Getting link type\n"
|
|
|
|
cmp [device.PHYType], MysonPHY
|
|
jne .no_myson_phy
|
|
|
|
DEBUGF 1,"myson PHY\n"
|
|
|
|
set_io 0
|
|
set_io TCRRCR
|
|
in eax, dx
|
|
|
|
mov [device.duplexmode], 1 ; 1 equ half duplex
|
|
test eax, FD
|
|
jne @f
|
|
DEBUGF 1,"full duplex\n"
|
|
inc [device.duplexmode] ; 2 equ full duplex
|
|
@@:
|
|
|
|
mov [device.line_speed], 1 ; 1 equ 10M
|
|
test eax, PS10
|
|
jne @f
|
|
DEBUGF 1,"100mbit\n"
|
|
inc [device.line_speed] ; 2 equ 100M
|
|
@@:
|
|
|
|
ret
|
|
|
|
.no_myson_phy:
|
|
|
|
DEBUGF 1,"no myson phy\n"
|
|
|
|
; if (mtdx.PHYType equequ SeeqPHY) { /* this PHY is SEEQ 80225 */
|
|
; unsigned int data;
|
|
;
|
|
; data equ mdio_read(dev, mtdx.phys[0], MIIRegister18);
|
|
; if (data & SPD_DET_100)
|
|
; mtdx.line_speed equ 2; /* 100M */
|
|
; else
|
|
; mtdx.line_speed equ 1; /* 10M */
|
|
; if (data & DPLX_DET_FULL)
|
|
; mtdx.duplexmode equ 2; /* full duplex mode */
|
|
; else
|
|
; mtdx.duplexmode equ 1; /* half duplex mode */
|
|
; } else if (mtdx.PHYType equequ AhdocPHY) {
|
|
; unsigned int data;
|
|
;
|
|
; data equ mdio_read(dev, mtdx.phys[0], DiagnosticReg);
|
|
; if (data & Speed_100)
|
|
; mtdx.line_speed equ 2; /* 100M */
|
|
; else
|
|
; mtdx.line_speed equ 1; /* 10M */
|
|
; if (data & DPLX_FULL)
|
|
; mtdx.duplexmode equ 2; /* full duplex mode */
|
|
; else
|
|
; mtdx.duplexmode equ 1; /* half duplex mode */
|
|
; }
|
|
; else if (mtdx.PHYType equequ MarvellPHY) {
|
|
; unsigned int data;
|
|
;
|
|
; data equ mdio_read(dev, mtdx.phys[0], SpecificReg);
|
|
; if (data & Full_Duplex)
|
|
; mtdx.duplexmode equ 2; /* full duplex mode */
|
|
; else
|
|
; mtdx.duplexmode equ 1; /* half duplex mode */
|
|
; data &equ SpeedMask;
|
|
; if (data equequ Speed_1000M)
|
|
; mtdx.line_speed equ 3; /* 1000M */
|
|
; else if (data equequ Speed_100M)
|
|
; mtdx.line_speed equ 2; /* 100M */
|
|
; else
|
|
; mtdx.line_speed equ 1; /* 10M */
|
|
; }
|
|
; else if (mtdx.PHYType equequ Myson981) {
|
|
; unsigned int data;
|
|
;
|
|
; data equ mdio_read(dev, mtdx.phys[0], StatusRegister);
|
|
;
|
|
; if (data & SPEED100)
|
|
; mtdx.line_speed equ 2;
|
|
; else
|
|
; mtdx.line_speed equ 1;
|
|
;
|
|
; if (data & FULLMODE)
|
|
; mtdx.duplexmode equ 2;
|
|
; else
|
|
; mtdx.duplexmode equ 1;
|
|
; }
|
|
; else if (mtdx.PHYType equequ LevelOnePHY) {
|
|
; unsigned int data;
|
|
;
|
|
; data equ mdio_read(dev, mtdx.phys[0], SpecificReg);
|
|
; if (data & LXT1000_Full)
|
|
; mtdx.duplexmode equ 2; /* full duplex mode */
|
|
; else
|
|
; mtdx.duplexmode equ 1; /* half duplex mode */
|
|
; data &equ SpeedMask;
|
|
; if (data equequ LXT1000_1000M)
|
|
; mtdx.line_speed equ 3; /* 1000M */
|
|
; else if (data equequ LXT1000_100M)
|
|
; mtdx.line_speed equ 2; /* 100M */
|
|
; else
|
|
; mtdx.line_speed equ 1; /* 10M */
|
|
; }
|
|
|
|
; // chage crvalue
|
|
; // mtdx.crvalue&equ(~PS10)&(~FD);
|
|
; mtdx.crvalue &equ (~PS10) & (~FD) & (~PS1000);
|
|
; if (mtdx.line_speed equequ 1)
|
|
; mtdx.crvalue |equ PS10;
|
|
; else if (mtdx.line_speed equequ 3)
|
|
; mtdx.crvalue |equ PS1000;
|
|
; if (mtdx.duplexmode equequ 2)
|
|
; mtdx.crvalue |equ FD;
|
|
;
|
|
|
|
ret
|
|
|
|
|
|
|
|
|
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
;; ;;
|
|
;; Transmit ;;
|
|
;; ;;
|
|
;; In: buffer pointer in [esp+4] ;;
|
|
;; size of buffer in [esp+8] ;;
|
|
;; pointer to device structure in ebx ;;
|
|
;; ;;
|
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
|
|
align 4
|
|
transmit:
|
|
|
|
DEBUGF 1,"Transmitting packet, buffer:%x, size:%u\n",[esp+4],[esp+8]
|
|
mov eax, [esp+4]
|
|
DEBUGF 1,"To: %x-%x-%x-%x-%x-%x From: %x-%x-%x-%x-%x-%x Type:%x%x\n",\
|
|
[eax+00]:2,[eax+01]:2,[eax+02]:2,[eax+03]:2,[eax+04]:2,[eax+05]:2,\
|
|
[eax+06]:2,[eax+07]:2,[eax+08]:2,[eax+09]:2,[eax+10]:2,[eax+11]:2,\
|
|
[eax+13]:2,[eax+12]:2
|
|
|
|
cmp dword [esp+8], 1514
|
|
ja .fail
|
|
|
|
mov esi, [device.cur_tx]
|
|
push [esi + mtd_desc.next_desc_logical]
|
|
pop [device.cur_tx]
|
|
|
|
; todo: check if descriptor is not owned by the device!
|
|
|
|
mov eax, [esp + 4]
|
|
mov [esi + mtd_desc.skbuff], eax
|
|
GetRealAddr
|
|
mov [esi + mtd_desc.buffer], eax
|
|
|
|
mov eax, [esp + 8]
|
|
shl eax, PKTSShift ; packet size
|
|
or eax, TXLD + TXFD + CRCEnable + PADEnable + TXIC + 1536 shl TBSShift ; buffer size
|
|
mov [esi + mtd_desc.control], eax
|
|
|
|
mov [esi + mtd_desc.status], TXOWN
|
|
|
|
;-------------
|
|
; Update stats
|
|
|
|
inc [device.packets_tx]
|
|
mov eax, [esp+8]
|
|
add dword [device.bytes_tx], eax
|
|
adc dword [device.bytes_tx + 4], 0
|
|
|
|
; Point to transmit descriptor
|
|
|
|
set_io 0
|
|
set_io TXLBA
|
|
mov eax, esi
|
|
GetRealAddr
|
|
out dx, eax
|
|
|
|
; set_io TCRRCR
|
|
; mov eax, [device.crvalue]
|
|
; out dx, eax
|
|
|
|
; Wake the potentially-idle transmit channel.
|
|
|
|
set_io TXPDR ; TX Poll
|
|
xor eax, eax
|
|
out dx, eax
|
|
|
|
DEBUGF 1,"transmit ok\n"
|
|
xor eax, eax
|
|
ret 8
|
|
|
|
.fail:
|
|
DEBUGF 1,"transmit failed\n"
|
|
or eax, -1
|
|
stdcall KernelFree, [esp + 4]
|
|
ret 8
|
|
|
|
|
|
|
|
align 4
|
|
read_mac:
|
|
|
|
set_io 0
|
|
set_io PAR0
|
|
lea edi, [device.mac]
|
|
insd
|
|
stosd
|
|
set_io PAR1
|
|
insw
|
|
stosw
|
|
|
|
DEBUGF 1,"MAC = %x-%x-%x-%x-%x-%x\n",\
|
|
[device.mac+0]:2,[device.mac+1]:2,[device.mac+2]:2,[device.mac+3]:2,[device.mac+4]:2,[device.mac+5]:2
|
|
|
|
ret
|
|
|
|
align 4
|
|
write_mac:
|
|
|
|
ret
|
|
|
|
|
|
|
|
;;;;;;;;;;;;;;;;;;;;;;;
|
|
;; ;;
|
|
;; Interrupt handler ;;
|
|
;; ;;
|
|
;;;;;;;;;;;;;;;;;;;;;;;
|
|
|
|
align 4
|
|
int_handler:
|
|
|
|
DEBUGF 1,"\nIRQ %x\n",eax:2 ; no, you cant replace 'eax:2' with 'al', this must be a bug in FDO
|
|
|
|
; find pointer of device wich made IRQ occur
|
|
|
|
mov ecx, [devices]
|
|
test ecx, ecx
|
|
jz .fail
|
|
mov esi, device_list
|
|
.nextdevice:
|
|
mov ebx, dword [esi]
|
|
|
|
set_io 0
|
|
set_io ISR
|
|
in eax, dx
|
|
out dx , eax ; send it back to ACK
|
|
; and eax, ; int mask
|
|
test eax, eax
|
|
jnz .got_it
|
|
|
|
.continue:
|
|
add esi, 4
|
|
dec ecx
|
|
jnz .nextdevice
|
|
|
|
ret ; If no device was found, abort (The irq was probably for a device, not registered to this driver)
|
|
|
|
.got_it:
|
|
|
|
DEBUGF 1,"Status=%x\n", eax
|
|
|
|
test ax, RI ; receive interrupt
|
|
jz .no_rx
|
|
|
|
DEBUGF 1,"Receive interrupt\n"
|
|
.rx:
|
|
push ax
|
|
|
|
.rx_loop:
|
|
mov esi, [device.cur_rx]
|
|
|
|
test [esi + mtd_desc.status], RXOWN
|
|
jnz .fail_rx
|
|
|
|
push .rx_complete
|
|
|
|
mov ecx, [esi + mtd_desc.status]
|
|
shr ecx, FLNGShift
|
|
sub ecx, 4 ; we dont need CRC
|
|
push ecx
|
|
|
|
;-------------
|
|
; Update stats
|
|
|
|
add dword [device.bytes_rx], ecx
|
|
adc dword [device.bytes_rx + 4], 0
|
|
inc dword [device.packets_rx]
|
|
|
|
|
|
push [esi + mtd_desc.skbuff]
|
|
|
|
jmp EthReceiver
|
|
|
|
.rx_complete:
|
|
mov esi, [device.cur_rx]
|
|
|
|
mov [esi + mtd_desc.control], 1536 shl RBSShift
|
|
|
|
stdcall KernelAlloc, 1536
|
|
mov [esi + mtd_desc.skbuff], eax
|
|
call GetPgAddr
|
|
mov [esi + mtd_desc.buffer], eax
|
|
|
|
mov [esi + mtd_desc.status], RXOWN
|
|
|
|
mov eax, [esi + mtd_desc.next_desc_logical]
|
|
mov [device.cur_rx], eax
|
|
|
|
jmp .rx_loop
|
|
;
|
|
; while( ( mtdx.cur_rx->status & RXOWN ) == 0 )
|
|
; {
|
|
; mtdx.cur_rx->status = RXOWN;
|
|
; mtdx.cur_rx = mtdx.cur_rx->next_desc_logical;
|
|
; }
|
|
;
|
|
; /* Restart Rx engine if stopped. */
|
|
; outl(0, mtdx.ioaddr + RXPDR);
|
|
|
|
.fail_rx:
|
|
DEBUGF 1,"RX failed\n"
|
|
|
|
pop ax
|
|
.no_rx:
|
|
|
|
test ax, TI ; transmit interrupt
|
|
jz .no_tx
|
|
|
|
DEBUGF 1,"Transmit interrupt\n"
|
|
push ax
|
|
|
|
lea esi, [device.tx_desc]
|
|
mov ecx, NUM_TX_DESC
|
|
.tx_loop:
|
|
|
|
test [esi + mtd_desc.status], TXOWN
|
|
jnz .skip_this_one
|
|
|
|
mov eax, [esi + mtd_desc.skbuff]
|
|
test eax, eax
|
|
je .skip_this_one
|
|
|
|
mov [esi + mtd_desc.skbuff], 0
|
|
|
|
DEBUGF 1,"freeing buffer:%x\n", eax
|
|
stdcall KernelFree, eax
|
|
|
|
.skip_this_one:
|
|
mov esi, [esi + mtd_desc.next_desc_logical]
|
|
loop .tx_loop
|
|
|
|
pop ax
|
|
|
|
.no_tx:
|
|
|
|
test ax, TBU
|
|
jz .no_tbu
|
|
|
|
DEBUGF 1,"Transmit buffer unavailable!\n"
|
|
|
|
.no_tbu:
|
|
|
|
.fail:
|
|
|
|
ret
|
|
|
|
|
|
; End of code
|
|
|
|
align 4 ; Place all initialised data here
|
|
|
|
devices dd 0
|
|
version dd (DRIVER_VERSION shl 16) or (API_VERSION and 0xFFFF)
|
|
my_service db 'mtd80x',0 ; max 16 chars include zero
|
|
|
|
|
|
; 0x1516, 0x0800, "MTD800", "Myson MTD800"
|
|
; 0x1516, 0x0803, "MTD803", "Surecom EP-320X"
|
|
; 0x1516, 0x0891, "MTD891", "Myson MTD891"
|
|
|
|
|
|
include_debug_strings ; All data wich FDO uses will be included here
|
|
|
|
section '.data' data readable writable align 16 ; place all uninitialized data place here
|
|
|
|
device_list rd MAX_DEVICES ; This list contains all pointers to device structures the driver is handling
|
|
|
|
|