forked from KolibriOS/kolibrios
431 lines
8.8 KiB
C++
431 lines
8.8 KiB
C++
/**
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* @file
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* DGen v1.13+
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* Megadrive's VDP C++ module
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*
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* A useful resource for the Genesis VDP:
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* http://cgfm2.emuviews.com/txt/genvdp.txt
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* Thanks to Charles MacDonald for writing these docs.
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <limits.h>
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#include "md.h"
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/** Reset the VDP. */
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void md_vdp::reset()
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{
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hint_pending = false;
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vint_pending = false;
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cmd_pending = false;
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rw_mode = 0x00;
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rw_addr = 0;
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rw_dma = 0;
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memset(mem, 0, sizeof(mem));
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memset(reg, 0, 0x20);
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memset(dirt, 0xff, 0x35); // mark everything as changed
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memset(highpal, 0, sizeof(highpal));
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memset(sprite_order, 0, sizeof(sprite_order));
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memset(sprite_mask, 0xff, sizeof(sprite_mask));
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sprite_base = NULL;
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sprite_count = 0;
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masking_sprite_index_cache = -1;
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dots_cache = 0;
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sprite_overflow_line = INT_MIN;
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dest = NULL;
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bmap = NULL;
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}
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/**
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* VDP constructor.
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*
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* @param md The md instance this VDP belongs to.
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*/
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md_vdp::md_vdp(md& md): belongs(md)
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{
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vram = (mem + 0x00000);
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cram = (mem + 0x10000);
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vsram = (mem + 0x10080);
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dirt = (mem + 0x10100); // VRAM/CRAM/Reg dirty buffer bitfield
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// Also in 0x34 are global dirt flags (inclduing VSRAM this time)
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Bpp = Bpp_times8 = 0;
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reset();
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}
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/**
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* VDP destructor.
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*/
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md_vdp::~md_vdp()
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{
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vram = cram = vsram = NULL;
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}
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/** Calculate the DMA length. */
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int md_vdp::dma_len()
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{ return (reg[0x14]<<8)+reg[0x13]; }
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/** Calculate DMA start address. */
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int md_vdp::dma_addr()
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{
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int addr=0;
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addr=(reg[0x17]&0x7f)<<17;
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addr+=reg[0x16]<<9;
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addr+=reg[0x15]<<1;
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return addr;
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}
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/**
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* Do a DMA read.
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* DMA can read from anywhere.
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*
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* @param addr Address where to read from.
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* @return Byte read at "addr".
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*/
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unsigned char md_vdp::dma_mem_read(int addr)
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{
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return belongs.misc_readbyte(addr);
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}
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/**
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* Set value in VRAM.
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* Must go through these calls to update the dirty flags.
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*
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* @param addr Address to write to.
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* @param d Byte to write.
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* @return Always 0.
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*/
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int md_vdp::poke_vram(int addr,unsigned char d)
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{
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addr&=0xffff;
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if (vram[addr]!=d)
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{
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// Store dirty information down to 256 byte level in bits
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int byt,bit;
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byt=addr>>8; bit=byt&7; byt>>=3; byt&=0x1f;
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dirt[0x00+byt]|=(1<<bit); dirt[0x34]|=1;
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vram[addr]=d;
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}
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return 0;
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}
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/**
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* Set value in CRAM.
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*
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* @param addr Address to write to.
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* @param d Byte to write.
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* @return Always 0.
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*/
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int md_vdp::poke_cram(int addr,unsigned char d)
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{
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addr&=0x007f;
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if (cram[addr]!=d)
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{
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// Store dirty information down to 1byte level in bits
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int byt,bit;
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byt=addr; bit=byt&7; byt>>=3; byt&=0x0f;
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dirt[0x20+byt]|=(1<<bit); dirt[0x34]|=2;
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cram[addr]=d;
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}
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return 0;
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}
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/**
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* Set value in VSRAM.
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*
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* @param addr Address to write to.
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* @param d Byte to write.
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* @return Always 0.
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*/
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int md_vdp::poke_vsram(int addr,unsigned char d)
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{
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// int diff=0;
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addr&=0x007f;
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if (vsram[addr]!=d)
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{ dirt[0x34]|=4; vsram[addr]=d; }
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return 0;
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}
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/**
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* Write a word to memory and update dirty flags.
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*
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* @param d 16-bit data to write.
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* @return Always 0.
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*/
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int md_vdp::putword(unsigned short d)
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{
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// Called by dma or a straight write
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switch(rw_mode)
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{
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case 0x04:
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if (rw_addr & 0x0001) {
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poke_vram((rw_addr + 0), (d & 0xff));
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poke_vram((rw_addr + 1), (d >> 8));
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}
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else {
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poke_vram((rw_addr + 0), (d >> 8));
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poke_vram((rw_addr + 1), (d & 0xff));
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}
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break;
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case 0x0c:
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poke_cram((rw_addr + 0), (d >> 8));
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poke_cram((rw_addr + 1), (d & 0xff));
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break;
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case 0x14:
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poke_vsram((rw_addr + 0), (d >> 8));
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poke_vsram((rw_addr + 1), (d & 0xff));
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break;
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}
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rw_addr+=reg[15];
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return 0;
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}
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/**
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* Write a byte to memory and update dirty flags.
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*
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* @param d 8-bit data to write.
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* @return Always 0.
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*/
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int md_vdp::putbyte(unsigned char d)
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{
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// Called by dma or a straight write
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switch(rw_mode)
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{
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case 0x04: poke_vram (rw_addr,d); break;
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case 0x0c: poke_cram (rw_addr,d); break;
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case 0x14: poke_vsram(rw_addr,d); break;
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}
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rw_addr+=reg[15];
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return 0;
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}
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#undef MAYCHANGE
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/**
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* Read a word from memory.
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*
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* @return Read word.
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*/
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unsigned short md_vdp::readword()
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{
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// Called by a straight read only
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unsigned short result=0x0000;
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switch(rw_mode)
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{
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case 0x00: result=( vram[(rw_addr+0)&0xffff]<<8)+
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vram[(rw_addr+1)&0xffff]; break;
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case 0x20: result=( cram[(rw_addr+0)&0x007f]<<8)+
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cram[(rw_addr+1)&0x007f]; break;
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case 0x10: result=(vsram[(rw_addr+0)&0x007f]<<8)+
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vsram[(rw_addr+1)&0x007f]; break;
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}
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rw_addr+=reg[15];
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return result;
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}
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/**
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* Read a byte from memory.
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*
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* @return Read byte.
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*/
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unsigned char md_vdp::readbyte()
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{
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// Called by a straight read only
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unsigned char result=0x00;
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switch(rw_mode)
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{
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case 0x00: result= vram[(rw_addr+0)&0xffff]; break;
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case 0x20: result= cram[(rw_addr+0)&0x007f]; break;
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case 0x10: result=vsram[(rw_addr+0)&0x007f]; break;
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}
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rw_addr+=reg[15];
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return result;
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}
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/**
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* VDP commands
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*
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* A VDP command is 32-bits in length written into the control port
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* as two 16-bit words. The VDP maintains a pending flag so that it knows
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* what to expect next.
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*
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* CD1 CD0 A13 A12 A11 A10 A09 A08 (D31-D24)
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* A07 A06 A05 A04 A03 A02 A01 A00 (D23-D16)
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* ? ? ? ? ? ? ? ? (D15-D8)
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* CD5 CD4 CD3 CD2 ? ? A15 A14 (D7-D0)
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*
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* Where CD* indicates which ram is read or written in subsequent
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* data port read/writes. A* is an address.
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*
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* Note that the command is not cached, but rather, the lower 14 address bits
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* are commited as soon as the first half of the command arrives. Then when
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* the second word arrives, the remaining two address bits are commited.
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*
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* It is possible to cancel (but not roll back) a pending command by:
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* - reading or writing to the data port.
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* - reading the control port.
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*
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* In these cases the pending flag is cleared, and the first half of
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* the command remains comitted.
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*
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* @return Always 0.
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*/
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int md_vdp::command(uint16_t cmd)
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{
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if (cmd_pending) // If this is the second word of a command
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{
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uint16_t A14_15 = (cmd & 0x0003) << 14;
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rw_addr = (rw_addr & 0xffff3fff) | A14_15;
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// Copy rw_addr to mirror register
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rw_addr = (rw_addr & 0x0000ffff) | (rw_addr << 16);
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// CD{4,3,2}
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uint16_t CD4_2 = (cmd & 0x0070);
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rw_mode |= CD4_2;
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// if CD5 == 1
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rw_dma = ((cmd & 0x80) == 0x80);
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cmd_pending = false;
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}
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else // This is the first word of a command
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{
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// masking away command bits CD1 CD0
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uint16_t A00_13 = cmd & 0x3fff;
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rw_addr = (rw_addr & 0xffffc000) | A00_13;
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// Copy rw_addr to mirror register
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rw_addr = (rw_addr & 0x0000ffff) | (rw_addr << 16);
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// CD {1,0}
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uint16_t CD0_1 = (cmd & 0xc000) >> 12;
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rw_mode = CD0_1;
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rw_dma = 0;
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// we will expect the second half of the command next
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cmd_pending = true;
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return 0;
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}
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// if it's a dma request do it straight away
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if (rw_dma)
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{
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int mode=(reg[0x17]>>6)&3;
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int s=0,d=0,i=0,len=0;
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s=dma_addr(); d=rw_addr; len=dma_len();
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(void)d;
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switch (mode)
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{
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case 0: case 1:
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for (i=0;i<len;i++)
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{
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unsigned short val;
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val= dma_mem_read(s++); val<<=8;
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val|=dma_mem_read(s++); putword(val);
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}
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break;
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case 2:
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// Done later on (VRAM fill I believe)
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break;
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case 3:
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for (i=0;i<len;i++)
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{
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unsigned short val;
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val= vram[(s++)&0xffff]; val<<=8;
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val|=vram[(s++)&0xffff]; putword(val);
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}
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break;
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}
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}
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return 0;
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}
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/**
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* Write a word to the VDP.
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*
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* @param d 16-bit data to write.
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* @return Always 0.
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*/
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int md_vdp::writeword(unsigned short d)
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{
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if (rw_dma)
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{
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// This is the 'done later on' bit for words
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// Do a dma fill if it's set up:
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if (((reg[0x17]>>6)&3)==2)
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{
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int i,len;
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len=dma_len();
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for (i=0;i<len;i++)
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putword(d);
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return 0;
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}
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}
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else
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{
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putword(d);
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return 0;
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}
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return 0;
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}
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/**
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* Write a byte to the VDP.
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*
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* @param d 8-bit data to write.
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* @return Always 0.
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*/
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int md_vdp::writebyte(unsigned char d)
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{
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if (rw_dma)
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{
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// This is the 'done later on' bit for bytes
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// Do a dma fill if it's set up:
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if (((reg[0x17]>>6)&3)==2)
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{
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int i,len;
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len=dma_len();
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for (i=0;i<len;i++)
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putbyte(d);
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return 0;
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}
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}
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else
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{
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putbyte(d);
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return 0;
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}
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return 0;
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}
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/**
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* Write away a VDP register.
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*
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* @param addr Address of register.
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* @param data 8-bit data to write.
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*/
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void md_vdp::write_reg(uint8_t addr, uint8_t data)
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{
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uint8_t byt, bit;
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// store dirty information down to 1 byte level in bits
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if (reg[addr] != data) {
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byt = addr;
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bit = (byt & 7);
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byt >>= 3;
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byt &= 0x03;
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dirt[(0x30 + byt)] |= (1 << bit);
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dirt[0x34] |= 8;
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}
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reg[addr] = data;
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// "Writing to a VDP register will clear the code register."
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rw_mode = 0;
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}
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