forked from KolibriOS/kolibrios
182 lines
5.1 KiB
C
182 lines
5.1 KiB
C
/*
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* Copyright 2008 Advanced Micro Devices, Inc.
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* Copyright 2008 Red Hat Inc.
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* Copyright 2009 Jerome Glisse.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Dave Airlie
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* Alex Deucher
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* Jerome Glisse
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*/
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#include "drmP.h"
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#include "radeon_reg.h"
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#include "radeon.h"
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/* rs690,rs740 depends on : */
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void r100_hdp_reset(struct radeon_device *rdev);
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int r300_mc_wait_for_idle(struct radeon_device *rdev);
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void r420_pipes_init(struct radeon_device *rdev);
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void rs400_gart_disable(struct radeon_device *rdev);
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int rs400_gart_enable(struct radeon_device *rdev);
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void rs400_gart_adjust_size(struct radeon_device *rdev);
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void rs600_mc_disable_clients(struct radeon_device *rdev);
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void rs600_disable_vga(struct radeon_device *rdev);
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/* This files gather functions specifics to :
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* rs690,rs740
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*
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* Some of these functions might be used by newer ASICs.
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*/
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void rs690_gpu_init(struct radeon_device *rdev);
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int rs690_mc_wait_for_idle(struct radeon_device *rdev);
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/*
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* MC functions.
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*/
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int rs690_mc_init(struct radeon_device *rdev)
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{
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uint32_t tmp;
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int r;
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// if (r100_debugfs_rbbm_init(rdev)) {
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// DRM_ERROR("Failed to register debugfs file for RBBM !\n");
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// }
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rs690_gpu_init(rdev);
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rs400_gart_disable(rdev);
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/* Setup GPU memory space */
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rdev->mc.gtt_location = rdev->mc.vram_size;
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rdev->mc.gtt_location += (rdev->mc.gtt_size - 1);
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rdev->mc.gtt_location &= ~(rdev->mc.gtt_size - 1);
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rdev->mc.vram_location = 0xFFFFFFFFUL;
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r = radeon_mc_setup(rdev);
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if (r) {
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return r;
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}
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/* Program GPU memory space */
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rs600_mc_disable_clients(rdev);
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if (rs690_mc_wait_for_idle(rdev)) {
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printk(KERN_WARNING "Failed to wait MC idle while "
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"programming pipes. Bad things might happen.\n");
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}
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tmp = rdev->mc.vram_location + rdev->mc.vram_size - 1;
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tmp = REG_SET(RS690_MC_FB_TOP, tmp >> 16);
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tmp |= REG_SET(RS690_MC_FB_START, rdev->mc.vram_location >> 16);
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WREG32_MC(RS690_MCCFG_FB_LOCATION, tmp);
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/* FIXME: Does this reg exist on RS480,RS740 ? */
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WREG32(0x310, rdev->mc.vram_location);
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WREG32(RS690_HDP_FB_LOCATION, rdev->mc.vram_location >> 16);
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return 0;
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}
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void rs690_mc_fini(struct radeon_device *rdev)
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{
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rs400_gart_disable(rdev);
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radeon_gart_table_ram_free(rdev);
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radeon_gart_fini(rdev);
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}
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/*
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* Global GPU functions
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*/
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int rs690_mc_wait_for_idle(struct radeon_device *rdev)
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{
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unsigned i;
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uint32_t tmp;
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for (i = 0; i < rdev->usec_timeout; i++) {
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/* read MC_STATUS */
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tmp = RREG32_MC(RS690_MC_STATUS);
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if (tmp & RS690_MC_STATUS_IDLE) {
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return 0;
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}
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DRM_UDELAY(1);
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}
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return -1;
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}
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void rs690_errata(struct radeon_device *rdev)
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{
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rdev->pll_errata = 0;
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}
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void rs690_gpu_init(struct radeon_device *rdev)
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{
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/* FIXME: HDP same place on rs690 ? */
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r100_hdp_reset(rdev);
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rs600_disable_vga(rdev);
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/* FIXME: is this correct ? */
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r420_pipes_init(rdev);
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if (rs690_mc_wait_for_idle(rdev)) {
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printk(KERN_WARNING "Failed to wait MC idle while "
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"programming pipes. Bad things might happen.\n");
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}
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}
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/*
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* VRAM info.
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*/
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void rs690_vram_info(struct radeon_device *rdev)
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{
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uint32_t tmp;
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rs400_gart_adjust_size(rdev);
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/* DDR for all card after R300 & IGP */
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rdev->mc.vram_is_ddr = true;
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/* FIXME: is this correct for RS690/RS740 ? */
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tmp = RREG32(RADEON_MEM_CNTL);
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if (tmp & R300_MEM_NUM_CHANNELS_MASK) {
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rdev->mc.vram_width = 128;
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} else {
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rdev->mc.vram_width = 64;
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}
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rdev->mc.vram_size = RREG32(RADEON_CONFIG_MEMSIZE);
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rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
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rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
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}
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/*
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* Indirect registers accessor
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*/
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uint32_t rs690_mc_rreg(struct radeon_device *rdev, uint32_t reg)
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{
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uint32_t r;
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WREG32(RS690_MC_INDEX, (reg & RS690_MC_INDEX_MASK));
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r = RREG32(RS690_MC_DATA);
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WREG32(RS690_MC_INDEX, RS690_MC_INDEX_MASK);
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return r;
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}
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void rs690_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v)
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{
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WREG32(RS690_MC_INDEX,
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RS690_MC_INDEX_WR_EN | ((reg) & RS690_MC_INDEX_MASK));
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WREG32(RS690_MC_DATA, v);
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WREG32(RS690_MC_INDEX, RS690_MC_INDEX_WR_ACK);
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}
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