2008-10-13 23:02:35 +02:00
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int CreatePixmap(pixmap_t *io)
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{
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2009-02-08 19:41:45 +01:00
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local_pixmap_t *pixmap;
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2008-10-13 23:02:35 +02:00
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2009-02-08 19:41:45 +01:00
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unsigned pitch;
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size_t size;
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2008-10-13 23:02:35 +02:00
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2009-02-08 19:41:45 +01:00
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addr_t mem_local = 0;
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addr_t mem_dma = 0;
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void *mapped;
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2008-10-13 23:02:35 +02:00
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2009-02-08 19:41:45 +01:00
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if( (io->width == 0) || (io->width > 2048)||
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(io->height == 0)|| (io->height > 2048))
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{
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2008-10-13 23:02:35 +02:00
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dbgprintf("Invalid pixmap size w:%d h:%d\n", io->width,io->height);
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return ERR_PARAM;
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2009-02-08 19:41:45 +01:00
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};
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2008-10-13 23:02:35 +02:00
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2009-02-08 19:41:45 +01:00
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pixmap = malloc(sizeof(local_pixmap_t));
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2008-10-13 23:02:35 +02:00
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2009-02-08 19:41:45 +01:00
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if(!pixmap)
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return ERR_PARAM;
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pitch = ((io->width+15)&~15)*4;
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size = pitch*io->height;
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dbgprintf("pitch = %d\n", pitch);
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if( (io->flags & PX_MEM_MASK) == PX_MEM_LOCAL ) {
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mem_local = rhd_mem_alloc(&rhd,RHD_MEM_FB,size);
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mem_dma = mem_local + rhd.fbLocation;
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}
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else
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mem_local = mem_dma = AllocPages( size >> 12 );
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2008-10-13 23:02:35 +02:00
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2009-02-08 19:41:45 +01:00
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if ( !mem_local) {
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2008-10-13 23:02:35 +02:00
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dbgprintf("Not enough memory for pixmap\n");
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2009-02-08 19:41:45 +01:00
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free(pixmap);
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2008-10-13 23:02:35 +02:00
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return ERR_PARAM;
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2009-02-08 19:41:45 +01:00
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};
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2008-10-13 23:02:35 +02:00
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2009-02-08 19:41:45 +01:00
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pixmap->pitch_offset = ((pitch/64)<<22)| (mem_dma>>10);
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pixmap->local = mem_dma;
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2008-10-13 23:02:35 +02:00
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2009-02-08 19:41:45 +01:00
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size = (size+4095) & ~ 4095;
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2008-10-13 23:02:35 +02:00
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2009-02-08 19:41:45 +01:00
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if (mapped = UserAlloc(size))
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{
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CommitPages(mapped, mem_dma|7|(1<<9), size);
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io->mapped = mapped;
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io->pitch = pitch;
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io->handle = (u32_t)pixmap;
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pixmap->width = io->width;
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pixmap->height = io->height;
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pixmap->format = PICT_a8r8g8b8;
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pixmap->flags = io->flags;
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pixmap->pitch = pitch;
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pixmap->mapped = mapped;
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dbgprintf("pixmap.pitch_offset: %x\n", pixmap->pitch_offset);
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dbgprintf("width: %d height: %d\n",pixmap->width,pixmap->height );
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dbgprintf("map at %x\n", pixmap->mapped);
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return ERR_OK;
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};
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rhd_mem_free(&rhd, RHD_MEM_FB, mem_local);
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free(pixmap);
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return ERR_PARAM;
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2008-10-13 23:02:35 +02:00
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};
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int DestroyPixmap( pixmap_t *io )
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{
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2009-02-08 19:41:45 +01:00
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local_pixmap_t *pixmap;
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size_t size;
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2008-10-13 23:02:35 +02:00
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2009-02-08 19:41:45 +01:00
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dbgprintf("Destroy pixmap %x\n", io->handle);
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2008-10-13 23:02:35 +02:00
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2009-02-08 19:41:45 +01:00
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if(io->handle == -1)
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2008-10-13 23:02:35 +02:00
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return ERR_PARAM;
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2009-02-08 19:41:45 +01:00
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else
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2008-10-13 23:02:35 +02:00
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pixmap = (local_pixmap_t*)io->handle;
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2009-02-08 19:41:45 +01:00
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size = (pixmap->pitch*pixmap->height+4095) & ~ 4095;
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UnmapPages(pixmap->mapped, size);
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UserFree(pixmap->mapped);
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if( (io->flags & PX_MEM_MASK) == PX_MEM_LOCAL )
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{
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rhd_mem_free(&rhd,RHD_MEM_FB,pixmap->local-rhd.fbLocation);
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}
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else
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{
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count_t pages = size >> 12;
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addr_t base = pixmap->local;
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while( pages--)
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{
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addr_t tmp;
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// __asm__ __volatile__(
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// "call *__imp__PageFree"
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// :"=eax" (tmp):"a" (base) );
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// base+= 4096;
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};
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}
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free(pixmap);
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io->format = 0;
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io->pitch = 0;
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io->mapped = NULL;
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io->handle = 0;
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return ERR_OK;
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};
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# define ATI_PCIGART_PAGE_SIZE 4096 /**< PCI GART page size */
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# define ATI_PCIGART_PAGE_MASK (~(ATI_PCIGART_PAGE_SIZE-1))
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#define ATI_PCIE_WRITE 0x4
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#define ATI_PCIE_READ 0x8
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#define upper_32_bits(n) ((u32_t)(((n) >> 16) >> 16))
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2009-02-11 07:52:01 +01:00
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static void bind_pcie(u32_t *gart, addr_t base, count_t pages)
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2009-02-08 19:41:45 +01:00
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{
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2009-02-11 07:52:01 +01:00
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addr_t page_base;
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2009-02-08 19:41:45 +01:00
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while(pages--)
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{
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page_base = base & ATI_PCIGART_PAGE_MASK;
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page_base >>= 8;
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page_base |= (upper_32_bits(base) & 0xff) << 24;
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page_base |= ATI_PCIE_READ | ATI_PCIE_WRITE;
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*gart = page_base;
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base+= 4096;
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gart++;
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}
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__asm__ __volatile("sfence":::"memory");
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RADEON_WRITE_PCIE(RADEON_PCIE_TX_GART_CNTL,
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RADEON_PCIE_TX_GART_EN
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| RADEON_PCIE_TX_GART_INVALIDATE_TLB);
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2009-02-11 07:52:01 +01:00
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}
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static void bind_pci(u32_t *gart, addr_t base, count_t pages)
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{
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u32_t tmp;
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tmp = INREG(RADEON_AIC_CNTL);
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OUTREG(RADEON_AIC_CNTL, tmp & ~RADEON_PCIGART_TRANSLATE_EN);
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while(pages--)
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{
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*gart = base & ATI_PCIGART_PAGE_MASK;
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base+= 4096;
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gart++;
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}
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__asm__ __volatile("sfence":::"memory");
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OUTREG(RADEON_AIC_CNTL, tmp | RADEON_PCIGART_TRANSLATE_EN);
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OUTREG(RADEON_AIC_PT_BASE, rhd.gart_table_dma);
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}
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static addr_t bind_pixmap(local_pixmap_t *pixmap)
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{
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u32_t *gart = rhd.gart_table;
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count_t pages = ((pixmap->height * pixmap->pitch+4095)&~4095)>>12;
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addr_t base = pixmap->local;
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if( rhd.gart_type == RADEON_IS_PCIE)
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bind_pcie(gart, base, pages);
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else
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bind_pci(gart, base, pages);
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2009-02-08 19:41:45 +01:00
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return ((pixmap->pitch / 64) << 22) | (rhd.gart_vm_start >> 10);
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}
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#if 0
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int LockPixmap(userpixmap_t *io)
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{
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pixmap_t *pixmap;
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size_t size;
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void *usermap;
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dbgprintf("Lock pixmap %x\n", io->pixmap);
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if(io->pixmap == (pixmap_t*)-1)
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return ERR_PARAM;
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else
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pixmap = io->pixmap;
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if( (pixmap->flags & 1) == PX_LOCK )
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return ERR_PARAM;
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size = (pixmap->pitch*pixmap->width+4095) & ~ 4095;
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if (usermap = UserAlloc(size))
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{
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CommitPages(usermap, ((u32_t)pixmap->raw+rhd.PhisBase)|7|(1<<9), size);
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pixmap->flags |= PX_LOCK;
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pixmap->usermap = usermap;
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io->usermap = usermap;
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io->pitch = pixmap->pitch;
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dbgprintf("map at %x\n", io->usermap);
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2008-10-13 23:02:35 +02:00
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return ERR_OK;
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2009-02-08 19:41:45 +01:00
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}
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else
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return ERR_PARAM;
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2008-10-13 23:02:35 +02:00
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};
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2009-02-08 19:41:45 +01:00
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int UnlockPixmap(userpixmap_t *io)
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{
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pixmap_t *pixmap;
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size_t size;
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dbgprintf("Unlock pixmap %x\n", io->pixmap);
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if(io->pixmap == (pixmap_t*)-1)
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return ERR_PARAM;
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else
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pixmap = io->pixmap;
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if( (pixmap->flags & 1) != PX_LOCK )
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return ERR_PARAM;
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/* Sanity checks */
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if( (pixmap->usermap == 0)||
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((u32_t)pixmap->usermap >= 0x80000000) ||
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((u32_t)pixmap->usermap & 4095)
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)
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return ERR_PARAM;
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size = (pixmap->pitch*pixmap->width+4095) & ~ 4095;
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UnmapPages(pixmap->usermap, size);
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UserFree(pixmap->usermap);
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pixmap->usermap = NULL;
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pixmap->flags &= ~PX_LOCK;
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io->usermap = NULL;
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io->pitch = 0;
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return ERR_OK;
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};
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#endif
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