2011-12-26 20:41:30 +01:00
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/*
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* Copyright © 2006-2010 Intel Corporation
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* Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Eric Anholt <eric@anholt.net>
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* Dave Airlie <airlied@linux.ie>
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* Jesse Barnes <jesse.barnes@intel.com>
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* Chris Wilson <chris@chris-wilson.co.uk>
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*/
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2012-11-12 22:22:52 +01:00
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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2011-12-26 20:41:30 +01:00
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2012-11-12 22:22:52 +01:00
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#include <linux/moduleparam.h>
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#include "intel_drv.h"
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2011-12-26 20:41:30 +01:00
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#define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
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void
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2013-10-26 15:34:57 +02:00
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intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
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2011-12-26 20:41:30 +01:00
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struct drm_display_mode *adjusted_mode)
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{
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2013-10-26 15:34:57 +02:00
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drm_mode_copy(adjusted_mode, fixed_mode);
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2011-12-26 20:41:30 +01:00
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2013-10-26 15:34:57 +02:00
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drm_mode_set_crtcinfo(adjusted_mode, 0);
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2011-12-26 20:41:30 +01:00
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}
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/* adjusted_mode has been preset to be the panel's fixed mode */
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void
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2013-10-26 15:34:57 +02:00
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intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
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struct intel_crtc_config *pipe_config,
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int fitting_mode)
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2011-12-26 20:41:30 +01:00
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{
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2013-10-26 15:34:57 +02:00
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struct drm_display_mode *mode, *adjusted_mode;
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2011-12-26 20:41:30 +01:00
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int x, y, width, height;
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2013-10-26 15:34:57 +02:00
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mode = &pipe_config->requested_mode;
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adjusted_mode = &pipe_config->adjusted_mode;
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2011-12-26 20:41:30 +01:00
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x = y = width = height = 0;
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/* Native modes don't need fitting */
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if (adjusted_mode->hdisplay == mode->hdisplay &&
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adjusted_mode->vdisplay == mode->vdisplay)
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goto done;
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switch (fitting_mode) {
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case DRM_MODE_SCALE_CENTER:
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width = mode->hdisplay;
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height = mode->vdisplay;
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x = (adjusted_mode->hdisplay - width + 1)/2;
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y = (adjusted_mode->vdisplay - height + 1)/2;
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break;
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case DRM_MODE_SCALE_ASPECT:
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/* Scale but preserve the aspect ratio */
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{
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u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
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u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
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if (scaled_width > scaled_height) { /* pillar */
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width = scaled_height / mode->vdisplay;
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if (width & 1)
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width++;
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x = (adjusted_mode->hdisplay - width + 1) / 2;
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y = 0;
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height = adjusted_mode->vdisplay;
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} else if (scaled_width < scaled_height) { /* letter */
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height = scaled_width / mode->hdisplay;
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if (height & 1)
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height++;
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y = (adjusted_mode->vdisplay - height + 1) / 2;
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x = 0;
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width = adjusted_mode->hdisplay;
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} else {
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x = y = 0;
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width = adjusted_mode->hdisplay;
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height = adjusted_mode->vdisplay;
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}
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}
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break;
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case DRM_MODE_SCALE_FULLSCREEN:
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x = y = 0;
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width = adjusted_mode->hdisplay;
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height = adjusted_mode->vdisplay;
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break;
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2013-10-26 15:34:57 +02:00
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default:
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WARN(1, "bad panel fit mode: %d\n", fitting_mode);
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return;
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2011-12-26 20:41:30 +01:00
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}
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done:
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2013-10-26 15:34:57 +02:00
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pipe_config->pch_pfit.pos = (x << 16) | y;
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pipe_config->pch_pfit.size = (width << 16) | height;
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pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
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}
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static void
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centre_horizontally(struct drm_display_mode *mode,
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int width)
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{
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u32 border, sync_pos, blank_width, sync_width;
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/* keep the hsync and hblank widths constant */
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sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
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blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
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sync_pos = (blank_width - sync_width + 1) / 2;
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border = (mode->hdisplay - width + 1) / 2;
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border += border & 1; /* make the border even */
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mode->crtc_hdisplay = width;
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mode->crtc_hblank_start = width + border;
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mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
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mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
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mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
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}
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static void
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centre_vertically(struct drm_display_mode *mode,
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int height)
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{
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u32 border, sync_pos, blank_width, sync_width;
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/* keep the vsync and vblank widths constant */
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sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
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blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
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sync_pos = (blank_width - sync_width + 1) / 2;
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border = (mode->vdisplay - height + 1) / 2;
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mode->crtc_vdisplay = height;
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mode->crtc_vblank_start = height + border;
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mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
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mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
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mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
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}
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static inline u32 panel_fitter_scaling(u32 source, u32 target)
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{
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/*
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* Floating point operation is not supported. So the FACTOR
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* is defined, which can avoid the floating point computation
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* when calculating the panel ratio.
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*/
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#define ACCURACY 12
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#define FACTOR (1 << ACCURACY)
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u32 ratio = source * FACTOR / target;
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return (FACTOR * ratio + FACTOR/2) / FACTOR;
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}
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void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
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struct intel_crtc_config *pipe_config,
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int fitting_mode)
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{
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struct drm_device *dev = intel_crtc->base.dev;
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u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
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struct drm_display_mode *mode, *adjusted_mode;
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mode = &pipe_config->requested_mode;
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adjusted_mode = &pipe_config->adjusted_mode;
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/* Native modes don't need fitting */
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if (adjusted_mode->hdisplay == mode->hdisplay &&
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adjusted_mode->vdisplay == mode->vdisplay)
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goto out;
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switch (fitting_mode) {
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case DRM_MODE_SCALE_CENTER:
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/*
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* For centered modes, we have to calculate border widths &
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* heights and modify the values programmed into the CRTC.
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*/
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centre_horizontally(adjusted_mode, mode->hdisplay);
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centre_vertically(adjusted_mode, mode->vdisplay);
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border = LVDS_BORDER_ENABLE;
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break;
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case DRM_MODE_SCALE_ASPECT:
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/* Scale but preserve the aspect ratio */
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if (INTEL_INFO(dev)->gen >= 4) {
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u32 scaled_width = adjusted_mode->hdisplay *
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mode->vdisplay;
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u32 scaled_height = mode->hdisplay *
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adjusted_mode->vdisplay;
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/* 965+ is easy, it does everything in hw */
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if (scaled_width > scaled_height)
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pfit_control |= PFIT_ENABLE |
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PFIT_SCALING_PILLAR;
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else if (scaled_width < scaled_height)
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pfit_control |= PFIT_ENABLE |
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PFIT_SCALING_LETTER;
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else if (adjusted_mode->hdisplay != mode->hdisplay)
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pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
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} else {
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u32 scaled_width = adjusted_mode->hdisplay *
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mode->vdisplay;
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u32 scaled_height = mode->hdisplay *
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adjusted_mode->vdisplay;
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/*
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* For earlier chips we have to calculate the scaling
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* ratio by hand and program it into the
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* PFIT_PGM_RATIO register
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*/
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if (scaled_width > scaled_height) { /* pillar */
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centre_horizontally(adjusted_mode,
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scaled_height /
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mode->vdisplay);
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border = LVDS_BORDER_ENABLE;
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if (mode->vdisplay != adjusted_mode->vdisplay) {
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u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
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pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
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bits << PFIT_VERT_SCALE_SHIFT);
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pfit_control |= (PFIT_ENABLE |
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VERT_INTERP_BILINEAR |
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HORIZ_INTERP_BILINEAR);
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}
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} else if (scaled_width < scaled_height) { /* letter */
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centre_vertically(adjusted_mode,
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scaled_width /
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mode->hdisplay);
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border = LVDS_BORDER_ENABLE;
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if (mode->hdisplay != adjusted_mode->hdisplay) {
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u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
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pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
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bits << PFIT_VERT_SCALE_SHIFT);
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pfit_control |= (PFIT_ENABLE |
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VERT_INTERP_BILINEAR |
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HORIZ_INTERP_BILINEAR);
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}
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} else {
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/* Aspects match, Let hw scale both directions */
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pfit_control |= (PFIT_ENABLE |
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VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
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VERT_INTERP_BILINEAR |
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HORIZ_INTERP_BILINEAR);
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}
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}
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break;
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case DRM_MODE_SCALE_FULLSCREEN:
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/*
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* Full scaling, even if it changes the aspect ratio.
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* Fortunately this is all done for us in hw.
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*/
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if (mode->vdisplay != adjusted_mode->vdisplay ||
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mode->hdisplay != adjusted_mode->hdisplay) {
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pfit_control |= PFIT_ENABLE;
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if (INTEL_INFO(dev)->gen >= 4)
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pfit_control |= PFIT_SCALING_AUTO;
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else
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pfit_control |= (VERT_AUTO_SCALE |
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VERT_INTERP_BILINEAR |
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HORIZ_AUTO_SCALE |
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HORIZ_INTERP_BILINEAR);
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}
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break;
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default:
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WARN(1, "bad panel fit mode: %d\n", fitting_mode);
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return;
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}
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/* 965+ wants fuzzy fitting */
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/* FIXME: handle multiple panels by failing gracefully */
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if (INTEL_INFO(dev)->gen >= 4)
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pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
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PFIT_FILTER_FUZZY);
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out:
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if ((pfit_control & PFIT_ENABLE) == 0) {
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pfit_control = 0;
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pfit_pgm_ratios = 0;
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}
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/* Make sure pre-965 set dither correctly for 18bpp panels. */
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if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
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pfit_control |= PANEL_8TO6_DITHER_ENABLE;
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pipe_config->gmch_pfit.control = pfit_control;
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pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
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pipe_config->gmch_pfit.lvds_border_bits = border;
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2011-12-26 20:41:30 +01:00
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}
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static int is_backlight_combination_mode(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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if (INTEL_INFO(dev)->gen >= 4)
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return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE;
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if (IS_GEN2(dev))
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return I915_READ(BLC_PWM_CTL) & BLM_LEGACY_MODE;
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return 0;
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}
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|
2013-10-26 15:34:57 +02:00
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/* XXX: query mode clock or hardware clock and program max PWM appropriately
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* when it's 0.
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*/
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2013-02-13 09:23:54 +01:00
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static u32 i915_read_blc_pwm_ctl(struct drm_device *dev)
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2011-12-26 20:41:30 +01:00
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{
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2013-02-13 09:23:54 +01:00
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struct drm_i915_private *dev_priv = dev->dev_private;
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2011-12-26 20:41:30 +01:00
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u32 val;
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2013-10-26 15:34:57 +02:00
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// WARN_ON_SMP(!spin_is_locked(&dev_priv->backlight.lock));
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2011-12-26 20:41:30 +01:00
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/* Restore the CTL value if it lost, e.g. GPU reset */
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if (HAS_PCH_SPLIT(dev_priv->dev)) {
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val = I915_READ(BLC_PWM_PCH_CTL2);
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2013-02-13 09:23:54 +01:00
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if (dev_priv->regfile.saveBLC_PWM_CTL2 == 0) {
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|
|
dev_priv->regfile.saveBLC_PWM_CTL2 = val;
|
2011-12-26 20:41:30 +01:00
|
|
|
} else if (val == 0) {
|
2013-02-13 09:23:54 +01:00
|
|
|
val = dev_priv->regfile.saveBLC_PWM_CTL2;
|
|
|
|
I915_WRITE(BLC_PWM_PCH_CTL2, val);
|
2011-12-26 20:41:30 +01:00
|
|
|
}
|
|
|
|
} else {
|
|
|
|
val = I915_READ(BLC_PWM_CTL);
|
2013-02-13 09:23:54 +01:00
|
|
|
if (dev_priv->regfile.saveBLC_PWM_CTL == 0) {
|
|
|
|
dev_priv->regfile.saveBLC_PWM_CTL = val;
|
|
|
|
if (INTEL_INFO(dev)->gen >= 4)
|
|
|
|
dev_priv->regfile.saveBLC_PWM_CTL2 =
|
|
|
|
I915_READ(BLC_PWM_CTL2);
|
2011-12-26 20:41:30 +01:00
|
|
|
} else if (val == 0) {
|
2013-02-13 09:23:54 +01:00
|
|
|
val = dev_priv->regfile.saveBLC_PWM_CTL;
|
|
|
|
I915_WRITE(BLC_PWM_CTL, val);
|
|
|
|
if (INTEL_INFO(dev)->gen >= 4)
|
2011-12-26 20:41:30 +01:00
|
|
|
I915_WRITE(BLC_PWM_CTL2,
|
2013-02-13 09:23:54 +01:00
|
|
|
dev_priv->regfile.saveBLC_PWM_CTL2);
|
2011-12-26 20:41:30 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return val;
|
|
|
|
}
|
|
|
|
|
2013-10-26 15:34:57 +02:00
|
|
|
static u32 intel_panel_get_max_backlight(struct drm_device *dev)
|
2011-12-26 20:41:30 +01:00
|
|
|
{
|
|
|
|
u32 max;
|
|
|
|
|
2013-02-13 09:23:54 +01:00
|
|
|
max = i915_read_blc_pwm_ctl(dev);
|
2011-12-26 20:41:30 +01:00
|
|
|
|
|
|
|
if (HAS_PCH_SPLIT(dev)) {
|
|
|
|
max >>= 16;
|
|
|
|
} else {
|
2012-02-03 07:54:20 +01:00
|
|
|
if (INTEL_INFO(dev)->gen < 4)
|
2011-12-26 20:41:30 +01:00
|
|
|
max >>= 17;
|
2012-02-03 07:54:20 +01:00
|
|
|
else
|
2011-12-26 20:41:30 +01:00
|
|
|
max >>= 16;
|
|
|
|
|
|
|
|
if (is_backlight_combination_mode(dev))
|
|
|
|
max *= 0xff;
|
|
|
|
}
|
|
|
|
|
|
|
|
DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max);
|
2013-10-26 15:34:57 +02:00
|
|
|
|
2011-12-26 20:41:30 +01:00
|
|
|
return max;
|
|
|
|
}
|
|
|
|
|
2012-11-12 22:22:52 +01:00
|
|
|
static int i915_panel_invert_brightness;
|
|
|
|
MODULE_PARM_DESC(invert_brightness, "Invert backlight brightness "
|
|
|
|
"(-1 force normal, 0 machine defaults, 1 force inversion), please "
|
|
|
|
"report PCI device ID, subsystem vendor and subsystem device ID "
|
|
|
|
"to dri-devel@lists.freedesktop.org, if your machine needs it. "
|
|
|
|
"It will then be included in an upcoming module version.");
|
|
|
|
module_param_named(invert_brightness, i915_panel_invert_brightness, int, 0600);
|
|
|
|
static u32 intel_panel_compute_brightness(struct drm_device *dev, u32 val)
|
|
|
|
{
|
|
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
|
|
|
|
|
|
if (i915_panel_invert_brightness < 0)
|
|
|
|
return val;
|
|
|
|
|
|
|
|
if (i915_panel_invert_brightness > 0 ||
|
2013-10-26 15:34:57 +02:00
|
|
|
dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
|
|
|
|
u32 max = intel_panel_get_max_backlight(dev);
|
|
|
|
if (max)
|
|
|
|
return max - val;
|
|
|
|
}
|
2012-11-12 22:22:52 +01:00
|
|
|
|
|
|
|
return val;
|
|
|
|
}
|
|
|
|
|
|
|
|
static u32 intel_panel_get_backlight(struct drm_device *dev)
|
2011-12-26 20:41:30 +01:00
|
|
|
{
|
|
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
|
|
u32 val;
|
2013-10-26 15:34:57 +02:00
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&dev_priv->backlight.lock, flags);
|
2011-12-26 20:41:30 +01:00
|
|
|
|
|
|
|
if (HAS_PCH_SPLIT(dev)) {
|
|
|
|
val = I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
|
|
|
|
} else {
|
|
|
|
val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
|
2012-02-03 07:54:20 +01:00
|
|
|
if (INTEL_INFO(dev)->gen < 4)
|
2011-12-26 20:41:30 +01:00
|
|
|
val >>= 1;
|
|
|
|
|
2012-02-03 07:54:20 +01:00
|
|
|
if (is_backlight_combination_mode(dev)) {
|
2011-12-26 20:41:30 +01:00
|
|
|
u8 lbpc;
|
|
|
|
|
|
|
|
pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
|
|
|
|
val *= lbpc;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2012-11-12 22:22:52 +01:00
|
|
|
val = intel_panel_compute_brightness(dev, val);
|
2013-10-26 15:34:57 +02:00
|
|
|
|
|
|
|
spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
|
|
|
|
|
2011-12-26 20:41:30 +01:00
|
|
|
DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
|
|
|
|
return val;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void intel_pch_panel_set_backlight(struct drm_device *dev, u32 level)
|
|
|
|
{
|
|
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
|
|
u32 val = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
|
|
|
|
I915_WRITE(BLC_PWM_CPU_CTL, val | level);
|
|
|
|
}
|
|
|
|
|
2012-02-03 07:54:20 +01:00
|
|
|
static void intel_panel_actually_set_backlight(struct drm_device *dev, u32 level)
|
2011-12-26 20:41:30 +01:00
|
|
|
{
|
|
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
|
|
u32 tmp;
|
|
|
|
|
|
|
|
DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
|
2012-11-12 22:22:52 +01:00
|
|
|
level = intel_panel_compute_brightness(dev, level);
|
2011-12-26 20:41:30 +01:00
|
|
|
|
|
|
|
if (HAS_PCH_SPLIT(dev))
|
|
|
|
return intel_pch_panel_set_backlight(dev, level);
|
|
|
|
|
2012-02-03 07:54:20 +01:00
|
|
|
if (is_backlight_combination_mode(dev)) {
|
2011-12-26 20:41:30 +01:00
|
|
|
u32 max = intel_panel_get_max_backlight(dev);
|
|
|
|
u8 lbpc;
|
|
|
|
|
2013-10-26 15:34:57 +02:00
|
|
|
/* we're screwed, but keep behaviour backwards compatible */
|
|
|
|
if (!max)
|
|
|
|
max = 1;
|
|
|
|
|
2011-12-26 20:41:30 +01:00
|
|
|
lbpc = level * 0xfe / max + 1;
|
|
|
|
level /= lbpc;
|
|
|
|
pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
|
|
|
|
}
|
|
|
|
|
|
|
|
tmp = I915_READ(BLC_PWM_CTL);
|
2012-11-12 22:22:52 +01:00
|
|
|
if (INTEL_INFO(dev)->gen < 4)
|
2011-12-26 20:41:30 +01:00
|
|
|
level <<= 1;
|
|
|
|
tmp &= ~BACKLIGHT_DUTY_CYCLE_MASK;
|
|
|
|
I915_WRITE(BLC_PWM_CTL, tmp | level);
|
|
|
|
}
|
|
|
|
|
2013-10-26 15:34:57 +02:00
|
|
|
/* set backlight brightness to level in range [0..max] */
|
|
|
|
void intel_panel_set_backlight(struct drm_device *dev, u32 level, u32 max)
|
2012-02-03 07:54:20 +01:00
|
|
|
{
|
|
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
|
|
|
2013-07-02 18:03:52 +02:00
|
|
|
dev_priv->backlight.level = level;
|
|
|
|
// if (dev_priv->backlight.device)
|
|
|
|
// dev_priv->backlight.device->props.brightness = level;
|
|
|
|
|
|
|
|
// if (dev_priv->backlight.enabled)
|
|
|
|
// intel_panel_actually_set_backlight(dev, level);
|
2012-02-03 07:54:20 +01:00
|
|
|
}
|
|
|
|
|
2011-12-26 20:41:30 +01:00
|
|
|
void intel_panel_disable_backlight(struct drm_device *dev)
|
|
|
|
{
|
|
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
2013-10-26 15:34:57 +02:00
|
|
|
unsigned long flags;
|
|
|
|
|
2013-11-26 07:18:53 +01:00
|
|
|
/*
|
|
|
|
* Do not disable backlight on the vgaswitcheroo path. When switching
|
|
|
|
* away from i915, the other client may depend on i915 to handle the
|
|
|
|
* backlight. This will leave the backlight on unnecessarily when
|
|
|
|
* another client is not activated.
|
|
|
|
*/
|
|
|
|
if (dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) {
|
|
|
|
DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2013-10-26 15:34:57 +02:00
|
|
|
spin_lock_irqsave(&dev_priv->backlight.lock, flags);
|
2011-12-26 20:41:30 +01:00
|
|
|
|
2013-07-02 18:03:52 +02:00
|
|
|
dev_priv->backlight.enabled = false;
|
2012-02-03 07:54:20 +01:00
|
|
|
intel_panel_actually_set_backlight(dev, 0);
|
2012-11-12 22:22:52 +01:00
|
|
|
|
|
|
|
if (INTEL_INFO(dev)->gen >= 4) {
|
|
|
|
uint32_t reg, tmp;
|
|
|
|
|
|
|
|
reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
|
|
|
|
|
|
|
|
I915_WRITE(reg, I915_READ(reg) & ~BLM_PWM_ENABLE);
|
|
|
|
|
|
|
|
if (HAS_PCH_SPLIT(dev)) {
|
|
|
|
tmp = I915_READ(BLC_PWM_PCH_CTL1);
|
|
|
|
tmp &= ~BLM_PCH_PWM_ENABLE;
|
|
|
|
I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
|
|
|
|
}
|
|
|
|
}
|
2013-10-26 15:34:57 +02:00
|
|
|
|
|
|
|
spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
|
2011-12-26 20:41:30 +01:00
|
|
|
}
|
|
|
|
|
2012-11-12 22:22:52 +01:00
|
|
|
void intel_panel_enable_backlight(struct drm_device *dev,
|
|
|
|
enum pipe pipe)
|
2011-12-26 20:41:30 +01:00
|
|
|
{
|
|
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
2013-10-26 15:34:57 +02:00
|
|
|
enum transcoder cpu_transcoder =
|
|
|
|
intel_pipe_to_cpu_transcoder(dev_priv, pipe);
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&dev_priv->backlight.lock, flags);
|
2011-12-26 20:41:30 +01:00
|
|
|
|
2013-07-02 18:03:52 +02:00
|
|
|
if (dev_priv->backlight.level == 0) {
|
|
|
|
dev_priv->backlight.level = intel_panel_get_max_backlight(dev);
|
|
|
|
// if (dev_priv->backlight.device)
|
|
|
|
// dev_priv->backlight.device->props.brightness =
|
|
|
|
// dev_priv->backlight.level;
|
|
|
|
}
|
2011-12-26 20:41:30 +01:00
|
|
|
|
2012-11-12 22:22:52 +01:00
|
|
|
if (INTEL_INFO(dev)->gen >= 4) {
|
|
|
|
uint32_t reg, tmp;
|
|
|
|
|
|
|
|
reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
|
|
|
|
|
|
|
|
|
|
|
|
tmp = I915_READ(reg);
|
|
|
|
|
|
|
|
/* Note that this can also get called through dpms changes. And
|
|
|
|
* we don't track the backlight dpms state, hence check whether
|
|
|
|
* we have to do anything first. */
|
|
|
|
if (tmp & BLM_PWM_ENABLE)
|
|
|
|
goto set_level;
|
|
|
|
|
2013-07-02 18:03:52 +02:00
|
|
|
if (INTEL_INFO(dev)->num_pipes == 3)
|
2012-11-12 22:22:52 +01:00
|
|
|
tmp &= ~BLM_PIPE_SELECT_IVB;
|
|
|
|
else
|
|
|
|
tmp &= ~BLM_PIPE_SELECT;
|
|
|
|
|
2013-10-26 15:34:57 +02:00
|
|
|
if (cpu_transcoder == TRANSCODER_EDP)
|
|
|
|
tmp |= BLM_TRANSCODER_EDP;
|
|
|
|
else
|
|
|
|
tmp |= BLM_PIPE(cpu_transcoder);
|
2012-11-12 22:22:52 +01:00
|
|
|
tmp &= ~BLM_PWM_ENABLE;
|
|
|
|
|
|
|
|
I915_WRITE(reg, tmp);
|
|
|
|
POSTING_READ(reg);
|
|
|
|
I915_WRITE(reg, tmp | BLM_PWM_ENABLE);
|
|
|
|
|
2013-10-26 15:34:57 +02:00
|
|
|
if (HAS_PCH_SPLIT(dev) &&
|
|
|
|
!(dev_priv->quirks & QUIRK_NO_PCH_PWM_ENABLE)) {
|
2012-11-12 22:22:52 +01:00
|
|
|
tmp = I915_READ(BLC_PWM_PCH_CTL1);
|
|
|
|
tmp |= BLM_PCH_PWM_ENABLE;
|
|
|
|
tmp &= ~BLM_PCH_OVERRIDE_ENABLE;
|
|
|
|
I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
set_level:
|
|
|
|
/* Call below after setting BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1.
|
|
|
|
* BLC_PWM_CPU_CTL may be cleared to zero automatically when these
|
|
|
|
* registers are set.
|
|
|
|
*/
|
2013-07-02 18:03:52 +02:00
|
|
|
dev_priv->backlight.enabled = true;
|
|
|
|
intel_panel_actually_set_backlight(dev, dev_priv->backlight.level);
|
2013-10-26 15:34:57 +02:00
|
|
|
|
|
|
|
spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
|
2011-12-26 20:41:30 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static void intel_panel_init_backlight(struct drm_device *dev)
|
|
|
|
{
|
|
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
|
|
|
2013-07-02 18:03:52 +02:00
|
|
|
dev_priv->backlight.level = intel_panel_get_backlight(dev);
|
|
|
|
dev_priv->backlight.enabled = dev_priv->backlight.level != 0;
|
2011-12-26 20:41:30 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
enum drm_connector_status
|
|
|
|
intel_panel_detect(struct drm_device *dev)
|
|
|
|
{
|
|
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
|
|
|
|
|
|
/* Assume that the BIOS does not lie through the OpRegion... */
|
2013-02-13 09:23:54 +01:00
|
|
|
if (!i915_panel_ignore_lid && dev_priv->opregion.lid_state) {
|
2011-12-26 20:41:30 +01:00
|
|
|
return ioread32(dev_priv->opregion.lid_state) & 0x1 ?
|
|
|
|
connector_status_connected :
|
|
|
|
connector_status_disconnected;
|
2013-02-13 09:23:54 +01:00
|
|
|
}
|
2011-12-26 20:41:30 +01:00
|
|
|
|
2013-02-13 09:23:54 +01:00
|
|
|
switch (i915_panel_ignore_lid) {
|
|
|
|
case -2:
|
|
|
|
return connector_status_connected;
|
|
|
|
case -1:
|
|
|
|
return connector_status_disconnected;
|
|
|
|
default:
|
2011-12-26 20:41:30 +01:00
|
|
|
return connector_status_unknown;
|
2013-02-13 09:23:54 +01:00
|
|
|
}
|
2011-12-26 20:41:30 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
|
|
|
|
static int intel_panel_update_status(struct backlight_device *bd)
|
|
|
|
{
|
|
|
|
struct drm_device *dev = bl_get_data(bd);
|
2013-10-26 15:34:57 +02:00
|
|
|
intel_panel_set_backlight(dev, bd->props.brightness,
|
|
|
|
bd->props.max_brightness);
|
2011-12-26 20:41:30 +01:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int intel_panel_get_brightness(struct backlight_device *bd)
|
|
|
|
{
|
|
|
|
struct drm_device *dev = bl_get_data(bd);
|
2013-07-02 18:03:52 +02:00
|
|
|
return intel_panel_get_backlight(dev);
|
2011-12-26 20:41:30 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static const struct backlight_ops intel_panel_bl_ops = {
|
|
|
|
.update_status = intel_panel_update_status,
|
|
|
|
.get_brightness = intel_panel_get_brightness,
|
|
|
|
};
|
|
|
|
|
2013-02-13 09:23:54 +01:00
|
|
|
int intel_panel_setup_backlight(struct drm_connector *connector)
|
2011-12-26 20:41:30 +01:00
|
|
|
{
|
2013-02-13 09:23:54 +01:00
|
|
|
struct drm_device *dev = connector->dev;
|
2011-12-26 20:41:30 +01:00
|
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
|
|
struct backlight_properties props;
|
2013-10-26 15:34:57 +02:00
|
|
|
unsigned long flags;
|
2011-12-26 20:41:30 +01:00
|
|
|
|
|
|
|
intel_panel_init_backlight(dev);
|
|
|
|
|
2013-07-02 18:03:52 +02:00
|
|
|
if (WARN_ON(dev_priv->backlight.device))
|
|
|
|
return -ENODEV;
|
|
|
|
|
2012-11-12 22:22:52 +01:00
|
|
|
memset(&props, 0, sizeof(props));
|
2011-12-26 20:41:30 +01:00
|
|
|
props.type = BACKLIGHT_RAW;
|
2013-07-02 18:03:52 +02:00
|
|
|
props.brightness = dev_priv->backlight.level;
|
2013-10-26 15:34:57 +02:00
|
|
|
|
|
|
|
spin_lock_irqsave(&dev_priv->backlight.lock, flags);
|
|
|
|
props.max_brightness = intel_panel_get_max_backlight(dev);
|
|
|
|
spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
|
|
|
|
|
2012-11-12 22:22:52 +01:00
|
|
|
if (props.max_brightness == 0) {
|
|
|
|
DRM_DEBUG_DRIVER("Failed to get maximum backlight value\n");
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
2013-07-02 18:03:52 +02:00
|
|
|
dev_priv->backlight.device =
|
2011-12-26 20:41:30 +01:00
|
|
|
backlight_device_register("intel_backlight",
|
|
|
|
&connector->kdev, dev,
|
|
|
|
&intel_panel_bl_ops, &props);
|
|
|
|
|
2013-07-02 18:03:52 +02:00
|
|
|
if (IS_ERR(dev_priv->backlight.device)) {
|
2011-12-26 20:41:30 +01:00
|
|
|
DRM_ERROR("Failed to register backlight: %ld\n",
|
2013-07-02 18:03:52 +02:00
|
|
|
PTR_ERR(dev_priv->backlight.device));
|
|
|
|
dev_priv->backlight.device = NULL;
|
2011-12-26 20:41:30 +01:00
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void intel_panel_destroy_backlight(struct drm_device *dev)
|
|
|
|
{
|
|
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
2013-07-02 18:03:52 +02:00
|
|
|
if (dev_priv->backlight.device) {
|
|
|
|
backlight_device_unregister(dev_priv->backlight.device);
|
|
|
|
dev_priv->backlight.device = NULL;
|
|
|
|
}
|
2011-12-26 20:41:30 +01:00
|
|
|
}
|
|
|
|
#else
|
2013-02-13 09:23:54 +01:00
|
|
|
int intel_panel_setup_backlight(struct drm_connector *connector)
|
2011-12-26 20:41:30 +01:00
|
|
|
{
|
2013-02-13 09:23:54 +01:00
|
|
|
intel_panel_init_backlight(connector->dev);
|
2011-12-26 20:41:30 +01:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void intel_panel_destroy_backlight(struct drm_device *dev)
|
|
|
|
{
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
#endif
|
2013-02-13 09:23:54 +01:00
|
|
|
|
|
|
|
int intel_panel_init(struct intel_panel *panel,
|
|
|
|
struct drm_display_mode *fixed_mode)
|
|
|
|
{
|
|
|
|
panel->fixed_mode = fixed_mode;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void intel_panel_fini(struct intel_panel *panel)
|
|
|
|
{
|
|
|
|
struct intel_connector *intel_connector =
|
|
|
|
container_of(panel, struct intel_connector, panel);
|
|
|
|
|
|
|
|
if (panel->fixed_mode)
|
|
|
|
drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
|
|
|
|
}
|