(* BSD 2-Clause License Copyright (c) 2019-2020, Anton Krotov All rights reserved. *) MODULE MSP430; IMPORT SYSTEM; CONST iv = 0FFC0H; bsl = iv - 2; sp = bsl - 2; empty_proc = sp - 2; free_size = empty_proc - 2; free_adr = free_size - 2; bits = free_adr - 272; bits_offs = bits - 32; types = bits_offs - 2; ram = 200H; trap = ram; int = trap + 2; GIE* = {3}; CPUOFF* = {4}; OSCOFF* = {5}; SCG0* = {6}; SCG1* = {7}; TYPE TInterrupt* = RECORD priority*: INTEGER; sr*: SET; pc*: INTEGER END; TTrapProc* = PROCEDURE (modNum, modName, err, line: INTEGER); TIntProc* = PROCEDURE (priority: INTEGER; interrupt: TInterrupt); PROCEDURE SetTrapProc* (TrapProc: TTrapProc); BEGIN SYSTEM.PUT(trap, TrapProc) END SetTrapProc; PROCEDURE SetIntProc* (IntProc: TIntProc); BEGIN SYSTEM.PUT(int, IntProc) END SetIntProc; PROCEDURE SetIntPC* (interrupt: TInterrupt; NewPC: INTEGER); BEGIN SYSTEM.PUT(SYSTEM.ADR(interrupt.pc), NewPC) END SetIntPC; PROCEDURE SetIntSR* (interrupt: TInterrupt; NewSR: SET); BEGIN SYSTEM.PUT(SYSTEM.ADR(interrupt.sr), NewSR) END SetIntSR; PROCEDURE [code] DInt* 0C232H; (* BIC #8, SR *) PROCEDURE [code] EInt* 0D232H; (* BIS #8, SR *) PROCEDURE [code] CpuOff* 0D032H, 16; (* BIS #16, SR *) PROCEDURE [code] Halt* 4032H, 0F0H; (* MOV CPUOFF+OSCOFF+SCG0+SCG1, SR *) PROCEDURE [code] Restart* 4302H, (* MOV #0, SR *) 4210H, 0FFFEH; (* MOV 0FFFEH(SR), PC *) PROCEDURE [code] SetSR* (bits: SET) 0D112H, 2; (* BIS 2(SP), SR *) PROCEDURE [code] ClrSR* (bits: SET) 0C112H, 2; (* BIC 2(SP), SR *) PROCEDURE GetFreeFlash* (VAR address, size: INTEGER); BEGIN SYSTEM.GET(free_adr, address); SYSTEM.GET(free_size, size) END GetFreeFlash; PROCEDURE [code] Delay* (n: INTEGER) 4035H, 124, (* MOV #124, R5 *) (* L2: *) 4114H, 2, (* MOV 2(SP), R4 *) 8324H, (* SUB #2, R4 *) (* L1: *) 4303H, (* NOP *) 4303H, (* NOP *) 4303H, (* NOP *) 4303H, (* NOP *) 4303H, (* NOP *) 8314H, (* SUB #1, R4 *) 3800H - 7, (* JGE L1 *) 8315H, (* SUB #1, R5 *) 3800H - 12; (* JGE L2 *) END MSP430.