forked from KolibriOS/kolibrios
245 lines
8.5 KiB
C
245 lines
8.5 KiB
C
/*
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* Copyright 2013 Advanced Micro Devices, Inc.
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* Copyright 2014 Rafał Miłecki
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <linux/hdmi.h>
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#include <drm/drmP.h>
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#include "radeon.h"
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#include "radeon_asic.h"
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#include "r600d.h"
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static void dce3_2_afmt_write_speaker_allocation(struct drm_encoder *encoder)
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{
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struct radeon_device *rdev = encoder->dev->dev_private;
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struct drm_connector *connector;
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struct radeon_connector *radeon_connector = NULL;
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u32 tmp;
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u8 *sadb = NULL;
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int sad_count;
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list_for_each_entry(connector, &encoder->dev->mode_config.connector_list, head) {
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if (connector->encoder == encoder) {
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radeon_connector = to_radeon_connector(connector);
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break;
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}
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}
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if (!radeon_connector) {
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DRM_ERROR("Couldn't find encoder's connector\n");
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return;
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}
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sad_count = drm_edid_to_speaker_allocation(radeon_connector->edid, &sadb);
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if (sad_count < 0) {
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DRM_DEBUG("Couldn't read Speaker Allocation Data Block: %d\n", sad_count);
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sad_count = 0;
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}
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/* program the speaker allocation */
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tmp = RREG32(AZ_F0_CODEC_PIN0_CONTROL_CHANNEL_SPEAKER);
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tmp &= ~(DP_CONNECTION | SPEAKER_ALLOCATION_MASK);
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/* set HDMI mode */
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tmp |= HDMI_CONNECTION;
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if (sad_count)
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tmp |= SPEAKER_ALLOCATION(sadb[0]);
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else
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tmp |= SPEAKER_ALLOCATION(5); /* stereo */
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WREG32(AZ_F0_CODEC_PIN0_CONTROL_CHANNEL_SPEAKER, tmp);
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kfree(sadb);
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}
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static void dce3_2_afmt_write_sad_regs(struct drm_encoder *encoder)
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{
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struct radeon_device *rdev = encoder->dev->dev_private;
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struct drm_connector *connector;
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struct radeon_connector *radeon_connector = NULL;
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struct cea_sad *sads;
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int i, sad_count;
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static const u16 eld_reg_to_type[][2] = {
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{ AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR0, HDMI_AUDIO_CODING_TYPE_PCM },
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{ AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR1, HDMI_AUDIO_CODING_TYPE_AC3 },
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{ AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR2, HDMI_AUDIO_CODING_TYPE_MPEG1 },
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{ AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR3, HDMI_AUDIO_CODING_TYPE_MP3 },
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{ AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR4, HDMI_AUDIO_CODING_TYPE_MPEG2 },
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{ AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR5, HDMI_AUDIO_CODING_TYPE_AAC_LC },
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{ AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR6, HDMI_AUDIO_CODING_TYPE_DTS },
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{ AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR7, HDMI_AUDIO_CODING_TYPE_ATRAC },
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{ AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR9, HDMI_AUDIO_CODING_TYPE_EAC3 },
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{ AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR10, HDMI_AUDIO_CODING_TYPE_DTS_HD },
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{ AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR11, HDMI_AUDIO_CODING_TYPE_MLP },
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{ AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR13, HDMI_AUDIO_CODING_TYPE_WMA_PRO },
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};
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list_for_each_entry(connector, &encoder->dev->mode_config.connector_list, head) {
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if (connector->encoder == encoder) {
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radeon_connector = to_radeon_connector(connector);
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break;
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}
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}
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if (!radeon_connector) {
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DRM_ERROR("Couldn't find encoder's connector\n");
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return;
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}
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sad_count = drm_edid_to_sad(radeon_connector->edid, &sads);
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if (sad_count < 0) {
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DRM_ERROR("Couldn't read SADs: %d\n", sad_count);
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return;
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}
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BUG_ON(!sads);
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for (i = 0; i < ARRAY_SIZE(eld_reg_to_type); i++) {
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u32 value = 0;
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u8 stereo_freqs = 0;
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int max_channels = -1;
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int j;
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for (j = 0; j < sad_count; j++) {
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struct cea_sad *sad = &sads[j];
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if (sad->format == eld_reg_to_type[i][1]) {
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if (sad->channels > max_channels) {
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value = MAX_CHANNELS(sad->channels) |
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DESCRIPTOR_BYTE_2(sad->byte2) |
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SUPPORTED_FREQUENCIES(sad->freq);
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max_channels = sad->channels;
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}
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if (sad->format == HDMI_AUDIO_CODING_TYPE_PCM)
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stereo_freqs |= sad->freq;
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else
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break;
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}
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}
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value |= SUPPORTED_FREQUENCIES_STEREO(stereo_freqs);
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WREG32(eld_reg_to_type[i][0], value);
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}
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kfree(sads);
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}
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/*
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* update the info frames with the data from the current display mode
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*/
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void dce3_1_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode)
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{
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struct drm_device *dev = encoder->dev;
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struct radeon_device *rdev = dev->dev_private;
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struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
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struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
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u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AVI_INFOFRAME_SIZE];
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struct hdmi_avi_infoframe frame;
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uint32_t offset;
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ssize_t err;
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if (!dig || !dig->afmt)
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return;
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/* Silent, r600_hdmi_enable will raise WARN for us */
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if (!dig->afmt->enabled)
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return;
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offset = dig->afmt->offset;
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/* disable audio prior to setting up hw */
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dig->afmt->pin = r600_audio_get_pin(rdev);
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r600_audio_enable(rdev, dig->afmt->pin, 0);
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r600_audio_set_dto(encoder, mode->clock);
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WREG32(HDMI0_VBI_PACKET_CONTROL + offset,
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HDMI0_NULL_SEND); /* send null packets when required */
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WREG32(HDMI0_AUDIO_CRC_CONTROL + offset, 0x1000);
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if (ASIC_IS_DCE32(rdev)) {
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WREG32(HDMI0_AUDIO_PACKET_CONTROL + offset,
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HDMI0_AUDIO_DELAY_EN(1) | /* default audio delay */
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HDMI0_AUDIO_PACKETS_PER_LINE(3)); /* should be suffient for all audio modes and small enough for all hblanks */
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WREG32(AFMT_AUDIO_PACKET_CONTROL + offset,
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AFMT_AUDIO_SAMPLE_SEND | /* send audio packets */
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AFMT_60958_CS_UPDATE); /* allow 60958 channel status fields to be updated */
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} else {
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WREG32(HDMI0_AUDIO_PACKET_CONTROL + offset,
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HDMI0_AUDIO_SAMPLE_SEND | /* send audio packets */
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HDMI0_AUDIO_DELAY_EN(1) | /* default audio delay */
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HDMI0_AUDIO_PACKETS_PER_LINE(3) | /* should be suffient for all audio modes and small enough for all hblanks */
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HDMI0_60958_CS_UPDATE); /* allow 60958 channel status fields to be updated */
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}
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if (ASIC_IS_DCE32(rdev)) {
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dce3_2_afmt_write_speaker_allocation(encoder);
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dce3_2_afmt_write_sad_regs(encoder);
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}
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WREG32(HDMI0_ACR_PACKET_CONTROL + offset,
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HDMI0_ACR_SOURCE | /* select SW CTS value - XXX verify that hw CTS works on all families */
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HDMI0_ACR_AUTO_SEND); /* allow hw to sent ACR packets when required */
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WREG32(HDMI0_VBI_PACKET_CONTROL + offset,
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HDMI0_NULL_SEND | /* send null packets when required */
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HDMI0_GC_SEND | /* send general control packets */
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HDMI0_GC_CONT); /* send general control packets every frame */
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/* TODO: HDMI0_AUDIO_INFO_UPDATE */
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WREG32(HDMI0_INFOFRAME_CONTROL0 + offset,
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HDMI0_AVI_INFO_SEND | /* enable AVI info frames */
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HDMI0_AVI_INFO_CONT | /* send AVI info frames every frame/field */
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HDMI0_AUDIO_INFO_SEND | /* enable audio info frames (frames won't be set until audio is enabled) */
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HDMI0_AUDIO_INFO_CONT); /* send audio info frames every frame/field */
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WREG32(HDMI0_INFOFRAME_CONTROL1 + offset,
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HDMI0_AVI_INFO_LINE(2) | /* anything other than 0 */
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HDMI0_AUDIO_INFO_LINE(2)); /* anything other than 0 */
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WREG32(HDMI0_GC + offset, 0); /* unset HDMI0_GC_AVMUTE */
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err = drm_hdmi_avi_infoframe_from_display_mode(&frame, mode);
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if (err < 0) {
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DRM_ERROR("failed to setup AVI infoframe: %zd\n", err);
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return;
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}
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err = hdmi_avi_infoframe_pack(&frame, buffer, sizeof(buffer));
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if (err < 0) {
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DRM_ERROR("failed to pack AVI infoframe: %zd\n", err);
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return;
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}
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r600_hdmi_update_avi_infoframe(encoder, buffer, sizeof(buffer));
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r600_hdmi_update_ACR(encoder, mode->clock);
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/* it's unknown what these bits do excatly, but it's indeed quite useful for debugging */
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WREG32(HDMI0_RAMP_CONTROL0 + offset, 0x00FFFFFF);
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WREG32(HDMI0_RAMP_CONTROL1 + offset, 0x007FFFFF);
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WREG32(HDMI0_RAMP_CONTROL2 + offset, 0x00000001);
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WREG32(HDMI0_RAMP_CONTROL3 + offset, 0x00000001);
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r600_hdmi_audio_workaround(encoder);
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/* enable audio after to setting up hw */
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r600_audio_enable(rdev, dig->afmt->pin, 0xf);
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}
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