forked from KolibriOS/kolibrios
460 lines
10 KiB
NASM
460 lines
10 KiB
NASM
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; ;;
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;; Copyright (C) KolibriOS team 2004-2007. All rights reserved. ;;
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;; Distributed under terms of the GNU General Public License ;;
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;; ;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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include "../macros.inc"
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include "../proc32.inc"
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include "../const.inc"
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$Revision: 847 $
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sel_tss equ 0x08
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sel_os_code equ 0x10
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sel_os_stack equ 0x18
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sel_app_code equ 0x23
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sel_app_data equ 0x2B
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sel_srv_code equ 0x31
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sel_srv_stack equ 0x39
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sel_code_16 equ 0x70
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format MS COFF
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use32
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public __os_stack
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public _pg_balloc
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public high_code
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public core_init
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public test_cpu
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public cpu_vendor
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public cpu_sign
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public cpu_info
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public cpu_caps
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extrn _parse_mbi
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extrn _16bit_start
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extrn _16bit_end
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extrn _enter_bootscreen
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extrn init_fpu
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extrn init_idt
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extrn _init_mm
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extrn _slab_cache_init
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extrn @init_heap@8
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extrn init_malloc
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extrn _init_core_dll
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extrn _init_threads
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extrn init_mtrr
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extrn system_init
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extrn sysenter_entry
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extrn syscall_entry
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extrn @create_systhread@4
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extrn _sys_pdbr
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extrn _current_thread
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extrn _k_reenter:dword
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extrn scr_mode:dword
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extrn LFBAddress:dword
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extrn LFBSize:dword
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section '.text' code readable align 16
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high_code:
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mov ax, sel_os_stack
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mov dx, sel_app_data
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mov ss, ax
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mov esp, __os_stack
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mov ds, dx
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mov es, dx
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mov fs, dx
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mov gs, dx
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; bt [cpu_caps], CAPS_PGE
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; jnc @F
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; or dword [sys_pgdir-OS_BASE+(OS_BASE shr 20)], PG_GLOBAL
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; mov ebx, cr4
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; or ebx, CR4_PGE
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; mov cr4, ebx
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@@:
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; mov eax, cr3
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; mov cr3, eax ; flush TLB
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mov edx, 0x3fB
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mov eax, 3
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out dx, al
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call test_cpu
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call _parse_mbi
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; mov eax, [_pg_balloc]
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; mov [_copy_pg_balloc], eax
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__core_restart:
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mov esi, _16bit_start
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mov ecx, _16bit_end
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shr ecx, 2
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mov edi, _16BIT_BASE
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cld
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rep movsd
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jmp far sel_code_16:_enter_bootscreen;
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align 16
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core_init:
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cld
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mov ax, sel_os_stack
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mov dx, sel_app_data
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mov ss, ax
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mov esp, __os_stack
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mov ds, dx
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mov es, dx
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mov fs, dx
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mov gs, dx
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mov [tss._ss0], sel_os_stack
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mov [tss._esp0], __os_stack
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mov [tss._esp], __os_stack
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mov [tss._cs], sel_os_code
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mov [tss._ss], sel_os_stack
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mov [tss._ds], sel_app_data
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mov [tss._es], sel_app_data
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mov [tss._fs], sel_app_data
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mov [tss._gs], sel_app_data
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mov [tss._io], 128
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;Add IO access table - bit array of permitted ports
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mov edi, tss._io_map_0
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xor eax, eax
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; not eax
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mov ecx, 8192/4
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rep stosd ; access to 4096*8=65536 ports
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mov ax, sel_tss
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ltr ax
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; -------- Fast System Call init ----------
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; Intel SYSENTER/SYSEXIT (AMD CPU support it too)
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bt [cpu_caps], CAPS_SEP
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jnc .SEnP ; SysEnter not Present
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xor edx, edx
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mov ecx, MSR_SYSENTER_CS
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mov eax, sel_os_code
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wrmsr
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mov ecx, MSR_SYSENTER_ESP
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; mov eax, sysenter_stack ; Check it
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xor eax, eax
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wrmsr
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mov ecx, MSR_SYSENTER_EIP
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mov eax, sysenter_entry
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wrmsr
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.SEnP:
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; AMD SYSCALL/SYSRET
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cmp byte[cpu_vendor], 'A'
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jne .noSYSCALL
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mov eax, 0x80000001
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cpuid
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test edx, 0x800 ; bit_11 - SYSCALL/SYSRET support
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jz .noSYSCALL
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mov ecx, MSR_AMD_EFER
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rdmsr
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or eax, 1 ; bit_0 - System Call Extension (SCE)
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wrmsr
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; Bits of EDX :
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; Bit 31<33>16 During the SYSRET instruction, this field is copied into the CS register
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; and the contents of this field, plus 8, are copied into the SS register.
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; Bit 15<31>0 During the SYSCALL instruction, this field is copied into the CS register
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; and the contents of this field, plus 8, are copied into the SS register.
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mov edx, ((sel_os_code + 16) shl 16) + sel_os_code
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mov eax, syscall_entry
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mov ecx, MSR_AMD_STAR
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wrmsr
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.noSYSCALL:
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call init_fpu
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call init_idt
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call _init_mm
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call init_malloc
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call _slab_cache_init
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mov ecx, 0x80000000
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mov edx, 0x40000000
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call @init_heap@8
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call _init_core_dll
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; call _init_threads
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; SAVE & CLEAR 0-0xffff
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mov dword [_sys_pdbr], eax
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mov dword [_sys_pdbr+4], eax
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movzx eax,word [BOOT_VAR+0x9008] ; screen mode
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mov [scr_mode],eax
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mov eax,[BOOT_VAR+0x9018]
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call map_LFB
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mov eax, cr3
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mov cr3, eax
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jmp system_init
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if 0
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mov ecx, system_init
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call @create_systhread@4
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mov [_current_thread], eax
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mov ebx, [eax+THR.pdir]
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mov ecx, cr3
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cmp ebx, ecx
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je .skip
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mov cr3, ebx
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.skip:
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mov esp, [_current_thread]
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; lea eax, [esp+THR.pl0_stack]
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; mov [tss._esp0], eax
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restart1:
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dec [_k_reenter]
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popad
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add esp, 4 ; skip return adr
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iretd ; continue process
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end if
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align 4
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map_LFB:
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cmp eax, -1
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jne @f
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ret
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@@:
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test [scr_mode], 0100000000000000b
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jnz @f
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mov [BOOT_VAR+0x901c],byte 2
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ret
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@@:
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mov [LFBAddress], eax
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mov [LFBSize], 0x800000
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call init_mtrr
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mov eax, [LFBAddress]
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or eax, PG_LARGE+PG_UW
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mov [_sys_pdbr+(LFB_BASE shr 20)], eax
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add eax, 0x00400000
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mov [_sys_pdbr+4+(LFB_BASE shr 20)], eax
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if SHADOWFB
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mov ecx, 1 shl 11
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call @frame_alloc@4
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or eax, PG_LARGE+PG_UW
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mov [_sys_pdbr+(SHADOWFB shr 20)], eax
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add eax, 0x00400000
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mov [_sys_pdbr+4+(SHADOWFB shr 20)], eax
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end if
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bt [cpu_caps], CAPS_PGE
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jnc @F
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or dword [_sys_pdbr+(LFB_BASE shr 20)], PG_GLOBAL
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@@:
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mov dword [LFBAddress], LFB_BASE
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ret
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align 4
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proc test_cpu
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locals
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cpu_type dd ?
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cpu_id dd ?
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cpu_Intel dd ?
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cpu_AMD dd ?
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endl
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mov [cpu_type], 0
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xor eax, eax
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mov [cpu_caps], eax
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mov [cpu_caps+4], eax
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xor eax, eax
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cpuid
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mov [cpu_vendor], ebx
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mov [cpu_vendor+4], edx
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mov [cpu_vendor+8], ecx
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cmp ebx, dword [intel_str]
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jne .check_AMD
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cmp edx, dword [intel_str+4]
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jne .check_AMD
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cmp ecx, dword [intel_str+8]
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jne .check_AMD
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mov [cpu_Intel], 1
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cmp eax, 1
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jl .end_cpuid
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mov eax, 1
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cpuid
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mov [cpu_sign], eax
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mov [cpu_info], ebx
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mov [cpu_caps], edx
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mov [cpu_caps+4],ecx
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shr eax, 8
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and eax, 0x0f
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ret
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.end_cpuid:
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mov eax, [cpu_type]
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ret
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.check_AMD:
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cmp ebx, dword [AMD_str]
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jne .unknown
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cmp edx, dword [AMD_str+4]
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jne .unknown
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cmp ecx, dword [AMD_str+8]
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jne .unknown
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mov [cpu_AMD], 1
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cmp eax, 1
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jl .unknown
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mov eax, 1
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cpuid
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mov [cpu_sign], eax
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mov [cpu_info], ebx
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mov [cpu_caps], edx
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mov [cpu_caps+4],ecx
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shr eax, 8
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and eax, 0x0f
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ret
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.unknown:
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mov eax, 1
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cpuid
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mov [cpu_sign], eax
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mov [cpu_info], ebx
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mov [cpu_caps], edx
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mov [cpu_caps+4],ecx
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shr eax, 8
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and eax, 0x0f
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ret
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endp
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intel_str db "GenuineIntel",0
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AMD_str db "AuthenticAMD",0
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if 0
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align 4
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init_BIOS32:
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mov edi, 0xE0000
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.pcibios_nxt:
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cmp dword[edi], '_32_' ; "magic" word
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je .BIOS32_found
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.pcibios_nxt2:
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add edi, 0x10
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cmp edi, 0xFFFF0
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je .BIOS32_not_found
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jmp .pcibios_nxt
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.BIOS32_found: ; magic word found, check control summ
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movzx ecx, byte[edi + 9]
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shl ecx, 4
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mov esi, edi
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xor eax, eax
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cld ; paranoia
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@@: lodsb
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add ah, al
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loop @b
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jnz .pcibios_nxt2 ; control summ must be zero
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; BIOS32 service found !
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mov ebp, [edi + 4]
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mov [bios32_entry], ebp
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; check PCI BIOS present
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mov eax, '$PCI'
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xor ebx, ebx
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push cs ; special for 'ret far' from BIOS
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call ebp
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test al, al
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jnz .PCI_BIOS32_not_found
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; <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> PCI BIOS
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add ebx, OS_BASE
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dec ecx
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mov [(pci_code_32-OS_BASE)], cx ;limit 0-15
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mov [(pci_data_32-OS_BASE)], cx ;limit 0-15
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mov [(pci_code_32-OS_BASE)+2], bx ;base 0-15
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mov [(pci_data_32-OS_BASE)+2], bx ;base 0-15
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shr ebx, 16
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mov [(pci_code_32-OS_BASE)+4], bl ;base 16-23
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mov [(pci_data_32-OS_BASE)+4], bl ;base 16-23
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shr ecx, 16
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and cl, 0x0F
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mov ch, bh
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add cx, D32
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mov [(pci_code_32-OS_BASE)+6], cx ;lim 16-19 &
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mov [(pci_data_32-OS_BASE)+6], cx ;base 24-31
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mov [(pci_bios_entry-OS_BASE)], edx
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; jmp .end
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.PCI_BIOS32_not_found:
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; <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> pci_emu_dat
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.BIOS32_not_found:
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.end:
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ret
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end if
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section '.data' data writeable align 16
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_pg_balloc dd LAST_PAGE
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section '.bss' data writeable align 16
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rb 8192-512
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__os_stack rb 512
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;CPUID information
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cpu_vendor rd 3
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cpu_sign rd 1
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cpu_info rd 1
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cpu_caps rd 4
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