2012-01-30 08:06:25 +01:00
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#define iowrite32(v, addr) writel((v), (addr))
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2012-01-25 05:04:03 +01:00
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#include "drmP.h"
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#include "drm.h"
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#include "i915_drm.h"
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#include "i915_drv.h"
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#include "intel_drv.h"
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/mod_devicetable.h>
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#include <errno-base.h>
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#include <linux/pci.h>
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#include <syscall.h>
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2012-01-30 08:06:25 +01:00
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#include "bitmap.h"
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2012-01-25 05:04:03 +01:00
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typedef struct
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{
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kobj_t header;
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uint32_t *data;
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uint32_t hot_x;
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uint32_t hot_y;
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struct list_head list;
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struct drm_i915_gem_object *cobj;
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}cursor_t;
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#define CURSOR_WIDTH 64
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#define CURSOR_HEIGHT 64
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struct tag_display
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{
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int x;
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int y;
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int width;
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int height;
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int bpp;
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int vrefresh;
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int pitch;
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int lfb;
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int supported_modes;
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struct drm_device *ddev;
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struct drm_connector *connector;
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struct drm_crtc *crtc;
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struct list_head cursors;
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cursor_t *cursor;
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int (*init_cursor)(cursor_t*);
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cursor_t* (__stdcall *select_cursor)(cursor_t*);
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void (*show_cursor)(int show);
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void (__stdcall *move_cursor)(cursor_t *cursor, int x, int y);
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void (__stdcall *restore_cursor)(int x, int y);
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void (*disable_mouse)(void);
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};
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static display_t *os_display;
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2012-01-30 08:06:25 +01:00
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u32_t cmd_buffer;
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u32_t cmd_offset;
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2012-01-25 05:04:03 +01:00
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int init_cursor(cursor_t *cursor);
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static cursor_t* __stdcall select_cursor_kms(cursor_t *cursor);
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static void __stdcall move_cursor_kms(cursor_t *cursor, int x, int y);
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void __stdcall restore_cursor(int x, int y)
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{};
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void disable_mouse(void)
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{};
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static int count_connector_modes(struct drm_connector* connector)
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{
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struct drm_display_mode *mode;
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int count = 0;
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list_for_each_entry(mode, &connector->modes, head)
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{
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count++;
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};
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return count;
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};
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int init_display_kms(struct drm_device *dev)
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{
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struct drm_connector *connector;
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struct drm_connector_helper_funcs *connector_funcs;
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struct drm_encoder *encoder;
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struct drm_crtc *crtc = NULL;
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struct drm_framebuffer *fb;
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cursor_t *cursor;
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u32_t ifl;
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ENTER();
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list_for_each_entry(connector, &dev->mode_config.connector_list, head)
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{
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if( connector->status != connector_status_connected)
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continue;
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connector_funcs = connector->helper_private;
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encoder = connector_funcs->best_encoder(connector);
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if( encoder == NULL)
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{
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dbgprintf("CONNECTOR %x ID: %d no active encoders\n",
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connector, connector->base.id);
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continue;
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}
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connector->encoder = encoder;
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dbgprintf("CONNECTOR %x ID: %d status %d encoder %x\n crtc %x\n",
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connector, connector->base.id,
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connector->status, connector->encoder,
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encoder->crtc);
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crtc = encoder->crtc;
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break;
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};
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if(connector == NULL)
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{
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dbgprintf("No active connectors!\n");
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return -1;
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};
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if(crtc == NULL)
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{
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struct drm_crtc *tmp_crtc;
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int crtc_mask = 1;
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list_for_each_entry(tmp_crtc, &dev->mode_config.crtc_list, head)
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{
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if (encoder->possible_crtcs & crtc_mask)
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{
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crtc = tmp_crtc;
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encoder->crtc = crtc;
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break;
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};
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crtc_mask <<= 1;
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};
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};
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if(crtc == NULL)
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{
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dbgprintf("No CRTC for encoder %d\n", encoder->base.id);
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return -1;
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};
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DRM_DEBUG_KMS("[Select CRTC:%d]\n", crtc->base.id);
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os_display = GetDisplay();
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os_display->ddev = dev;
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os_display->connector = connector;
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os_display->crtc = crtc;
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os_display->supported_modes = count_connector_modes(connector);
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ifl = safe_cli();
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{
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struct intel_crtc *intel_crtc = to_intel_crtc(os_display->crtc);
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list_for_each_entry(cursor, &os_display->cursors, list)
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{
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init_cursor(cursor);
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};
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os_display->restore_cursor(0,0);
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os_display->init_cursor = init_cursor;
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os_display->select_cursor = select_cursor_kms;
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os_display->show_cursor = NULL;
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os_display->move_cursor = move_cursor_kms;
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os_display->restore_cursor = restore_cursor;
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os_display->disable_mouse = disable_mouse;
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intel_crtc->cursor_x = os_display->width/2;
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intel_crtc->cursor_y = os_display->height/2;
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select_cursor_kms(os_display->cursor);
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};
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safe_sti(ifl);
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2012-01-30 08:06:25 +01:00
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{
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#define XY_COLOR_BLT ((2<<29)|(0x50<<22)|(0x4))
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#define BLT_WRITE_ALPHA (1<<21)
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#define BLT_WRITE_RGB (1<<20)
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drm_i915_private_t *dev_priv = dev->dev_private;
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struct drm_i915_gem_object *obj;
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struct intel_ring_buffer *ring;
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u32_t br13, cmd, *b;
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int n=0;
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cmd = XY_COLOR_BLT | BLT_WRITE_ALPHA | BLT_WRITE_RGB;
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br13 = os_display->pitch;
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br13 |= 0xF0 << 16;
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br13 |= 3 << 24;
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obj = i915_gem_alloc_object(dev, 4096);
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i915_gem_object_pin(obj, 4096, true);
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cmd_buffer = MapIoMem(obj->pages[0], 4096, PG_SW|PG_NOCACHE);
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cmd_offset = obj->gtt_offset;
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b = (u32_t*)cmd_buffer;
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b[n++] = cmd;
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b[n++] = br13;
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b[n++] = 0; // top, left
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b[n++] = (128 << 16) | 128; // bottom, right
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b[n++] = 0; // dst
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b[n++] = 0x0000FF00;
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b[n++] = MI_BATCH_BUFFER_END;
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if( n & 1)
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b[n++] = MI_NOOP;
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// cmd_buffer = (u32_t)&b[n];
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// i915_gem_object_set_to_gtt_domain(obj, false);
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ring = &dev_priv->ring[BCS];
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ring->dispatch_execbuffer(ring,cmd_offset, n*4);
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};
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2012-01-25 05:04:03 +01:00
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LEAVE();
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return 0;
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};
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bool set_mode(struct drm_device *dev, struct drm_connector *connector,
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videomode_t *reqmode, bool strict)
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{
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struct drm_display_mode *mode = NULL, *tmpmode;
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drm_i915_private_t *dev_priv = dev->dev_private;
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struct drm_fb_helper *fb_helper = &dev_priv->fbdev->helper;
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bool ret = false;
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ENTER();
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dbgprintf("width %d height %d vrefresh %d\n",
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reqmode->width, reqmode->height, reqmode->freq);
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list_for_each_entry(tmpmode, &connector->modes, head)
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{
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if( (drm_mode_width(tmpmode) == reqmode->width) &&
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(drm_mode_height(tmpmode) == reqmode->height) &&
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(drm_mode_vrefresh(tmpmode) == reqmode->freq) )
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{
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mode = tmpmode;
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goto do_set;
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}
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};
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if( (mode == NULL) && (strict == false) )
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{
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list_for_each_entry(tmpmode, &connector->modes, head)
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{
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if( (drm_mode_width(tmpmode) == reqmode->width) &&
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(drm_mode_height(tmpmode) == reqmode->height) )
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{
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mode = tmpmode;
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goto do_set;
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}
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};
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};
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do_set:
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if( mode != NULL )
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{
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struct drm_framebuffer *fb;
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struct drm_encoder *encoder;
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struct drm_crtc *crtc;
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char *con_name;
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char *enc_name;
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encoder = connector->encoder;
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crtc = encoder->crtc;
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con_name = drm_get_connector_name(connector);
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enc_name = drm_get_encoder_name(encoder);
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dbgprintf("set mode %d %d connector %s encoder %s\n",
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reqmode->width, reqmode->height, con_name, enc_name);
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fb = fb_helper->fb;
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fb->width = reqmode->width;
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fb->height = reqmode->height;
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fb->pitch = ALIGN(reqmode->width * 4, 64);
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fb->bits_per_pixel = 32;
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fb->depth == 24;
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crtc->fb = fb;
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crtc->enabled = true;
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os_display->crtc = crtc;
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ret = drm_crtc_helper_set_mode(crtc, mode, 0, 0, fb);
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// select_cursor_kms(rdisplay->cursor);
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// radeon_show_cursor_kms(crtc);
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if (ret == true)
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{
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os_display->width = fb->width;
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os_display->height = fb->height;
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os_display->pitch = fb->pitch;
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os_display->vrefresh = drm_mode_vrefresh(mode);
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sysSetScreen(fb->width, fb->height, fb->pitch);
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dbgprintf("new mode %d x %d pitch %d\n",
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fb->width, fb->height, fb->pitch);
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}
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else
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DRM_ERROR("failed to set mode %d_%d on crtc %p\n",
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fb->width, fb->height, crtc);
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}
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LEAVE();
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return ret;
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};
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int get_videomodes(videomode_t *mode, int *count)
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{
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int err = -1;
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ENTER();
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dbgprintf("mode %x count %d\n", mode, *count);
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if( *count == 0 )
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{
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*count = os_display->supported_modes;
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err = 0;
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}
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else if( mode != NULL )
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{
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struct drm_display_mode *drmmode;
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int i = 0;
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if( *count > os_display->supported_modes)
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*count = os_display->supported_modes;
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list_for_each_entry(drmmode, &os_display->connector->modes, head)
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{
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if( i < *count)
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{
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mode->width = drm_mode_width(drmmode);
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mode->height = drm_mode_height(drmmode);
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mode->bpp = 32;
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mode->freq = drm_mode_vrefresh(drmmode);
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i++;
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mode++;
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}
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else break;
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};
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*count = i;
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err = 0;
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};
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LEAVE();
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return err;
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};
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int set_user_mode(videomode_t *mode)
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{
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int err = -1;
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ENTER();
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dbgprintf("width %d height %d vrefresh %d\n",
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mode->width, mode->height, mode->freq);
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if( (mode->width != 0) &&
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(mode->height != 0) &&
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(mode->freq != 0 ) &&
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( (mode->width != os_display->width) ||
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(mode->height != os_display->height) ||
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(mode->freq != os_display->vrefresh) ) )
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{
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if( set_mode(os_display->ddev, os_display->connector, mode, true) )
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|
|
|
err = 0;
|
|
|
|
};
|
|
|
|
|
|
|
|
LEAVE();
|
|
|
|
return err;
|
|
|
|
};
|
|
|
|
|
|
|
|
void __attribute__((regparm(1))) destroy_cursor(cursor_t *cursor)
|
|
|
|
{
|
|
|
|
list_del(&cursor->list);
|
|
|
|
// radeon_bo_unpin(cursor->robj);
|
|
|
|
// KernelFree(cursor->data);
|
|
|
|
__DestroyObject(cursor);
|
|
|
|
};
|
|
|
|
|
|
|
|
int init_cursor(cursor_t *cursor)
|
|
|
|
{
|
|
|
|
struct drm_i915_private *dev_priv = os_display->ddev->dev_private;
|
|
|
|
struct drm_i915_gem_object *obj;
|
|
|
|
uint32_t *bits;
|
|
|
|
uint32_t *src;
|
|
|
|
|
|
|
|
int i,j;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ENTER();
|
|
|
|
|
|
|
|
if (dev_priv->info->cursor_needs_physical)
|
|
|
|
{
|
|
|
|
bits = (uint32_t*)KernelAlloc(CURSOR_WIDTH*CURSOR_HEIGHT*4);
|
|
|
|
if (unlikely(bits == NULL))
|
|
|
|
return ENOMEM;
|
|
|
|
cursor->cobj = (struct drm_i915_gem_object *)GetPgAddr(bits);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
obj = i915_gem_alloc_object(os_display->ddev, CURSOR_WIDTH*CURSOR_HEIGHT*4);
|
|
|
|
if (unlikely(obj == NULL))
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
ret = i915_gem_object_pin(obj, CURSOR_WIDTH*CURSOR_HEIGHT*4, true);
|
|
|
|
if (ret) {
|
|
|
|
// drm_gem_object_unreference(&obj->base);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* You don't need to worry about fragmentation issues.
|
|
|
|
* GTT space is continuous. I guarantee it. */
|
|
|
|
|
|
|
|
bits = (u32*)MapIoMem(get_bus_addr() + obj->gtt_offset,
|
|
|
|
CURSOR_WIDTH*CURSOR_HEIGHT*4, PG_SW);
|
|
|
|
|
|
|
|
if (unlikely(bits == NULL))
|
|
|
|
{
|
|
|
|
// i915_gem_object_unpin(obj);
|
|
|
|
// drm_gem_object_unreference(&obj->base);
|
|
|
|
return -ENOMEM;
|
|
|
|
};
|
|
|
|
cursor->cobj = obj;
|
|
|
|
};
|
|
|
|
|
|
|
|
src = cursor->data;
|
|
|
|
|
|
|
|
for(i = 0; i < 32; i++)
|
|
|
|
{
|
|
|
|
for(j = 0; j < 32; j++)
|
|
|
|
*bits++ = *src++;
|
|
|
|
for(j = 32; j < CURSOR_WIDTH; j++)
|
|
|
|
*bits++ = 0;
|
|
|
|
}
|
|
|
|
for(i = 0; i < CURSOR_WIDTH*(CURSOR_HEIGHT-32); i++)
|
|
|
|
*bits++ = 0;
|
|
|
|
|
|
|
|
// release old cursor
|
|
|
|
|
2012-01-30 08:06:25 +01:00
|
|
|
KernelFree(cursor->data);
|
2012-01-25 05:04:03 +01:00
|
|
|
|
|
|
|
cursor->data = bits;
|
|
|
|
|
|
|
|
cursor->header.destroy = destroy_cursor;
|
|
|
|
LEAVE();
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base)
|
|
|
|
{
|
|
|
|
struct drm_device *dev = crtc->dev;
|
|
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
|
|
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
|
|
|
|
int pipe = intel_crtc->pipe;
|
|
|
|
bool visible = base != 0;
|
|
|
|
|
|
|
|
if (intel_crtc->cursor_visible != visible) {
|
|
|
|
uint32_t cntl = I915_READ(CURCNTR(pipe));
|
|
|
|
if (base) {
|
|
|
|
cntl &= ~(CURSOR_MODE | MCURSOR_PIPE_SELECT);
|
|
|
|
cntl |= CURSOR_MODE_64_ARGB_AX | MCURSOR_GAMMA_ENABLE;
|
|
|
|
cntl |= pipe << 28; /* Connect to correct pipe */
|
|
|
|
} else {
|
|
|
|
cntl &= ~(CURSOR_MODE | MCURSOR_GAMMA_ENABLE);
|
|
|
|
cntl |= CURSOR_MODE_DISABLE;
|
|
|
|
}
|
|
|
|
I915_WRITE(CURCNTR(pipe), cntl);
|
|
|
|
|
|
|
|
intel_crtc->cursor_visible = visible;
|
|
|
|
}
|
|
|
|
/* and commit changes on next vblank */
|
|
|
|
I915_WRITE(CURBASE(pipe), base);
|
|
|
|
}
|
|
|
|
|
|
|
|
void __stdcall move_cursor_kms(cursor_t *cursor, int x, int y)
|
|
|
|
{
|
|
|
|
struct drm_i915_private *dev_priv = os_display->ddev->dev_private;
|
|
|
|
struct intel_crtc *intel_crtc = to_intel_crtc(os_display->crtc);
|
|
|
|
u32 base, pos;
|
|
|
|
bool visible;
|
|
|
|
|
|
|
|
int pipe = intel_crtc->pipe;
|
|
|
|
|
|
|
|
intel_crtc->cursor_x = x;
|
|
|
|
intel_crtc->cursor_y = y;
|
|
|
|
|
|
|
|
x = x - cursor->hot_x;
|
|
|
|
y = y - cursor->hot_y;
|
|
|
|
|
|
|
|
|
|
|
|
pos = 0;
|
|
|
|
|
|
|
|
base = intel_crtc->cursor_addr;
|
|
|
|
if (x >= os_display->width)
|
|
|
|
base = 0;
|
|
|
|
|
|
|
|
if (y >= os_display->height)
|
|
|
|
base = 0;
|
|
|
|
|
|
|
|
if (x < 0)
|
|
|
|
{
|
|
|
|
if (x + intel_crtc->cursor_width < 0)
|
|
|
|
base = 0;
|
|
|
|
|
|
|
|
pos |= CURSOR_POS_SIGN << CURSOR_X_SHIFT;
|
|
|
|
x = -x;
|
|
|
|
}
|
|
|
|
pos |= x << CURSOR_X_SHIFT;
|
|
|
|
|
|
|
|
if (y < 0)
|
|
|
|
{
|
|
|
|
if (y + intel_crtc->cursor_height < 0)
|
|
|
|
base = 0;
|
|
|
|
|
|
|
|
pos |= CURSOR_POS_SIGN << CURSOR_Y_SHIFT;
|
|
|
|
y = -y;
|
|
|
|
}
|
|
|
|
pos |= y << CURSOR_Y_SHIFT;
|
|
|
|
|
|
|
|
visible = base != 0;
|
|
|
|
if (!visible && !intel_crtc->cursor_visible)
|
|
|
|
return;
|
|
|
|
|
|
|
|
I915_WRITE(CURPOS(pipe), pos);
|
|
|
|
// if (IS_845G(dev) || IS_I865G(dev))
|
|
|
|
// i845_update_cursor(crtc, base);
|
|
|
|
// else
|
|
|
|
i9xx_update_cursor(os_display->crtc, base);
|
|
|
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
cursor_t* __stdcall select_cursor_kms(cursor_t *cursor)
|
|
|
|
{
|
|
|
|
struct drm_i915_private *dev_priv = os_display->ddev->dev_private;
|
|
|
|
struct intel_crtc *intel_crtc = to_intel_crtc(os_display->crtc);
|
|
|
|
cursor_t *old;
|
|
|
|
|
|
|
|
old = os_display->cursor;
|
|
|
|
os_display->cursor = cursor;
|
|
|
|
|
|
|
|
if (!dev_priv->info->cursor_needs_physical)
|
|
|
|
intel_crtc->cursor_addr = cursor->cobj->gtt_offset;
|
|
|
|
else
|
|
|
|
intel_crtc->cursor_addr = cursor->cobj;
|
|
|
|
|
|
|
|
intel_crtc->cursor_width = 32;
|
|
|
|
intel_crtc->cursor_height = 32;
|
|
|
|
|
|
|
|
move_cursor_kms(cursor, intel_crtc->cursor_x, intel_crtc->cursor_y);
|
|
|
|
return old;
|
|
|
|
};
|
|
|
|
|
2012-01-30 08:06:25 +01:00
|
|
|
extern struct drm_device *main_device;
|
|
|
|
|
|
|
|
#define XY_SRC_COPY_BLT_CMD ((2<<29)|(0x53<<22)|6)
|
|
|
|
|
|
|
|
int video_blit(uint64_t src_offset, int x, int y,
|
|
|
|
int w, int h, int pitch)
|
2012-01-25 05:04:03 +01:00
|
|
|
{
|
|
|
|
|
2012-01-30 08:06:25 +01:00
|
|
|
drm_i915_private_t *dev_priv = main_device->dev_private;
|
|
|
|
struct intel_ring_buffer *ring;
|
2012-01-25 05:04:03 +01:00
|
|
|
|
2012-01-30 08:06:25 +01:00
|
|
|
u32_t br13, cmd, *b;
|
|
|
|
u32_t offset;
|
2012-01-25 05:04:03 +01:00
|
|
|
|
2012-01-30 08:06:25 +01:00
|
|
|
int n=0;
|
2012-01-25 05:04:03 +01:00
|
|
|
|
2012-01-30 08:06:25 +01:00
|
|
|
// if( cmd_buffer & 0xF80 )
|
|
|
|
// cmd_buffer&= 0xFFFFF000;
|
2012-01-25 05:04:03 +01:00
|
|
|
|
2012-01-30 08:06:25 +01:00
|
|
|
// b = (u32_t*)ALIGN(cmd_buffer,16);
|
2012-01-25 05:04:03 +01:00
|
|
|
|
2012-01-30 08:06:25 +01:00
|
|
|
// offset = cmd_offset + ((u32_t)b & 0xFFF);
|
2012-01-25 05:04:03 +01:00
|
|
|
|
2012-01-30 08:06:25 +01:00
|
|
|
b = cmd_buffer;
|
2012-01-25 05:04:03 +01:00
|
|
|
|
2012-01-30 08:06:25 +01:00
|
|
|
cmd = XY_SRC_COPY_BLT_CMD | BLT_WRITE_RGB;
|
|
|
|
br13 = os_display->pitch;
|
|
|
|
br13 |= 0xCC << 16;
|
|
|
|
br13 |= 3 << 24;
|
2012-01-25 05:04:03 +01:00
|
|
|
|
2012-01-30 08:06:25 +01:00
|
|
|
b[n++] = cmd;
|
|
|
|
b[n++] = br13;
|
|
|
|
b[n++] = (y << 16) | x;
|
|
|
|
b[n++] = ( (y+h) << 16) | (x+w); // bottom, right
|
|
|
|
b[n++] = 0; // dst_offset
|
|
|
|
b[n++] = 0; //src_top|src_left
|
2012-01-25 05:04:03 +01:00
|
|
|
|
2012-01-30 08:06:25 +01:00
|
|
|
b[n++] = pitch;
|
|
|
|
b[n++] = (u32_t)src_offset;
|
|
|
|
|
|
|
|
b[n++] = MI_BATCH_BUFFER_END;
|
|
|
|
if( n & 1)
|
|
|
|
b[n++] = MI_NOOP;
|
|
|
|
|
|
|
|
// i915_gem_object_set_to_gtt_domain(obj, false);
|
|
|
|
|
|
|
|
ring = &dev_priv->ring[BCS];
|
|
|
|
ring->dispatch_execbuffer(ring, cmd_offset, n*4);
|
|
|
|
|
|
|
|
intel_ring_begin(ring, 4);
|
|
|
|
// if (ret)
|
|
|
|
// return ret;
|
|
|
|
|
|
|
|
// cmd = MI_FLUSH_DW;
|
|
|
|
// if (invalidate & I915_GEM_GPU_DOMAINS)
|
|
|
|
// cmd |= MI_INVALIDATE_TLB | MI_INVALIDATE_BSD;
|
|
|
|
intel_ring_emit(ring, MI_FLUSH_DW);
|
|
|
|
intel_ring_emit(ring, 0);
|
|
|
|
intel_ring_emit(ring, 0);
|
|
|
|
intel_ring_emit(ring, MI_NOOP);
|
|
|
|
intel_ring_advance(ring);
|
|
|
|
|
|
|
|
|
|
|
|
fail:
|
|
|
|
return -1;
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
int blit_video(u32 hbitmap, int dst_x, int dst_y,
|
|
|
|
int src_x, int src_y, u32 w, u32 h)
|
|
|
|
{
|
|
|
|
drm_i915_private_t *dev_priv = main_device->dev_private;
|
|
|
|
struct intel_ring_buffer *ring;
|
2012-01-25 05:04:03 +01:00
|
|
|
|
2012-01-30 08:06:25 +01:00
|
|
|
bitmap_t *bitmap;
|
|
|
|
u32_t br13, cmd, *b;
|
|
|
|
u32_t offset;
|
2012-01-25 05:04:03 +01:00
|
|
|
|
2012-01-30 08:06:25 +01:00
|
|
|
int n=0;
|
|
|
|
|
|
|
|
if(unlikely(hbitmap==0))
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
bitmap = hman_get_data(&bm_man, hbitmap);
|
|
|
|
|
|
|
|
if(unlikely(bitmap==NULL))
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
// if( cmd_buffer & 0xF80 )
|
|
|
|
// cmd_buffer&= 0xFFFFF000;
|
|
|
|
|
|
|
|
// b = (u32_t*)ALIGN(cmd_buffer,16);
|
|
|
|
|
|
|
|
// offset = cmd_offset + ((u32_t)b & 0xFFF);
|
|
|
|
|
|
|
|
b = cmd_buffer;
|
|
|
|
|
|
|
|
cmd = XY_SRC_COPY_BLT_CMD | BLT_WRITE_RGB;
|
|
|
|
br13 = os_display->pitch;
|
|
|
|
br13 |= 0xCC << 16;
|
|
|
|
br13 |= 3 << 24;
|
|
|
|
|
|
|
|
b[n++] = cmd;
|
|
|
|
b[n++] = br13;
|
|
|
|
b[n++] = (dst_y << 16) | dst_x;
|
|
|
|
b[n++] = ( (dst_y+h) << 16) | (dst_x+w); // bottom, right
|
|
|
|
b[n++] = 0; // dst_offset
|
|
|
|
b[n++] = (src_y << 16) | src_x;
|
|
|
|
|
|
|
|
b[n++] = bitmap->pitch;
|
|
|
|
b[n++] = bitmap->gaddr;
|
|
|
|
|
|
|
|
b[n++] = MI_BATCH_BUFFER_END;
|
|
|
|
if( n & 1)
|
|
|
|
b[n++] = MI_NOOP;
|
|
|
|
|
|
|
|
// i915_gem_object_set_to_gtt_domain(obj, false);
|
|
|
|
|
|
|
|
ring = &dev_priv->ring[BCS];
|
|
|
|
ring->dispatch_execbuffer(ring, cmd_offset, n*4);
|
|
|
|
|
|
|
|
intel_ring_begin(ring, 4);
|
|
|
|
// if (ret)
|
|
|
|
// return ret;
|
|
|
|
|
|
|
|
intel_ring_emit(ring, MI_FLUSH_DW);
|
|
|
|
intel_ring_emit(ring, 0);
|
|
|
|
intel_ring_emit(ring, 0);
|
|
|
|
intel_ring_emit(ring, MI_NOOP);
|
|
|
|
intel_ring_advance(ring);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
fail:
|
|
|
|
return -1;
|
|
|
|
};
|