I uploaded the wrong file in previous revision

reverted the file + uploaded right file this time

git-svn-id: svn://kolibrios.org@1554 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
hidnplayr 2010-08-03 15:36:54 +00:00
parent 6d55f4e33d
commit 1dd3566e02
2 changed files with 1258 additions and 30 deletions

File diff suppressed because it is too large Load Diff

View File

@ -132,39 +132,16 @@ macro make_bus_master bus, dev {
movzx ecx, bus
movzx edx, dev
stdcall PciRead16, ecx ,edx, PCI_REG_COMMAND
stdcall PciRead32, ecx ,edx, PCI_REG_COMMAND
or al, PCI_BIT_MASTER or PCI_BIT_PIO
and al, not PCI_BIT_MMIO
or al, PCI_BIT_MASTER ;or PCI_BIT_PIO
; and al, not PCI_BIT_MMIO
stdcall PciWrite32, ecx, edx, PCI_REG_COMMAND, eax
; or al, PCI_BIT_MASTER or PCI_BIT_MMIO
; and al, not PCI_BIT_PIO
stdcall PciWrite16, ecx, edx, PCI_REG_COMMAND, eax
;; TODO: try to switch to PIO, and check if PIO works or not..
}
; .Latency:
;*******Get current latency setting************************
; mov al, 1 ;read a byte
; mov bh, [pci_dev]
; mov ah, [pci_bus]
; mov bl, 0x0D ;from Lantency Timer Register
; call pci_read_reg
;******see if its aat least 64 clocks********
; cmp ax,64
; jge PCNET_adjust_pci_device_Done
;******Set latency to 32 clocks*******
; mov cx, 64 ;value to write
; mov bh, [pci_dev]
; mov al, 1 ;write a byte
; mov ah, [pci_bus]
; mov bl, 0x0D ;to Lantency Timer Register
; call pci_write_reg
;******Check latency setting***********
; .Done:
struc IOCTL {
.handle dd ?
.io_code dd ?
@ -214,8 +191,6 @@ macro NET_DEVICE {
.packets_tx dd ? ;
.packets_rx dd ? ;
; .hwcksum dd ?
.end:
}