sync with main kernel: rotationless sysfn62 call

git-svn-id: svn://kolibrios.org@1687 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
Artem Jerdev (art_zh) 2010-11-05 10:31:58 +00:00
parent 31b1595dc8
commit 309387e070
4 changed files with 118 additions and 141 deletions

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@ -8,6 +8,7 @@
;; ;;
;; 32 bit PCI driver code ;;
;; ;;
;; Version 0.4A November 4th, 2010 ;;
;; Version 0.4 February 2nd, 2010 ;;
;; Version 0.3 April 9, 2007 ;;
;; Version 0.2 December 21st, 2002 ;;
@ -32,81 +33,87 @@ $Revision$
; Description
; entry point for system PCI calls
;***************************************************************************
mmio_pci_addr dw 0x400 ; default PCI device bdf-address
align 4
mmio_pci_addr dw 0x100 ; default PCI device bdf-address
dw 0
iglobal
align 4
f62call:
dd pci_fn_0
dd pci_fn_1
dd pci_fn_2
dd pci_service_not_supported ;3
dd pci_read_reg ;4 byte
dd pci_read_reg ;5 word
dd pci_read_reg ;6 dword
dd pci_service_not_supported ;7
dd pci_write_reg ;8 byte
dd pci_write_reg ;9 word
dd pci_write_reg ;10 dword
dd pci_mmio_init ;11
dd pci_mmio_map ;12
dd pci_mmio_unmap ;13
endg
align 4
pci_api:
;cross
mov eax, ebx
mov ebx, ecx
mov ecx, edx
cmp [pci_access_enabled],1
jne no_pci_access_for_applications
jne pci_service_not_supported
or al,al
jnz pci_fn_1
; PCI function 0: get pci version (AH.AL)
movzx edx, al
cmp al, 13
ja pci_service_not_supported
call dword [f62call+edx*4]
mov dword [esp+32],eax
ret
align 4
pci_api_drv:
cmp [pci_access_enabled],1
jne .fail
cmp eax, 2
ja .fail
jmp dword [f62call+eax*4]
.fail:
or eax,-1
ret
;; ============================================
pci_fn_0: ; PCI function 0: get pci version (AH.AL)
movzx eax,word [BOOT_VAR+0x9022]
ret
pci_fn_1:
cmp al,1
jnz pci_fn_2
; PCI function 1: get last bus in AL
pci_fn_1: ; PCI function 1: get last bus in AL
mov al,[BOOT_VAR+0x9021]
ret
pci_fn_2:
cmp al,2
jne pci_fn_3
; PCI function 2: get pci access mechanism
pci_fn_2: ; PCI function 2: get pci access mechanism
mov al,[BOOT_VAR+0x9020]
ret
pci_fn_3:
cmp al,4
jz pci_read_reg ;byte
cmp al,5
jz pci_read_reg ;word
cmp al,6
jz pci_read_reg ;dword
cmp al,8
jz pci_write_reg ;byte
cmp al,9
jz pci_write_reg ;word
cmp al,10
jz pci_write_reg ;dword
cmp al,11 ; user-level MMIO functions
jz pci_mmio_init
cmp al,12
jz pci_mmio_map
cmp al,13
jz pci_mmio_unmap
no_pci_access_for_applications:
pci_service_not_supported:
or eax,-1
mov dword [esp+32],eax
ret
;***************************************************************************
; Function
; pci_make_config_cmd
;
; Description
; creates a command dword for use with the PCI bus
; bus # in ah
; device+func in bh (dddddfff)
; register in bl
;
; (for backward compatibility only)
; command dword returned in eax ( 10000000 bbbbbbbb dddddfff rrrrrr00 )
;***************************************************************************
align 4
pci_make_config_cmd:
shl eax,8 ; move bus to bits 16-23
mov ax,bx ; combine all
@ -114,6 +121,7 @@ pci_make_config_cmd:
or eax,0x80000000
ret
;***************************************************************************
; Function
; pci_read_reg:
@ -126,8 +134,30 @@ pci_make_config_cmd:
;***************************************************************************
align 4
pci_read_reg:
; push edx
; xor edx, edx
; mov dh, ah ; bus
; mov dl, bh ; dev+fn
; shl edx, 12
; mov dl, bl ; reg
; add edx, PCIe_CONFIG_SPACE
;
; and al, 2
; jz @f
; mov eax, dword[edx]
; pop edx
; ret
;@@:
; and al, 1
; jz @f
; mov ax, word[edx]
; pop edx
; ret
;@@:
; mov al, byte[edx]
; pop edx
; ret
push esi ; save register size into ESI
mov esi,eax
and esi,3
@ -174,10 +204,6 @@ pci_fin_read1:
pop esi
ret
pci_read_reg_err:
xor eax,eax
dec eax
ret
;***************************************************************************
@ -193,8 +219,29 @@ pci_read_reg_err:
;***************************************************************************
align 4
pci_write_reg:
; push edx
; xor edx, edx
; mov dh, ah ; bus
; mov dl, bh ; dev+fn
; shl edx, 12
; mov dl, bl ; reg
; add edx, PCIe_CONFIG_SPACE
;
; test al, 2
; jz @f
; mov dword[edx], ecx
; ret
;@@:
; test al, 1
; jz @f
; mov word[edx], cx
; pop edx
; ret
;@@:
; mov byte[edx], cl
; pop edx
; ret
push esi ; save register size into ESI
mov esi,eax
and esi,3
@ -233,20 +280,15 @@ pci_write_dword1:
out dx,eax
jmp pci_fin_write1
pci_fin_write1:
; restore configuration control
pop eax
mov dl,0xf8
out dx,eax
xor eax,eax
pop esi
ret
pci_write_reg_err:
xor eax,eax
dec eax
ret
;***************************************************************************
; Function
; pci_mmio_init
@ -322,10 +364,11 @@ pci_mmio_map:
shl bl, 1
shl bl, 1
add bl, 0x10 ; now bl = BAR offset in PCI config. space
mov ax, [mmio_pci_addr]
mov bh, al ; bh = dddddfff
mov al, 2 ; al : DW to read
call pci_read_reg
mov eax, dword[mmio_pci_addr]
shl eax, 12
mov al, bl ; BAR offset
add eax, PCIe_CONFIG_SPACE
mov eax, [eax] ; read the BAR
or eax, eax
jnz @f
mov eax,-3 ; empty I/O space

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@ -337,26 +337,6 @@ endp
align 4
proc init_LFB
; cmp dword [LFBAddress], -1
; jne @f
;
; mov esi, boot_framebuf
; call boot_log
;
; mov [BOOT_VAR+0x901c],byte 2
; stdcall alloc_pages, (0x280000 / 4096)
;
; push eax
; call alloc_page
; stdcall map_page_table, LFB_BASE, eax
; pop eax
; or eax, PG_UW
; mov ebx, LFB_BASE
; mov ecx, 0x280000 / 4096
; call commit_pages
; mov [LFBAddress], dword LFB_BASE
; ret
;@@:
call init_mtrr
mov edx, LFB_BASE
@ -365,7 +345,6 @@ proc init_LFB
mov dword [exp_lfb+4], edx
shr edi, 12 ; C00
; mov [pg_count], edi
shr edi, 10 ; 3
or esi, PG_GLOBAL+PG_LARGE+PG_UW
@ -559,7 +538,7 @@ update_mem_size:
; eax= linear address
;
; retval
; eax= phisical page address
; eax= physical page address
align 4
get_pg_addr:
@ -689,12 +668,8 @@ end if
test eax,12 ;U/S (+below)
jnz .fail ;ïðèëîæåíèå îáðàòèëîñü ê ïàìÿòè
;ÿäðà
;test eax, 8
;jnz .fail ;óñòàíîâëåí çàðåçåðâèðîâàííûé áèò
;â òàáëèöàõ ñòðàíèö. äîáàâëåíî â P4/Xeon
;ïîïûòêà çàïèñè â çàùèù¸ííóþ ñòðàíèöó ÿäðà
cmp ebx, tss._io_map_0
jb .fail
@ -703,7 +678,6 @@ end if
; io permission map
; copy-on-write protection
call alloc_page
test eax, eax
jz .fail
@ -750,15 +724,8 @@ proc map_mem stdcall, lin_addr:dword,slot:dword,\
and eax, 0xFFFFF000
jz .exit
stdcall map_page,edi,eax,PG_UW
; inc ebx
; add edi, 0x1000
; mov eax, [esi+ebx*4]
; test eax, eax
; jz @f
; and eax, 0xFFFFF000
; stdcall map_page, edi, eax
@@: mov edi, [lin_addr]
mov edi, [lin_addr]
and edi, 0xFFFFF000
mov ecx, [buf_size]
add ecx, 4095
@ -818,7 +785,7 @@ proc map_memEx stdcall, lin_addr:dword,slot:dword,\
jz .exit
stdcall map_page,edi,eax,PG_UW
@@: mov edi, [lin_addr]
mov edi, [lin_addr]
and edi, 0xFFFFF000
mov ecx, [buf_size]
add ecx, 4095
@ -972,29 +939,6 @@ sys_IPC:
mov [esp+32], eax
ret
;align 4
;proc set_ipc_buff
; mov eax,[current_slot]
; pushf
; cli
; mov [eax+APPDATA.ipc_start],ebx ;set fields in extended information area
; mov [eax+APPDATA.ipc_size],ecx
;
; add ecx, ebx
; add ecx, 4095
; and ecx, not 4095
;
;.touch: mov eax, [ebx]
; add ebx, 0x1000
; cmp ebx, ecx
; jb .touch
;
; popf
; xor eax, eax
; ret
;endp
proc sys_ipc_send stdcall, PID:dword, msg_addr:dword, msg_size:dword
locals
dst_slot dd ?

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@ -17,7 +17,7 @@ cross_order:
mov edx, esi
mov esi, edi
movzx edi, byte[esp+28 + 4]
sub edi, 53 ; all zeroes before
sub edi, 53 ; all zeroes before
call dword [servetable+edi*4]
ret
@ -67,7 +67,7 @@ iglobal
dd 0
dd 0
dd 0
dd sys_pci ; 62-PCI functions
dd 0 ; 62-PCI functions
dd sys_msg_board ; 63-System message board
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
@ -138,7 +138,7 @@ iglobal
dd undefined_syscall ; 59-reserved
dd sys_IPC ; 60-Inter Process Communication
dd sys_gs ; 61-Direct graphics access
dd cross_order ; 62-PCI functions
dd pci_api ; 62-PCI functions
dd cross_order ; 63-System message board
dd sys_resize_app_memory ; 64-Resize application memory usage
dd sys_putimage_palette ; 65-PutImagePalette
@ -153,7 +153,7 @@ iglobal
dd sys_end ; -1-end application
align 4
servetable3:
servetable3: ; Kolibri-A special service
dd paleholder ; 0
dd paleholder ; 1

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@ -4188,16 +4188,6 @@ sys_gs: ; direct screen access
mov [esp+32],eax
ret
;align 4 ; PCI functions
;
sys_pci:
call pci_api
mov [esp+36],eax
ret
align 4 ; system functions
syscall_setpixel: ; SetPixel