i915: vsync video support

git-svn-id: svn://kolibrios.org@4389 a494cfbc-eb01-0410-851d-a64ba20cac60

drivers/video/drm/i915/Gtt/intel-gtt.c

@@ -435,7 +435,7 @@ static int intel_gtt_init(void)
         return -ENOMEM;
     }
 
-    asm volatile("wbinvd");
+    asm volatile("wbinvd":::"memory");
 
 	intel_private.stolen_size = intel_gtt_stolen_size();
 
@@ -578,6 +578,60 @@ void intel_gtt_clear_range(unsigned int first_entry, unsigned int num_entries)
 	}
 	readl(intel_private.gtt+i-1);
 }
+static void intel_i915_setup_chipset_flush(void)
+{
+	int ret;
+	u32 temp;
+
+	pci_read_config_dword(intel_private.bridge_dev, I915_IFPADDR, &temp);
+	if (!(temp & 0x1)) {
+//		intel_alloc_chipset_flush_resource();
+//		intel_private.resource_valid = 1;
+//		pci_write_config_dword(intel_private.bridge_dev, I915_IFPADDR, (intel_private.ifp_resource.start & 0xffffffff) | 0x1);
+	} else {
+		temp &= ~1;
+
+		intel_private.resource_valid = 1;
+		intel_private.ifp_resource.start = temp;
+		intel_private.ifp_resource.end = temp + PAGE_SIZE;
+//		ret = request_resource(&iomem_resource, &intel_private.ifp_resource);
+		/* some BIOSes reserve this area in a pnp some don't */
+//		if (ret)
+//			intel_private.resource_valid = 0;
+	}
+}
+
+static void intel_i965_g33_setup_chipset_flush(void)
+{
+	u32 temp_hi, temp_lo;
+	int ret;
+
+	pci_read_config_dword(intel_private.bridge_dev, I965_IFPADDR + 4, &temp_hi);
+	pci_read_config_dword(intel_private.bridge_dev, I965_IFPADDR, &temp_lo);
+
+	if (!(temp_lo & 0x1)) {
+
+//		intel_alloc_chipset_flush_resource();
+
+//		intel_private.resource_valid = 1;
+//		pci_write_config_dword(intel_private.bridge_dev, I965_IFPADDR + 4,
+//			upper_32_bits(intel_private.ifp_resource.start));
+//		pci_write_config_dword(intel_private.bridge_dev, I965_IFPADDR, (intel_private.ifp_resource.start & 0xffffffff) | 0x1);
+	} else {
+		u64 l64;
+
+		temp_lo &= ~0x1;
+		l64 = ((u64)temp_hi << 32) | temp_lo;
+
+		intel_private.resource_valid = 1;
+		intel_private.ifp_resource.start = l64;
+		intel_private.ifp_resource.end = l64 + PAGE_SIZE;
+//		ret = request_resource(&iomem_resource, &intel_private.ifp_resource);
+		/* some BIOSes reserve this area in a pnp some don't */
+//		if (ret)
+//			intel_private.resource_valid = 0;
+	}
+}
 
 static void intel_i9xx_setup_flush(void)
 {
@@ -589,20 +643,18 @@ static void intel_i9xx_setup_flush(void)
         return;
 
     /* setup a resource for this object */
-//    intel_private.ifp_resource.name = "Intel Flush Page";
+	intel_private.ifp_resource.name = "Intel Flush Page";
-//    intel_private.ifp_resource.flags = IORESOURCE_MEM;
+	intel_private.ifp_resource.flags = IORESOURCE_MEM;
-
-    intel_private.resource_valid = 0;
 
     /* Setup chipset flush for 915 */
-//    if (IS_G33 || INTEL_GTT_GEN >= 4) {
+	if (IS_G33 || INTEL_GTT_GEN >= 4) {
-//        intel_i965_g33_setup_chipset_flush();
+		intel_i965_g33_setup_chipset_flush();
-//    } else {
+	} else {
-//        intel_i915_setup_chipset_flush();
+		intel_i915_setup_chipset_flush();
-//    }
+	}
 
-//    if (intel_private.ifp_resource.start)
+	if (intel_private.ifp_resource.start)
-//        intel_private.i9xx_flush_page = ioremap_nocache(intel_private.ifp_resource.start, PAGE_SIZE);
+		intel_private.i9xx_flush_page = ioremap(intel_private.ifp_resource.start, PAGE_SIZE);
     if (!intel_private.i9xx_flush_page)
         dev_err(&intel_private.pcidev->dev,
             "can't ioremap flush page - no chipset flushing\n");

drivers/video/drm/i915/Makefile.lto

@@ -16,9 +16,9 @@ CFLAGS_OPT = -Os -march=i686 -msse2 -fomit-frame-pointer -fno-builtin-printf -mn
 CFLAGS_OPT+= -mpreferred-stack-boundary=2 -mincoming-stack-boundary=2 -mno-ms-bitfields -flto
 CFLAGS   = -c $(INCLUDES) $(DEFINES) $(CFLAGS_OPT)
 
-LIBPATH:= $(DDK_TOPDIR)
+LIBPATH:= ../../../ddk
 
-LIBS:=    libddk.a libcore.a libgcc.a
+LIBS:=    -lddk -lcore -lgcc
 
 LDFLAGS = -e,_drvEntry,-nostdlib,-shared,-s,--image-base,0,--file-alignment,512,--section-alignment,4096
 

drivers/video/drm/i915/i915_gem.c

@@ -2652,9 +2652,6 @@ static void i965_write_fence_reg(struct drm_device *dev, int reg,
 		POSTING_READ(fence_reg + 4);
 
 		I915_WRITE(fence_reg + 0, val);
-
-        dbgprintf("%s val %x%x\n",__FUNCTION__, (int)(val >> 32), (int)val);
-
 	POSTING_READ(fence_reg);
 	} else {
 		I915_WRITE(fence_reg + 4, 0);

drivers/video/drm/i915/intel_display.c

@@ -1828,8 +1828,6 @@ intel_pin_and_fence_fb_obj(struct drm_device *dev,
 	u32 alignment;
 	int ret;
 
-    ENTER();
-
 	switch (obj->tiling_mode) {
 	case I915_TILING_NONE:
 		if (IS_BROADWATER(dev) || IS_CRESTLINE(dev))
@@ -1879,8 +1877,6 @@ intel_pin_and_fence_fb_obj(struct drm_device *dev,
 
 	dev_priv->mm.interruptible = true;
 
-    LEAVE();
-
 	return 0;
 
 err_unpin:

drivers/video/drm/i915/intel_fb.c

@@ -100,8 +100,6 @@ static int intelfb_create(struct drm_fb_helper *helper,
 	struct device *device = &dev->pdev->dev;
 	int size, ret;
 
-    ENTER();
-
 	/* we don't do packed 24bpp */
 	if (sizes->surface_bpp == 24)
 		sizes->surface_bpp = 32;

drivers/video/drm/i915/kms_display.c

@@ -319,7 +319,7 @@ int get_boot_mode(struct drm_connector *connector, videomode_t *usermode)
 
     list_for_each_entry(mode, &connector->modes, head)
     {
-        dbgprintf("check mode w:%d h:%d %dHz\n",
+        DRM_DEBUG_KMS("check mode w:%d h:%d %dHz\n",
                 drm_mode_width(mode), drm_mode_height(mode),
                 drm_mode_vrefresh(mode));
 
@@ -348,8 +348,6 @@ int init_display_kms(struct drm_device *dev, videomode_t *usermode)
     u32_t      ifl;
     int        err;
 
-    ENTER();
-
     mutex_lock(&dev->mode_config.mutex);
 
     connector = get_active_connector(dev) ;
@@ -366,8 +364,6 @@ int init_display_kms(struct drm_device *dev, videomode_t *usermode)
     if(crtc == NULL)
         crtc = get_possible_crtc(dev, encoder);
 
-    dbgprintf("CRTC %p\n", crtc);
-
     if(crtc == NULL)
     {
         DRM_DEBUG_KMS("No CRTC for encoder %d\n", encoder->base.id);
@@ -701,6 +697,9 @@ cursor_t* __stdcall select_cursor_kms(cursor_t *cursor)
 
 int i915_fbinfo(struct drm_i915_fb_info *fb)
 {
+    struct drm_i915_private *dev_priv = os_display->ddev->dev_private;
+    struct intel_crtc *crtc = to_intel_crtc(os_display->crtc);
+
     struct drm_i915_gem_object *obj = get_fb_obj();
 
     fb->name   = obj->base.name;
@@ -708,6 +707,8 @@ int i915_fbinfo(struct drm_i915_fb_info *fb)
     fb->height = os_display->height;
     fb->pitch  = obj->stride;
     fb->tiling = obj->tiling_mode;
+    fb->crtc   = crtc->base.base.id;
+    fb->pipe   = crtc->pipe;
 
     return 0;
 }

drivers/video/drm/i915/kos_gem_fb.c

@@ -200,7 +200,7 @@ kos_gem_fb_object_create(struct drm_device *dev,
         /* Allocate a reference for the name table.  */
         drm_gem_object_reference(&obj->base);
 
-        printf("%s allocate fb name %d\n", __FUNCTION__, obj->base.name );
+        DRM_DEBUG_KMS("%s allocate fb name %d\n", __FUNCTION__, obj->base.name );
     }
 
     idr_preload_end();