forked from KolibriOS/kolibrios
300 lines
12 KiB
C
300 lines
12 KiB
C
/* ------------------------------------------------------------------------- */
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/* */
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/* i2c.h - definitions for the i2c-bus interface */
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/* */
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/* ------------------------------------------------------------------------- */
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/* Copyright (C) 1995-2000 Simon G. Vogl
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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/* ------------------------------------------------------------------------- */
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/* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and
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Frodo Looijaard <frodol@dds.nl> */
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#ifndef _LINUX_I2C_H
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#define _LINUX_I2C_H
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#include <types.h>
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#include <list.h>
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#define I2C_NAME_SIZE 20
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struct i2c_msg;
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struct i2c_algorithm;
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struct i2c_adapter;
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struct i2c_client;
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union i2c_smbus_data;
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/* Transfer num messages.
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*/
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extern int i2c_transfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
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int num);
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/**
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* struct i2c_client - represent an I2C slave device
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* @flags: I2C_CLIENT_TEN indicates the device uses a ten bit chip address;
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* I2C_CLIENT_PEC indicates it uses SMBus Packet Error Checking
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* @addr: Address used on the I2C bus connected to the parent adapter.
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* @name: Indicates the type of the device, usually a chip name that's
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* generic enough to hide second-sourcing and compatible revisions.
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* @adapter: manages the bus segment hosting this I2C device
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* @driver: device's driver, hence pointer to access routines
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* @dev: Driver model device node for the slave.
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* @irq: indicates the IRQ generated by this device (if any)
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* @detected: member of an i2c_driver.clients list or i2c-core's
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* userspace_devices list
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*
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* An i2c_client identifies a single device (i.e. chip) connected to an
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* i2c bus. The behaviour exposed to Linux is defined by the driver
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* managing the device.
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*/
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struct i2c_client {
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unsigned short flags; /* div., see below */
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unsigned short addr; /* chip address - NOTE: 7bit */
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/* addresses are stored in the */
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/* _LOWER_ 7 bits */
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char name[I2C_NAME_SIZE];
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struct i2c_adapter *adapter; /* the adapter we sit on */
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// struct i2c_driver *driver; /* and our access routines */
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// struct device dev; /* the device structure */
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int irq; /* irq issued by device (or -1) */
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struct list_head detected;
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};
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#define to_i2c_client(d) container_of(d, struct i2c_client, dev)
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/*
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* The following structs are for those who like to implement new bus drivers:
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* i2c_algorithm is the interface to a class of hardware solutions which can
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* be addressed using the same bus algorithms - i.e. bit-banging or the PCF8584
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* to name two of the most common.
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*/
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struct i2c_algorithm {
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/* If an adapter algorithm can't do I2C-level access, set master_xfer
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to NULL. If an adapter algorithm can do SMBus access, set
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smbus_xfer. If set to NULL, the SMBus protocol is simulated
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using common I2C messages */
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/* master_xfer should return the number of messages successfully
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processed, or a negative value on error */
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int (*master_xfer)(struct i2c_adapter *adap, struct i2c_msg *msgs,
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int num);
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int (*smbus_xfer) (struct i2c_adapter *adap, u16 addr,
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unsigned short flags, char read_write,
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u8 command, int size, union i2c_smbus_data *data);
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/* To determine what the adapter supports */
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u32 (*functionality) (struct i2c_adapter *);
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};
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/*
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* i2c_adapter is the structure used to identify a physical i2c bus along
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* with the access algorithms necessary to access it.
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*/
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struct i2c_adapter {
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unsigned int id;
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unsigned int class; /* classes to allow probing for */
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const struct i2c_algorithm *algo; /* the algorithm to access the bus */
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void *algo_data;
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/* data fields that are valid for all devices */
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u8 level; /* nesting level for lockdep */
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int timeout; /* in jiffies */
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int retries;
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// struct device dev; /* the adapter device */
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int nr;
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char name[48];
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};
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#define to_i2c_adapter(d) container_of(d, struct i2c_adapter, dev)
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/*flags for the client struct: */
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#define I2C_CLIENT_PEC 0x04 /* Use Packet Error Checking */
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#define I2C_CLIENT_TEN 0x10 /* we have a ten bit chip address */
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/* Must equal I2C_M_TEN below */
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#define I2C_CLIENT_WAKE 0x80 /* for board_info; true iff can wake */
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/* i2c adapter classes (bitmask) */
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#define I2C_CLASS_HWMON (1<<0) /* lm_sensors, ... */
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#define I2C_CLASS_TV_ANALOG (1<<1) /* bttv + friends */
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#define I2C_CLASS_TV_DIGITAL (1<<2) /* dvb cards */
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#define I2C_CLASS_DDC (1<<3) /* DDC bus on graphics adapters */
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#define I2C_CLASS_SPD (1<<7) /* SPD EEPROMs and similar */
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/* i2c_client_address_data is the struct for holding default client
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* addresses for a driver and for the parameters supplied on the
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* command line
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*/
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struct i2c_client_address_data {
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const unsigned short *normal_i2c;
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const unsigned short *probe;
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const unsigned short *ignore;
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const unsigned short * const *forces;
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};
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/* Internal numbers to terminate lists */
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#define I2C_CLIENT_END 0xfffeU
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/* The numbers to use to set I2C bus address */
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#define ANY_I2C_BUS 0xffff
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/* Construct an I2C_CLIENT_END-terminated array of i2c addresses */
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#define I2C_ADDRS(addr, addrs...) \
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((const unsigned short []){ addr, ## addrs, I2C_CLIENT_END })
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/**
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* struct i2c_msg - an I2C transaction segment beginning with START
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* @addr: Slave address, either seven or ten bits. When this is a ten
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* bit address, I2C_M_TEN must be set in @flags and the adapter
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* must support I2C_FUNC_10BIT_ADDR.
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* @flags: I2C_M_RD is handled by all adapters. No other flags may be
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* provided unless the adapter exported the relevant I2C_FUNC_*
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* flags through i2c_check_functionality().
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* @len: Number of data bytes in @buf being read from or written to the
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* I2C slave address. For read transactions where I2C_M_RECV_LEN
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* is set, the caller guarantees that this buffer can hold up to
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* 32 bytes in addition to the initial length byte sent by the
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* slave (plus, if used, the SMBus PEC); and this value will be
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* incremented by the number of block data bytes received.
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* @buf: The buffer into which data is read, or from which it's written.
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*
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* An i2c_msg is the low level representation of one segment of an I2C
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* transaction. It is visible to drivers in the @i2c_transfer() procedure,
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* to userspace from i2c-dev, and to I2C adapter drivers through the
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* @i2c_adapter.@master_xfer() method.
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*
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* Except when I2C "protocol mangling" is used, all I2C adapters implement
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* the standard rules for I2C transactions. Each transaction begins with a
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* START. That is followed by the slave address, and a bit encoding read
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* versus write. Then follow all the data bytes, possibly including a byte
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* with SMBus PEC. The transfer terminates with a NAK, or when all those
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* bytes have been transferred and ACKed. If this is the last message in a
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* group, it is followed by a STOP. Otherwise it is followed by the next
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* @i2c_msg transaction segment, beginning with a (repeated) START.
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*
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* Alternatively, when the adapter supports I2C_FUNC_PROTOCOL_MANGLING then
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* passing certain @flags may have changed those standard protocol behaviors.
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* Those flags are only for use with broken/nonconforming slaves, and with
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* adapters which are known to support the specific mangling options they
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* need (one or more of IGNORE_NAK, NO_RD_ACK, NOSTART, and REV_DIR_ADDR).
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*/
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struct i2c_msg {
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u16 addr; /* slave address */
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u16 flags;
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#define I2C_M_TEN 0x0010 /* this is a ten bit chip address */
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#define I2C_M_RD 0x0001 /* read data, from slave to master */
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#define I2C_M_NOSTART 0x4000 /* if I2C_FUNC_PROTOCOL_MANGLING */
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#define I2C_M_REV_DIR_ADDR 0x2000 /* if I2C_FUNC_PROTOCOL_MANGLING */
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#define I2C_M_IGNORE_NAK 0x1000 /* if I2C_FUNC_PROTOCOL_MANGLING */
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#define I2C_M_NO_RD_ACK 0x0800 /* if I2C_FUNC_PROTOCOL_MANGLING */
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#define I2C_M_RECV_LEN 0x0400 /* length will be first received byte */
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u16 len; /* msg length */
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u8 *buf; /* pointer to msg data */
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};
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/* To determine what functionality is present */
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#define I2C_FUNC_I2C 0x00000001
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#define I2C_FUNC_10BIT_ADDR 0x00000002
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#define I2C_FUNC_PROTOCOL_MANGLING 0x00000004 /* I2C_M_NOSTART etc. */
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#define I2C_FUNC_SMBUS_PEC 0x00000008
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#define I2C_FUNC_SMBUS_BLOCK_PROC_CALL 0x00008000 /* SMBus 2.0 */
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#define I2C_FUNC_SMBUS_QUICK 0x00010000
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#define I2C_FUNC_SMBUS_READ_BYTE 0x00020000
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#define I2C_FUNC_SMBUS_WRITE_BYTE 0x00040000
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#define I2C_FUNC_SMBUS_READ_BYTE_DATA 0x00080000
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#define I2C_FUNC_SMBUS_WRITE_BYTE_DATA 0x00100000
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#define I2C_FUNC_SMBUS_READ_WORD_DATA 0x00200000
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#define I2C_FUNC_SMBUS_WRITE_WORD_DATA 0x00400000
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#define I2C_FUNC_SMBUS_PROC_CALL 0x00800000
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#define I2C_FUNC_SMBUS_READ_BLOCK_DATA 0x01000000
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#define I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 0x02000000
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#define I2C_FUNC_SMBUS_READ_I2C_BLOCK 0x04000000 /* I2C-like block xfer */
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#define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK 0x08000000 /* w/ 1-byte reg. addr. */
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#define I2C_FUNC_SMBUS_BYTE (I2C_FUNC_SMBUS_READ_BYTE | \
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I2C_FUNC_SMBUS_WRITE_BYTE)
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#define I2C_FUNC_SMBUS_BYTE_DATA (I2C_FUNC_SMBUS_READ_BYTE_DATA | \
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I2C_FUNC_SMBUS_WRITE_BYTE_DATA)
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#define I2C_FUNC_SMBUS_WORD_DATA (I2C_FUNC_SMBUS_READ_WORD_DATA | \
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I2C_FUNC_SMBUS_WRITE_WORD_DATA)
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#define I2C_FUNC_SMBUS_BLOCK_DATA (I2C_FUNC_SMBUS_READ_BLOCK_DATA | \
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I2C_FUNC_SMBUS_WRITE_BLOCK_DATA)
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#define I2C_FUNC_SMBUS_I2C_BLOCK (I2C_FUNC_SMBUS_READ_I2C_BLOCK | \
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I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)
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#define I2C_FUNC_SMBUS_EMUL (I2C_FUNC_SMBUS_QUICK | \
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I2C_FUNC_SMBUS_BYTE | \
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I2C_FUNC_SMBUS_BYTE_DATA | \
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I2C_FUNC_SMBUS_WORD_DATA | \
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I2C_FUNC_SMBUS_PROC_CALL | \
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I2C_FUNC_SMBUS_WRITE_BLOCK_DATA | \
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I2C_FUNC_SMBUS_I2C_BLOCK | \
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I2C_FUNC_SMBUS_PEC)
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/*
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* Data for SMBus Messages
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*/
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#define I2C_SMBUS_BLOCK_MAX 32 /* As specified in SMBus standard */
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union i2c_smbus_data {
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__u8 byte;
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__u16 word;
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__u8 block[I2C_SMBUS_BLOCK_MAX + 2]; /* block[0] is used for length */
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/* and one more for user-space compatibility */
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};
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/* i2c_smbus_xfer read or write markers */
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#define I2C_SMBUS_READ 1
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#define I2C_SMBUS_WRITE 0
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/* SMBus transaction types (size parameter in the above functions)
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Note: these no longer correspond to the (arbitrary) PIIX4 internal codes! */
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#define I2C_SMBUS_QUICK 0
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#define I2C_SMBUS_BYTE 1
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#define I2C_SMBUS_BYTE_DATA 2
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#define I2C_SMBUS_WORD_DATA 3
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#define I2C_SMBUS_PROC_CALL 4
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#define I2C_SMBUS_BLOCK_DATA 5
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#define I2C_SMBUS_I2C_BLOCK_BROKEN 6
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#define I2C_SMBUS_BLOCK_PROC_CALL 7 /* SMBus 2.0 */
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#define I2C_SMBUS_I2C_BLOCK_DATA 8
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#endif /* _LINUX_I2C_H */
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