forked from KolibriOS/kolibrios
437 lines
12 KiB
C
437 lines
12 KiB
C
/*
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* Copyright 2007, 2008 Luc Verhaegen <lverhaegen@novell.com>
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* Copyright 2007, 2008 Matthias Hopf <mhopf@novell.com>
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* Copyright 2007, 2008 Egbert Eich <eich@novell.com>
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* Copyright 2007, 2008 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include "xf86.h"
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/* for usleep */
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#if HAVE_XF86_ANSIC_H
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# include "xf86_ansic.h"
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#else
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# include <unistd.h>
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#endif
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#include "rhd.h"
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#include "rhd_crtc.h"
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#include "rhd_pll.h"
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#include "rhd_connector.h"
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#include "rhd_output.h"
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#include "rhd_crtc.h"
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#include "rhd_regs.h"
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#if defined (ATOM_BIOS) && defined (ATOM_BIOS_PARSER)
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# include "rhd_atombios.h"
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# include "rhd_biosscratch.h"
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struct atomPLLPrivate {
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enum atomPxclk Pxclk;
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struct atomPixelClockConfig Config;
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struct atomCodeTableVersion Version;
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CARD32 StoreFBDivFrac;
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enum atomDevice StoreDevice;
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enum rhdConnectorType StoreConnectorType;
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enum rhdOutputType StoreOutputType;
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int StoreCrtc;
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};
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/*
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*
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*/
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static void
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getSetPixelClockParameters(struct rhdPLL *PLL, struct atomPixelClockConfig *Config,
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enum rhdConnectorType ct, enum rhdOutputType ot, enum atomDevice device)
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{
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RHDPtr rhdPtr = RHDPTRI(PLL);
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struct atomPLLPrivate *Private = (struct atomPLLPrivate *)PLL->Private;
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switch (Private->Version.cref) {
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case 1:
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break;
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case 2:
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Config->u.v2.Device = device;
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Config->u.v2.Force = TRUE;
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break;
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case 3:
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switch (ct) {
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case RHD_CONNECTOR_VGA:
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Config->u.v3.EncoderMode = atomNoEncoder;
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break;
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case RHD_CONNECTOR_DVI:
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case RHD_CONNECTOR_DVI_SINGLE:
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Config->u.v3.EncoderMode = atomDVI;
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break;
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case RHD_CONNECTOR_PANEL:
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Config->u.v3.EncoderMode = atomLVDS;
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break;
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#if 0
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case RHD_CONNECTOR_DP:
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case RHD_CONNECTOR_DP_DUAL:
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Config->u.v3.EncoderMode = atomDP;
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break;
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case RHD_CONNECTOR_HDMI_A:
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case RHD_CONNECTOR_HDMI_B:
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Config->u.v3.EncoderMode = atomHDMI;
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break;
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#endif
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default:
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xf86DrvMsg(rhdPtr->scrnIndex, X_ERROR, "%s: Unknown connector type: 0x%x\n",__func__,ct);
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}
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switch (ot) {
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case RHD_OUTPUT_DACA:
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Config->u.v3.OutputType = atomOutputDacA;
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break;
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case RHD_OUTPUT_DACB:
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Config->u.v3.OutputType = atomOutputDacB;
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break;
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case RHD_OUTPUT_KLDSKP_LVTMA:
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Config->u.v3.OutputType = atomOutputKldskpLvtma;
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break;
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case RHD_OUTPUT_UNIPHYA:
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Config->u.v3.OutputType = atomOutputUniphyA;
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break;
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case RHD_OUTPUT_UNIPHYB:
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Config->u.v3.OutputType = atomOutputUniphyB;
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break;
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case RHD_OUTPUT_UNIPHYC:
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Config->u.v3.OutputType = atomOutputUniphyC;
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break;
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case RHD_OUTPUT_UNIPHYD:
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Config->u.v3.OutputType = atomOutputUniphyD;
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break;
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case RHD_OUTPUT_UNIPHYE:
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Config->u.v3.OutputType = atomOutputUniphyE;
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break;
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case RHD_OUTPUT_UNIPHYF:
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Config->u.v3.OutputType = atomOutputUniphyF;
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break;
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case RHD_OUTPUT_DVO:
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Config->u.v3.OutputType = atomOutputDvo;
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break;
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default:
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xf86DrvMsg(rhdPtr->scrnIndex, X_ERROR, "%s: Unhandled ouptut type\n",__func__);
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break;
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}
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Config->u.v3.Force = TRUE;
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Config->u.v3.UsePpll = FALSE;
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break;
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default:
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xf86DrvMsg(rhdPtr->scrnIndex, X_ERROR, "Unsupported SelectPixelClock version: %i\n",Private->Version.cref);
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break;
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}
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}
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/*
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*
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*/
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static void
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rhdAtomPLLSave(struct rhdPLL *PLL, CARD32 PllCntl, CARD32 OwnerVal)
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{
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RHDPtr rhdPtr = RHDPTRI(PLL);
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struct atomPLLPrivate *Private = (struct atomPLLPrivate *)PLL->Private;
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CARD32 Crtc1Cntl, Crtc2Cntl;
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enum atomCrtc owner;
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RHDFUNC(PLL);
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Crtc1Cntl = RHDRegRead(PLL, PCLK_CRTC1_CNTL);
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Crtc2Cntl = RHDRegRead(PLL, PCLK_CRTC2_CNTL);
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if (PllCntl & 0x2)
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PLL->StoreActive = FALSE;
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else
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PLL->StoreActive = TRUE;
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if ((Crtc1Cntl & 0x00010000) == OwnerVal)
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owner = atomCrtc1;
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else if ((Crtc2Cntl & 0x00010000) == OwnerVal)
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owner = atomCrtc2;
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else {
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owner = atomCrtc1; /* whatever... */
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PLL->StoreActive = FALSE;
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}
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Private->StoreCrtc = owner;
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Private->StoreDevice = RHDGetDeviceOnCrtc(rhdPtr, owner);
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if (Private->StoreDevice != atomNone)
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RHDFindConnectorAndOutputTypesForDevice(rhdPtr, Private->StoreDevice,
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&Private->StoreOutputType, &Private->StoreConnectorType);
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else
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PLL->StoreActive = FALSE;
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RHDDebug(PLL->scrnIndex, "Saving PLL %i on CRTC: %i %s active - device: 0x%x\n",
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(PLL->Id == PLL_ID_PLL1) ? 1 : 2,
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(owner == atomCrtc1) ? 1 : 2,
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(PLL->StoreActive) ? "" : "not",
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Private->StoreDevice);
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PLL->Stored = TRUE;
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/* Set parameters found at startup for shutdownInactive(). This is somewhat ugly... */
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Private->Config.Crtc = Private->StoreCrtc;
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Private->Config.Enable = PLL->StoreActive;
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if (Private->StoreDevice != atomNone)
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getSetPixelClockParameters(PLL, &Private->Config, Private->StoreConnectorType,
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Private->StoreOutputType, Private->StoreDevice);
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}
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/*
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*
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*/
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static void
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rhdAtomPLL1Save(struct rhdPLL *PLL)
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{
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struct atomPLLPrivate *Private = (struct atomPLLPrivate *)PLL->Private;
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CARD32 PllCntl;
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RHDFUNC(PLL);
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PLL->StoreSpreadSpectrum = RHDRegRead(PLL, P1PLL_INT_SS_CNTL);
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PLL->StoreRefDiv = RHDRegRead(PLL, EXT1_PPLL_REF_DIV) & 0x1FF;
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PLL->StoreFBDiv = (RHDRegRead(PLL, EXT1_PPLL_FB_DIV) >> 16) & 0x7FF;
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Private->StoreFBDivFrac = RHDRegRead(PLL, EXT1_PPLL_FB_DIV) & 0x7;
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PLL->StorePostDiv = RHDRegRead(PLL, EXT1_PPLL_POST_DIV) & 0x3F;
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PllCntl = RHDRegRead(PLL, P1PLL_CNTL);
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RHDDebug(PLL->scrnIndex, "Saving %i kHz clock on PLL1\n",
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((PLL->StoreFBDiv * PLL->RefClock * 10)
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/ (PLL->StorePostDiv * PLL->StoreRefDiv)));
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rhdAtomPLLSave(PLL, PllCntl, 0x00000000);
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}
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/*
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*
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*/
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static void
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rhdAtomPLL2Save(struct rhdPLL *PLL)
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{
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struct atomPLLPrivate *Private = (struct atomPLLPrivate *)PLL->Private;
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CARD32 PllCntl;
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RHDFUNC(PLL);
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PLL->StoreSpreadSpectrum = RHDRegRead(PLL, P2PLL_INT_SS_CNTL);
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PLL->StoreRefDiv = RHDRegRead(PLL, EXT2_PPLL_REF_DIV) & 0x1FF;
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PLL->StoreFBDiv = (RHDRegRead(PLL, EXT2_PPLL_FB_DIV) >> 16) & 0x7FF;
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Private->StoreFBDivFrac = RHDRegRead(PLL, EXT2_PPLL_FB_DIV) & 0x7;
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PLL->StorePostDiv = RHDRegRead(PLL, EXT2_PPLL_POST_DIV) & 0x3F;
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PllCntl = RHDRegRead(PLL, P2PLL_CNTL);
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RHDDebug(PLL->scrnIndex, "Saving %i kHz clock on PLL2\n",
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((PLL->StoreFBDiv * PLL->RefClock * 10)
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/ (PLL->StorePostDiv * PLL->StoreRefDiv)));
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rhdAtomPLLSave(PLL, PllCntl, 0x00010000);
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}
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/*
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*
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*/
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static void
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rhdAtomPLLRestore(struct rhdPLL *PLL)
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{
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RHDPtr rhdPtr = RHDPTRI(PLL);
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struct atomPixelClockConfig Config;
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struct atomPLLPrivate *Private = (struct atomPLLPrivate *)PLL->Private;
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RHDFUNC(PLL);
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if (!PLL->Stored) {
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xf86DrvMsg(PLL->scrnIndex, X_ERROR, "%s: %s: trying to restore "
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"uninitialized values.\n", __func__, PLL->Name);
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return;
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}
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Config.PixelClock = PLL->StoreActive
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? ((PLL->StoreFBDiv * PLL->RefClock * 10) / (PLL->StorePostDiv * PLL->StoreRefDiv))
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: 0;
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Config.Enable = PLL->StoreActive;
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Config.RefDiv = PLL->StoreRefDiv;
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Config.FbDiv = PLL->StoreFBDiv;
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Config.PostDiv = PLL->StorePostDiv;
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Config.FracFbDiv = Private->StoreFBDivFrac;
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Config.Crtc = Private->StoreCrtc;
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if (Private->StoreDevice != atomNone)
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getSetPixelClockParameters(PLL, &Config, Private->StoreConnectorType,
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Private->StoreOutputType, Private->StoreDevice);
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RHDDebug(PLL->scrnIndex, "Restoring PixelClock %i with %i kHz, (%i * %i) / ( %i * %i )"
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" on CRTC %i device: %x\n",
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Private->Pxclk, Config.PixelClock, PLL->RefClock, PLL->StoreFBDiv, PLL->StorePostDiv,
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PLL->StoreRefDiv, (Config.Crtc == atomCrtc1) ? 1 : 2, Config.u.v2.Device);
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/* Restore spread spectrum: AtomBIOS doesn't handle this for us */
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RHDRegWrite(PLL, (PLL->Id == PLL_ID_PLL1) ? P1PLL_INT_SS_CNTL : P2PLL_INT_SS_CNTL, PLL->StoreSpreadSpectrum);
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rhdAtomSetPixelClock(rhdPtr->atomBIOS, Private->Pxclk, &Config);
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}
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/*
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*
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*/
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static void
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rhdAtomPLLPower(struct rhdPLL *PLL, int Power)
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{
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RHDPtr rhdPtr = RHDPTRI(PLL);
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struct atomPLLPrivate *Private = (struct atomPLLPrivate *)PLL->Private;
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struct atomPixelClockConfig *config = &Private->Config;
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RHDFUNC(PLL);
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switch (Power) {
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case RHD_POWER_ON:
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if (config->PixelClock > 0)
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config->Enable = TRUE;
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else {
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xf86DrvMsg(rhdPtr->scrnIndex, X_ERROR,
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"%s: cannot enable pixel clock without frequency set\n",__func__);
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config->Enable = FALSE;
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}
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break;
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case RHD_POWER_RESET:
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case RHD_POWER_SHUTDOWN:
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return;
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config->Enable = FALSE;
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default:
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break;
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}
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rhdAtomSetPixelClock(rhdPtr->atomBIOS, Private->Pxclk, config);
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}
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/*
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*
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*/
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static void
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rhdAtomPLLSet(struct rhdPLL *PLL, int PixelClock, CARD16 ReferenceDivider,
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CARD16 FeedbackDivider, CARD8 PostDivider)
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{
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RHDPtr rhdPtr = RHDPTRI(PLL);
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struct atomPLLPrivate *Private = (struct atomPLLPrivate *)PLL->Private;
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struct rhdCrtc *Crtc = NULL;
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RHDFUNC(PLL);
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RHDDebug(rhdPtr->scrnIndex, "%s: %i kHz RefDiv: %x FeedbackDiv: %x PostDiv: %x\n",
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__func__, PixelClock, ReferenceDivider, FeedbackDivider, PostDivider);
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Private->Config.PixelClock = PixelClock;
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Private->Config.RefDiv = ReferenceDivider;
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Private->Config.FbDiv = FeedbackDivider;
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Private->Config.PostDiv = PostDivider;
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Private->Config.FracFbDiv = 0;
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if (rhdPtr->Crtc[0]->PLL == PLL) {
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Private->Config.Crtc = atomCrtc1;
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Crtc = rhdPtr->Crtc[0];
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} else if (rhdPtr->Crtc[1]->PLL == PLL) {
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Private->Config.Crtc = atomCrtc2;
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Crtc = rhdPtr->Crtc[1];
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} else
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xf86DrvMsg(rhdPtr->scrnIndex, X_ERROR, "Trying to set an unassigned PLL\n");
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if (Crtc && Private->Version.cref > 1) {
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struct rhdOutput *Output;
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for (Output = rhdPtr->Outputs; Output; Output = Output->Next) {
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if (Output->Crtc == Crtc)
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break;
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}
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if (Output)
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getSetPixelClockParameters(PLL, &Private->Config,
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Output->Connector->Type, Output->Id,
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Output->OutputDriverPrivate->Device);
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}
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/* Disable spread spectrum. AtomBIOS doesn't do this for us */
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RHDRegMask(PLL, (PLL->Id == PLL_ID_PLL1) ? P1PLL_INT_SS_CNTL : P2PLL_INT_SS_CNTL, 0, 0x00000001);
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Private->Config.Enable = TRUE;
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rhdAtomSetPixelClock(rhdPtr->atomBIOS, Private->Pxclk, &Private->Config);
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}
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/*
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*
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*/
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Bool
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RHDAtomPLLsInit(RHDPtr rhdPtr)
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{
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struct rhdPLL *PLL;
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struct atomPLLPrivate *Private;
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CARD32 RefClock, IntMin, IntMax, PixMin, PixMax;
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int i;
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RHDFUNC(rhdPtr);
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RHDSetupLimits(rhdPtr, &RefClock, &IntMin, &IntMax, &PixMin, &PixMax);
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for (i = 0; i < 2; i++) {
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PLL = (struct rhdPLL *) xnfcalloc(sizeof(struct rhdPLL), 1);
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Private = (struct atomPLLPrivate *) xnfcalloc(sizeof(struct atomPLLPrivate),1);
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PLL->Private = Private;
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Private->Version = rhdAtomSetPixelClockVersion(rhdPtr->atomBIOS);
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if (Private->Version.cref > 3) {
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xf86DrvMsg(rhdPtr->scrnIndex, X_ERROR, "Unsupported SelectPixelClock version; %i\n",
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Private->Version.cref);
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xfree(PLL->Private);
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xfree(PLL);
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return FALSE;
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}
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PLL->scrnIndex = rhdPtr->scrnIndex;
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if (i == 0) {
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PLL->Name = PLL_NAME_PLL1;
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PLL->Id = PLL_ID_PLL1;
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PLL->Save = rhdAtomPLL1Save;
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Private->Pxclk = atomPclk1;
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} else {
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PLL->Name = PLL_NAME_PLL2;
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PLL->Id = PLL_ID_PLL2;
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PLL->Save = rhdAtomPLL2Save;
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Private->Pxclk = atomPclk2;
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}
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PLL->RefClock = RefClock;
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PLL->IntMin = IntMin;
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PLL->IntMax = IntMax;
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PLL->PixMin = PixMin;
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PLL->PixMax = PixMax;
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PLL->Valid = NULL;
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PLL->Set = rhdAtomPLLSet;
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PLL->Power = rhdAtomPLLPower;
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PLL->Restore = rhdAtomPLLRestore;
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rhdPtr->PLLs[i] = PLL;
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}
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return TRUE;
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}
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#endif /* ATOM_BIOS && ATOM_BIOS_PARSER */
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