2011-07-15 08:38:31 +02:00
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/*
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* Copyright 2008 Advanced Micro Devices, Inc.
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* Copyright 2008 Red Hat Inc.
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* Copyright 2009 Jerome Glisse.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Dave Airlie
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* Alex Deucher
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* Jerome Glisse
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*/
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2012-11-03 03:41:31 +01:00
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#include <drm/drmP.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/radeon_drm.h>
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2011-07-15 08:38:31 +02:00
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#include "radeon_reg.h"
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#include "radeon.h"
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#include "atom.h"
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2012-11-03 03:41:31 +01:00
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#define RADEON_WAIT_IDLE_TIMEOUT 200
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2011-07-15 08:38:31 +02:00
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2011-09-06 10:36:54 +02:00
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extern int irq_override;
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2011-07-15 08:38:31 +02:00
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2012-11-03 03:41:31 +01:00
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/**
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* radeon_driver_irq_handler_kms - irq handler for KMS
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*
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2014-09-01 13:49:48 +02:00
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* @int irq, void *arg: args
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2012-11-03 03:41:31 +01:00
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*
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* This is the irq handler for the radeon KMS driver (all asics).
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* radeon_irq_process is a macro that points to the per-asic
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* irq handler callback.
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*/
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2014-09-01 13:49:48 +02:00
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irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg)
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2011-07-15 08:38:31 +02:00
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{
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2012-12-16 20:05:06 +01:00
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struct drm_device *dev = (struct drm_device *) arg;
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struct radeon_device *rdev = dev->dev_private;
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return radeon_irq_process(rdev);
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2011-07-15 08:38:31 +02:00
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}
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2012-11-03 03:41:31 +01:00
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/**
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* radeon_driver_irq_preinstall_kms - drm irq preinstall callback
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*
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* @dev: drm dev pointer
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*
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* Gets the hw ready to enable irqs (all asics).
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* This function disables all interrupt sources on the GPU.
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*/
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2012-12-16 20:05:06 +01:00
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void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
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2011-07-15 08:38:31 +02:00
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{
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2012-12-16 20:05:06 +01:00
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struct radeon_device *rdev = dev->dev_private;
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2012-11-03 03:41:31 +01:00
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unsigned long irqflags;
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2011-07-15 08:38:31 +02:00
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unsigned i;
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2012-11-03 03:41:31 +01:00
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spin_lock_irqsave(&rdev->irq.lock, irqflags);
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2011-07-15 08:38:31 +02:00
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/* Disable *all* interrupts */
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2012-11-03 03:41:31 +01:00
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for (i = 0; i < RADEON_NUM_RINGS; i++)
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atomic_set(&rdev->irq.ring_int[i], 0);
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2014-09-01 13:49:48 +02:00
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rdev->irq.dpm_thermal = false;
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2012-11-03 03:41:31 +01:00
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for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
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rdev->irq.hpd[i] = false;
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for (i = 0; i < RADEON_MAX_CRTCS; i++) {
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2011-07-15 08:38:31 +02:00
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rdev->irq.crtc_vblank_int[i] = false;
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2012-11-03 03:41:31 +01:00
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atomic_set(&rdev->irq.pflip[i], 0);
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rdev->irq.afmt[i] = false;
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2011-07-15 08:38:31 +02:00
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}
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radeon_irq_set(rdev);
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2012-11-03 03:41:31 +01:00
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spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
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2011-07-15 08:38:31 +02:00
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/* Clear bits */
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radeon_irq_process(rdev);
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}
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2012-11-03 03:41:31 +01:00
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/**
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* radeon_driver_irq_postinstall_kms - drm irq preinstall callback
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*
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* @dev: drm dev pointer
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*
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* Handles stuff to be done after enabling irqs (all asics).
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* Returns 0 on success.
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*/
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2012-12-16 20:05:06 +01:00
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int radeon_driver_irq_postinstall_kms(struct drm_device *dev)
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2011-07-15 08:38:31 +02:00
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{
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2012-12-16 20:05:06 +01:00
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dev->max_vblank_count = 0x001fffff;
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return 0;
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}
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2011-07-15 08:38:31 +02:00
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2012-12-16 20:05:06 +01:00
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/**
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* radeon_driver_irq_uninstall_kms - drm irq uninstall callback
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*
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* @dev: drm dev pointer
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*
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* This function disables all interrupt sources on the GPU (all asics).
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*/
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void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
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{
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struct radeon_device *rdev = dev->dev_private;
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unsigned long irqflags;
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unsigned i;
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2012-11-03 03:41:31 +01:00
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2012-12-16 20:05:06 +01:00
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if (rdev == NULL) {
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return;
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}
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spin_lock_irqsave(&rdev->irq.lock, irqflags);
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/* Disable *all* interrupts */
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for (i = 0; i < RADEON_NUM_RINGS; i++)
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atomic_set(&rdev->irq.ring_int[i], 0);
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2014-09-01 13:49:48 +02:00
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rdev->irq.dpm_thermal = false;
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2012-12-16 20:05:06 +01:00
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for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
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rdev->irq.hpd[i] = false;
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for (i = 0; i < RADEON_MAX_CRTCS; i++) {
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rdev->irq.crtc_vblank_int[i] = false;
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atomic_set(&rdev->irq.pflip[i], 0);
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rdev->irq.afmt[i] = false;
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}
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2013-07-05 09:43:48 +02:00
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radeon_irq_set(rdev);
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2012-12-16 20:05:06 +01:00
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spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
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2011-07-15 08:38:31 +02:00
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}
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2012-12-16 20:05:06 +01:00
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2012-11-03 03:41:31 +01:00
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/**
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* radeon_irq_kms_init - init driver interrupt info
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*
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* @rdev: radeon device pointer
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*
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* Sets up the work irq handlers, vblank init, MSIs, etc. (all asics).
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* Returns 0 for success, error for failure.
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*/
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2011-07-15 08:38:31 +02:00
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int radeon_irq_kms_init(struct radeon_device *rdev)
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{
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int r = 0;
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2012-11-03 03:41:31 +01:00
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spin_lock_init(&rdev->irq.lock);
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/* enable msi */
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2011-07-15 08:38:31 +02:00
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rdev->msi_enabled = 0;
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2012-11-03 03:41:31 +01:00
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2011-07-15 08:38:31 +02:00
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rdev->irq.installed = true;
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2014-09-01 13:49:48 +02:00
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r = drm_irq_install(rdev->ddev, rdev->ddev->pdev->irq);
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2011-07-15 08:38:31 +02:00
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if (r) {
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rdev->irq.installed = false;
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2012-12-16 20:05:06 +01:00
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FAIL();
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2011-07-15 08:38:31 +02:00
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return r;
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}
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2014-09-01 13:49:48 +02:00
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2011-07-15 08:38:31 +02:00
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DRM_INFO("radeon: irq initialized.\n");
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return 0;
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}
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2012-11-03 03:41:31 +01:00
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/**
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2013-07-05 09:43:48 +02:00
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* radeon_irq_kms_fini - tear down driver interrupt info
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2012-11-03 03:41:31 +01:00
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*
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* @rdev: radeon device pointer
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*
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* Tears down the work irq handlers, vblank handlers, MSIs, etc. (all asics).
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*/
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void radeon_irq_kms_fini(struct radeon_device *rdev)
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{
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// drm_vblank_cleanup(rdev->ddev);
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if (rdev->irq.installed) {
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// drm_irq_uninstall(rdev->ddev);
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rdev->irq.installed = false;
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// if (rdev->msi_enabled)
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// pci_disable_msi(rdev->pdev);
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}
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}
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2011-07-15 08:38:31 +02:00
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2012-11-03 03:41:31 +01:00
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/**
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* radeon_irq_kms_sw_irq_get - enable software interrupt
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*
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* @rdev: radeon device pointer
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* @ring: ring whose interrupt you want to enable
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*
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* Enables the software interrupt for a specific ring (all asics).
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* The software interrupt is generally used to signal a fence on
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* a particular ring.
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*/
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void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev, int ring)
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2011-07-15 08:38:31 +02:00
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{
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unsigned long irqflags;
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2012-11-03 03:41:31 +01:00
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if (!rdev->ddev->irq_enabled)
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return;
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if (atomic_inc_return(&rdev->irq.ring_int[ring]) == 1) {
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spin_lock_irqsave(&rdev->irq.lock, irqflags);
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2011-07-15 08:38:31 +02:00
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radeon_irq_set(rdev);
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2012-11-03 03:41:31 +01:00
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spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
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2011-07-15 08:38:31 +02:00
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}
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}
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2014-12-27 16:58:21 +01:00
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/**
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* radeon_irq_kms_sw_irq_get_delayed - enable software interrupt
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*
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* @rdev: radeon device pointer
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* @ring: ring whose interrupt you want to enable
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*
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* Enables the software interrupt for a specific ring (all asics).
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* The software interrupt is generally used to signal a fence on
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* a particular ring.
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*/
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bool radeon_irq_kms_sw_irq_get_delayed(struct radeon_device *rdev, int ring)
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{
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return atomic_inc_return(&rdev->irq.ring_int[ring]) == 1;
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}
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2012-11-03 03:41:31 +01:00
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/**
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* radeon_irq_kms_sw_irq_put - disable software interrupt
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*
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* @rdev: radeon device pointer
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* @ring: ring whose interrupt you want to disable
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*
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* Disables the software interrupt for a specific ring (all asics).
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* The software interrupt is generally used to signal a fence on
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* a particular ring.
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*/
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void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev, int ring)
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2011-07-15 08:38:31 +02:00
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{
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unsigned long irqflags;
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2012-11-03 03:41:31 +01:00
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if (!rdev->ddev->irq_enabled)
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return;
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if (atomic_dec_and_test(&rdev->irq.ring_int[ring])) {
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spin_lock_irqsave(&rdev->irq.lock, irqflags);
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2011-07-15 08:38:31 +02:00
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radeon_irq_set(rdev);
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2012-11-03 03:41:31 +01:00
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spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
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2011-07-15 08:38:31 +02:00
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}
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}
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2012-12-16 20:05:06 +01:00
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/**
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* radeon_irq_kms_enable_hpd - enable hotplug detect interrupt
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*
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* @rdev: radeon device pointer
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* @hpd_mask: mask of hpd pins you want to enable.
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*
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* Enables the hotplug detect interrupt for a specific hpd pin (all asics).
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*/
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void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
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{
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unsigned long irqflags;
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int i;
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2014-09-01 13:49:48 +02:00
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if (!rdev->ddev->irq_enabled)
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return;
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2012-12-16 20:05:06 +01:00
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spin_lock_irqsave(&rdev->irq.lock, irqflags);
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for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
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rdev->irq.hpd[i] |= !!(hpd_mask & (1 << i));
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radeon_irq_set(rdev);
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spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
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}
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/**
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* radeon_irq_kms_disable_hpd - disable hotplug detect interrupt
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*
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* @rdev: radeon device pointer
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* @hpd_mask: mask of hpd pins you want to disable.
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*
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* Disables the hotplug detect interrupt for a specific hpd pin (all asics).
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*/
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void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
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{
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unsigned long irqflags;
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int i;
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2014-09-01 13:49:48 +02:00
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if (!rdev->ddev->irq_enabled)
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return;
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2012-12-16 20:05:06 +01:00
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spin_lock_irqsave(&rdev->irq.lock, irqflags);
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for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
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rdev->irq.hpd[i] &= !(hpd_mask & (1 << i));
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radeon_irq_set(rdev);
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spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
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}
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