2015-05-20 15:58:39 +02:00
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; ;;
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2017-03-17 20:30:51 +01:00
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;; Copyright (C) KolibriOS team 2015-2017. All rights reserved. ;;
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2015-05-20 15:58:39 +02:00
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;; Distributed under terms of the GNU General Public License ;;
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;; ;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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format PE DLL native 0.05
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entry START
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DEBUG = 1
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__DEBUG__ = 1
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__DEBUG_LEVEL__ = 1 ; 1 = verbose, 2 = errors only
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API_VERSION = 0 ;debug
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STRIDE = 4 ;size of row in devices table
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SRV_GETVERSION = 0
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section '.flat' code readable writable executable
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2017-03-17 20:30:51 +01:00
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include '../proc32.inc'
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include '../struct.inc'
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include '../macros.inc'
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include '../peimport.inc'
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include '../fdo.inc'
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GPIO_PORT_CONFIG_ADDR = 0xF100
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GPIO_DATA_ADDR = 0xF200
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ADC_ADDR = 0xFE00
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2015-05-20 15:58:39 +02:00
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proc START c, state:dword, cmdline:dword
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cmp [state], 1
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jne .exit
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.entry:
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push esi
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DEBUGF 1,"Loading vortex86EX GPIO driver\n"
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call detect
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pop esi
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test eax, eax
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jz .fail
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; Set crossbar base address register in southbridge
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2017-03-17 20:30:51 +01:00
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invoke PciWrite16, [bus], [dev], 0x64, 0x0A00 or 1
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2015-05-20 15:58:39 +02:00
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; Set GPIO base address register in southbridge
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2017-03-17 20:30:51 +01:00
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invoke PciWrite16, [bus], [dev], 0x62, GPIO_PORT_CONFIG_ADDR or 1
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DEBUGF 1,"Setting up ADC\n"
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; Enable ADC
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invoke PciRead32, [bus], [dev], 0xBC
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and eax, not (1 shl 28)
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invoke PciWrite32, [bus], [dev], 0xBC, eax
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; Set ADC base address
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mov ebx, [dev]
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inc ebx
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invoke PciRead16, [bus], ebx, 0xDE
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or ax, 0x02
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invoke PciWrite16, [bus], ebx, 0xDE, eax
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invoke PciWrite32, [bus], ebx, 0xE0, 0x00500000 or ADC_ADDR
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; set up ADC
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mov dx, ADC_ADDR + 1
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xor al, al
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out dx, al
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; Empty FIFO
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@@:
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mov dx, ADC_ADDR + 2 ; Status register
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in al, dx
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test al, 0x01 ; FIFO ready
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jz @f
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mov dx, ADC_ADDR + 4
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in ax, dx
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jmp @r
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@@:
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2015-05-20 15:58:39 +02:00
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; Enable GPIO0-9
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2017-03-17 20:30:51 +01:00
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mov dx, GPIO_PORT_CONFIG_ADDR + 0 ; General-Purpose I/O Data & Direction Decode Enable
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2015-05-20 15:58:39 +02:00
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mov eax, 0x000001ff
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out dx, eax
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2017-03-17 20:30:51 +01:00
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mov ecx, 10 ; 10 GPIO ports total
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mov dx, GPIO_PORT_CONFIG_ADDR + 4 ; General-Purpose I/O Port0 Data & Direction Decode Address
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mov ax, GPIO_DATA_ADDR
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2015-05-20 15:58:39 +02:00
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.gpio_init:
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; Set GPIO data port base address
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out dx, ax
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add ax, 2
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add dx, 2
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; Set GPIO direction base address
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out dx, ax
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add ax, 2
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add dx, 2
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; loop
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dec ecx
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jnz .gpio_init
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2018-07-01 12:48:38 +02:00
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; Set GPIO0 pin 0-7 as output
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mov al, 0xff
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2017-03-17 20:30:51 +01:00
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mov dx, GPIO_DATA_ADDR + 0*4 + 2
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2015-05-20 15:58:39 +02:00
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out dx, al
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invoke RegService, my_service, service_proc
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ret
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2017-03-17 20:30:51 +01:00
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.fail:
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.exit:
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2015-05-20 15:58:39 +02:00
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xor eax, eax
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ret
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endp
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proc service_proc stdcall, ioctl:dword
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mov ebx, [ioctl]
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mov eax, [ebx+IOCTL.io_code]
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cmp eax, SRV_GETVERSION
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jne @F
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mov eax, [ebx+IOCTL.output]
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cmp [ebx+IOCTL.out_size], 4
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jne .fail
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mov dword [eax], API_VERSION
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xor eax, eax
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ret
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2017-03-17 20:30:51 +01:00
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@@:
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2015-05-20 15:58:39 +02:00
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cmp eax, 1 ; read GPIO P0
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2017-03-17 20:30:51 +01:00
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jne .no_gpioread
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mov dx, GPIO_DATA_ADDR + 0x00
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2015-05-20 15:58:39 +02:00
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in al, dx
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ret
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2017-03-17 20:30:51 +01:00
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.no_gpioread:
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2015-05-20 15:58:39 +02:00
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cmp eax, 2 ; write GPIO P0
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2017-03-17 20:30:51 +01:00
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jne .no_gpiowrite
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2015-05-20 15:58:39 +02:00
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mov eax, [ebx + IOCTL.input]
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2017-03-17 20:30:51 +01:00
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mov dx, GPIO_DATA_ADDR + 0x00
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2015-05-20 15:58:39 +02:00
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out dx, al
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xor eax, eax
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ret
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2017-03-17 20:30:51 +01:00
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.no_gpiowrite:
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2018-07-01 12:48:38 +02:00
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cmp eax, 3 ; read single ADC channel
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2017-03-17 20:30:51 +01:00
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jne .no_adcread
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2018-07-01 12:48:38 +02:00
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mov ecx, [ebx + IOCTL.input]
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cmp ecx, 8
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jae .fail
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2017-03-17 20:30:51 +01:00
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mov dx, ADC_ADDR + 1
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mov al, 1 shl 3 ; Power down ADC
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out dx, al
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mov dx, ADC_ADDR + 0 ; AUX channel select register
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2018-07-01 12:48:38 +02:00
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mov al, 1
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shl ax, cl
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2017-03-17 20:30:51 +01:00
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out dx, al
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mov dx, ADC_ADDR + 1
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mov al, 1 shl 0 ; Single shot, no interrupts, start
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out dx, al
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mov dx, ADC_ADDR + 2
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@@:
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in al, dx
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test al, 1 shl 0 ; data ready?
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jz @r
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mov dx, ADC_ADDR + 4
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2018-07-01 12:48:38 +02:00
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in ax, dx ; read the data from the FIFO and return to user call
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2017-03-17 20:30:51 +01:00
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ret
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.no_adcread:
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.fail:
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2015-05-20 15:58:39 +02:00
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or eax, -1
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ret
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endp
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proc detect
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push ebx
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invoke GetPCIList
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mov ebx, eax
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2017-03-17 20:30:51 +01:00
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.next_dev:
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2015-05-20 15:58:39 +02:00
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mov eax, [eax+PCIDEV.fd]
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cmp eax, ebx
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jz .err
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mov edx, [eax+PCIDEV.vendor_device_id]
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mov esi, devices
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2017-03-17 20:30:51 +01:00
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@@:
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2015-05-20 15:58:39 +02:00
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cmp dword [esi], 0
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jz .next_dev
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cmp edx, [esi]
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jz .found
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add esi, STRIDE
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jmp @B
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2017-03-17 20:30:51 +01:00
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.found:
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2015-05-20 15:58:39 +02:00
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movzx ebx, [eax+PCIDEV.devfn]
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mov [dev], ebx
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movzx ebx, [eax+PCIDEV.bus]
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mov [bus], ebx
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xor eax, eax
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inc eax
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pop ebx
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ret
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2017-03-17 20:30:51 +01:00
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.err:
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2015-05-20 15:58:39 +02:00
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DEBUGF 1,"Could not find vortex86EX south bridge!\n"
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xor eax, eax
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pop ebx
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ret
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endp
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DEVICE_ID = 6011h
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VENDOR_ID = 17F3h
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;all initialized data place here
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align 4
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devices dd (DEVICE_ID shl 16)+VENDOR_ID
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dd 0 ;terminator
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my_service db '86DUINO-GPIO',0 ;max 16 chars include zero
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include_debug_strings ; All data wich FDO uses will be included here
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dev dd ?
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bus dd ?
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align 4
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data fixups
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end data
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