forked from KolibriOS/kolibrios
ddk:update to 3.12.9
git-svn-id: svn://kolibrios.org@4538 a494cfbc-eb01-0410-851d-a64ba20cac60
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eaa731f069
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0c4f98c413
@ -588,7 +588,7 @@
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{0x1002, 0x9645, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO2|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
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{0x1002, 0x9647, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP},\
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{0x1002, 0x9648, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP},\
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{0x1002, 0x9649, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP},\
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{0x1002, 0x9649, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO2|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP},\
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{0x1002, 0x964a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
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{0x1002, 0x964b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
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{0x1002, 0x964c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
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@ -1010,7 +1010,7 @@ extern void fb_pad_aligned_buffer(u8 *dst, u32 d_pitch, u8 *src, u32 s_pitch, u3
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extern void fb_set_suspend(struct fb_info *info, int state);
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extern int fb_get_color_depth(struct fb_var_screeninfo *var,
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struct fb_fix_screeninfo *fix);
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extern int fb_get_options(char *name, char **option);
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extern int fb_get_options(const char *name, char **option);
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extern int fb_new_modelist(struct fb_info *info);
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extern struct fb_info *registered_fb[FB_MAX];
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@ -6,7 +6,7 @@
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#if BITS_PER_LONG == 64
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#define div64_long(x,y) div64_s64((x),(y))
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#define div64_long(x, y) div64_s64((x), (y))
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#define div64_ul(x, y) div64_u64((x), (y))
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/**
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@ -57,7 +57,7 @@ static inline s64 div64_s64(s64 dividend, s64 divisor)
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#elif BITS_PER_LONG == 32
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#define div64_long(x,y) div_s64((x),(y))
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#define div64_long(x, y) div_s64((x), (y))
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#define div64_ul(x, y) div_u64((x), (y))
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#ifndef div_u64_rem
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@ -1050,4 +1050,15 @@ struct drm_i915_fb_info {
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__u32 pipe;
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};
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struct drm_i915_mask_update {
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__u32 handle;
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__u32 dx;
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__u32 dy;
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__u32 width;
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__u32 height;
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__u32 bo_pitch;
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__u32 bo_map;
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};
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#endif /* _UAPI_I915_DRM_H_ */
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@ -501,12 +501,12 @@ int drm_order(unsigned long size);
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static inline void __iomem *ioremap(uint32_t offset, size_t size)
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{
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return (void __iomem*) MapIoMem(offset, size, PG_SW|PG_NOCACHE);
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return (void __iomem*) MapIoMem(offset, size, PG_SW|PG_NOCACHE|0x100);
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}
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static inline void __iomem *ioremap_wc(uint32_t offset, size_t size)
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{
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return (void __iomem*) MapIoMem(offset, size, PG_SW|PG_NOCACHE);
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return (void __iomem*) MapIoMem(offset, size, PG_SW|0x100);
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}
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