forked from KolibriOS/kolibrios
i915: RC10.5
git-svn-id: svn://kolibrios.org@3298 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
Sergey Semyonov (Serge)
parent
1070204c9a
commit
ff32f19a91
@ -585,8 +585,8 @@ int drm_fb_helper_single_fb_probe(struct drm_fb_helper *fb_helper,
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if (new_fb) {
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info->var.pixclock = 0;
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dev_info(fb_helper->dev->dev, "fb%d: %s frame buffer device\n",
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info->node, info->fix.id);
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// dev_info(fb_helper->dev->dev, "fb%d: %s frame buffer device\n",
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// info->node, info->fix.id);
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} else {
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drm_fb_helper_set_par(info);
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@ -217,7 +217,6 @@ drm_gem_handle_delete(struct drm_file *filp, u32 handle)
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* we may want to use ida for number allocation and a hash table
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* for the pointers, anyway.
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*/
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spin_lock(&filp->table_lock);
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/* Check if we currently have a reference on the object */
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@ -228,7 +227,7 @@ drm_gem_handle_delete(struct drm_file *filp, u32 handle)
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}
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dev = obj->dev;
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printf("%s handle %d obj %p\n", __FUNCTION__, handle, obj);
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// printf("%s handle %d obj %p\n", __FUNCTION__, handle, obj);
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/* Release reference and decrement refcount. */
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idr_remove(&filp->object_idr, handle);
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@ -1554,8 +1554,6 @@ int i915_driver_open(struct drm_device *dev, struct drm_file *file)
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struct drm_i915_file_private *file_priv;
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DRM_DEBUG_DRIVER("\n");
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ENTER();
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file_priv = kmalloc(sizeof(*file_priv), GFP_KERNEL);
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if (!file_priv)
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return -ENOMEM;
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@ -1567,7 +1565,6 @@ int i915_driver_open(struct drm_device *dev, struct drm_file *file)
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idr_init(&file_priv->context_idr);
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LEAVE();
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return 0;
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}
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@ -237,8 +237,6 @@ i915_gem_create(struct drm_file *file,
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int ret;
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u32 handle;
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ENTER();
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size = roundup(size, PAGE_SIZE);
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if (size == 0)
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return -EINVAL;
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@ -262,7 +260,7 @@ i915_gem_create(struct drm_file *file,
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*handle_p = handle;
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printf("%s obj %p handle %d\n", __FUNCTION__, obj, handle);
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// printf("%s obj %p handle %d\n", __FUNCTION__, obj, handle);
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return 0;
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}
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@ -1304,8 +1302,8 @@ i915_gem_mmap_ioctl(struct drm_device *dev, void *data,
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if (obj == NULL)
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return -ENOENT;
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dbgprintf("%s offset %lld size %lld\n",
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__FUNCTION__, args->offset, args->size);
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//dbgprintf("%s offset %lld size %lld\n",
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// __FUNCTION__, args->offset, args->size);
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/* prime objects have no backing filp to GEM mmap
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* pages from.
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*/
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@ -1499,7 +1497,6 @@ i915_gem_object_put_pages_gtt(struct drm_i915_gem_object *obj)
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page_cache_release(page);
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}
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//DRM_DEBUG_KMS("%s release %d pages\n", __FUNCTION__, page_count);
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printf("%s release %d pages\n", __FUNCTION__, page_count);
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obj->dirty = 0;
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@ -1587,7 +1584,7 @@ i915_gem_object_get_pages_gtt(struct drm_i915_gem_object *obj)
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obj->pages = st;
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DRM_DEBUG_KMS("%s alloc %d pages\n", __FUNCTION__, page_count);
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// DRM_DEBUG_KMS("%s alloc %d pages\n", __FUNCTION__, page_count);
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return 0;
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@ -3511,7 +3508,7 @@ void i915_gem_free_object(struct drm_gem_object *gem_obj)
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// if (obj->phys_obj)
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// i915_gem_detach_phys_object(dev, obj);
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printf("%s obj %p\n", __FUNCTION__, obj);
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// printf("%s obj %p\n", __FUNCTION__, obj);
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obj->pin_count = 0;
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if (WARN_ON(i915_gem_object_unbind(obj) == -ERESTARTSYS)) {
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@ -3536,7 +3533,7 @@ void i915_gem_free_object(struct drm_gem_object *gem_obj)
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if(obj->base.filp != NULL)
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{
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printf("filp %p\n", obj->base.filp);
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// printf("filp %p\n", obj->base.filp);
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shmem_file_delete(obj->base.filp);
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}
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@ -2476,7 +2476,7 @@ void intel_irq_init(struct drm_device *dev)
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}
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}
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printf("device %p driver %p handler %p\n", dev, dev->driver, dev->driver->irq_handler) ;
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// printf("device %p driver %p handler %p\n", dev, dev->driver, dev->driver->irq_handler) ;
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}
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irqreturn_t intel_irq_handler(struct drm_device *dev)
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@ -15,7 +15,6 @@
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#include <syscall.h>
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#include "hmm.h"
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#include "bitmap.h"
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extern struct drm_device *main_device;
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@ -693,12 +692,13 @@ int i915_mask_update(struct drm_device *dev, void *data,
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GetWindowRect(&winrc);
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{
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static warn_count;
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// static warn_count;
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mask->width = winrc.right - winrc.left + 1;
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mask->height = winrc.bottom - winrc.top + 1;
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mask->bo_pitch = (mask->width+15) & ~15;
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#if 0
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if(warn_count < 1)
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{
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printf("left %d top %d right %d bottom %d\n",
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@ -706,6 +706,8 @@ int i915_mask_update(struct drm_device *dev, void *data,
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printf("mask pitch %d data %p\n", mask->bo_pitch, mask->bo_size);
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warn_count++;
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};
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#endif
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};
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@ -828,700 +830,6 @@ int i915_mask_update(struct drm_device *dev, void *data,
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#ifdef __HWA__
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extern struct hmm bm_mm;
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typedef struct
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{
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int left;
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int top;
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int right;
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int bottom;
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}rect_t;
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#include "clip.inc"
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void FASTCALL GetWindowRect(rect_t *rc)__asm__("GetWindowRect");
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#define CURRENT_TASK (0x80003000)
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static u32_t get_display_map()
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{
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u32_t addr;
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addr = (u32_t)os_display;
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addr+= sizeof(display_t); /* shoot me */
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return *(u32_t*)addr;
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}
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#define XY_COLOR_BLT ((2<<29)|(0x50<<22)|(0x4))
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#define XY_SRC_COPY_BLT_CMD ((2<<29)|(0x53<<22)|6)
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#define XY_SRC_COPY_CHROMA_CMD ((2<<29)|(0x73<<22)|8)
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#define ROP_COPY_SRC 0xCC
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#define FORMAT8888 3
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#define BLT_WRITE_ALPHA (1<<21)
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#define BLT_WRITE_RGB (1<<20)
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typedef int v4si __attribute__ ((vector_size (16)));
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static void
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i915_gem_execbuffer_retire_commands(struct drm_device *dev,
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struct drm_file *file,
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struct intel_ring_buffer *ring)
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{
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/* Unconditionally force add_request to emit a full flush. */
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ring->gpu_caches_dirty = true;
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/* Add a breadcrumb for the completion of the batch buffer */
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(void)i915_add_request(ring, file, NULL);
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}
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int srv_blit_bitmap(u32 hbitmap, int dst_x, int dst_y,
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int src_x, int src_y, u32 w, u32 h)
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{
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drm_i915_private_t *dev_priv = main_device->dev_private;
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struct intel_ring_buffer *ring;
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struct context *context;
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bitmap_t *bitmap;
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rect_t winrc;
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clip_t dst_clip;
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clip_t src_clip;
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u32_t width;
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u32_t height;
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u32_t br13, cmd, slot_mask, *b;
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u32_t offset;
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u8 slot;
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int n=0;
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int ret;
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if(unlikely(hbitmap==0))
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return -1;
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bitmap = (bitmap_t*)hmm_get_data(&bm_mm, hbitmap);
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if(unlikely(bitmap==NULL))
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return -1;
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context = get_context(main_device);
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if(unlikely(context == NULL))
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return -1;
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GetWindowRect(&winrc);
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{
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static warn_count;
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if(warn_count < 1)
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{
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printf("left %d top %d right %d bottom %d\n",
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winrc.left, winrc.top, winrc.right, winrc.bottom);
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printf("bitmap width %d height %d\n", w, h);
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warn_count++;
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};
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};
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dst_clip.xmin = 0;
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dst_clip.ymin = 0;
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dst_clip.xmax = winrc.right-winrc.left;
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dst_clip.ymax = winrc.bottom -winrc.top;
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src_clip.xmin = 0;
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src_clip.ymin = 0;
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src_clip.xmax = bitmap->width - 1;
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src_clip.ymax = bitmap->height - 1;
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width = w;
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height = h;
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if( blit_clip(&dst_clip, &dst_x, &dst_y,
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&src_clip, &src_x, &src_y,
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&width, &height) )
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return 0;
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dst_x+= winrc.left;
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dst_y+= winrc.top;
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slot = *((u8*)CURRENT_TASK);
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slot_mask = (u32_t)slot<<24;
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{
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#if 0
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static v4si write_mask = {0xFF000000, 0xFF000000,
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0xFF000000, 0xFF000000};
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u8* src_offset;
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u8* dst_offset;
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src_offset = (u8*)(src_y*bitmap->pitch + src_x*4);
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src_offset += (u32)bitmap->uaddr;
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dst_offset = (u8*)(dst_y*os_display->width + dst_x);
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dst_offset+= get_display_map();
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u32_t tmp_h = height;
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__asm__ __volatile__ (
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"movdqa %[write_mask], %%xmm7 \n"
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"movd %[slot_mask], %%xmm6 \n"
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"punpckldq %%xmm6, %%xmm6 \n"
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"punpcklqdq %%xmm6, %%xmm6 \n"
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:: [write_mask] "m" (write_mask),
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[slot_mask] "g" (slot_mask)
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:"xmm7", "xmm6");
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while( tmp_h--)
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{
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u32_t tmp_w = width;
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u8* tmp_src = src_offset;
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u8* tmp_dst = dst_offset;
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src_offset+= bitmap->pitch;
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dst_offset+= os_display->width;
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while( tmp_w >= 8 )
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{
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__asm__ __volatile__ (
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"movq (%0), %%xmm0 \n"
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"punpcklbw %%xmm0, %%xmm0 \n"
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"movdqa %%xmm0, %%xmm1 \n"
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"punpcklwd %%xmm0, %%xmm0 \n"
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"punpckhwd %%xmm1, %%xmm1 \n"
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"pcmpeqb %%xmm6, %%xmm0 \n"
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"pcmpeqb %%xmm6, %%xmm1 \n"
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"maskmovdqu %%xmm7, %%xmm0 \n"
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"addl $16, %%edi \n"
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"maskmovdqu %%xmm7, %%xmm1 \n"
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:: "r" (tmp_dst), "D" (tmp_src)
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:"xmm0", "xmm1");
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__asm__ __volatile__ ("":::"edi");
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tmp_w -= 8;
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tmp_src += 32;
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tmp_dst += 8;
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};
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if( tmp_w >= 4 )
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{
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__asm__ __volatile__ (
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"movd (%0), %%xmm0 \n"
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"punpcklbw %%xmm0, %%xmm0 \n"
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"punpcklwd %%xmm0, %%xmm0 \n"
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"pcmpeqb %%xmm6, %%xmm0 \n"
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"maskmovdqu %%xmm7, %%xmm0 \n"
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:: "r" (tmp_dst), "D" (tmp_src)
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:"xmm0");
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tmp_w -= 4;
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tmp_src += 16;
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tmp_dst += 4;
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};
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while( tmp_w--)
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{
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*(tmp_src+3) = (*tmp_dst==slot)?0xFF:0x00;
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tmp_src+=4;
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tmp_dst++;
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};
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};
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#else
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u8* src_offset;
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u8* dst_offset;
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u32 ifl;
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src_offset = (u8*)(src_y*bitmap->pitch + src_x*4);
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src_offset += (u32)bitmap->uaddr;
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dst_offset = (u8*)(dst_y*os_display->width + dst_x);
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dst_offset+= get_display_map();
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u32_t tmp_h = height;
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ifl = safe_cli();
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while( tmp_h--)
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{
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u32_t tmp_w = width;
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u8* tmp_src = src_offset;
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u8* tmp_dst = dst_offset;
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src_offset+= bitmap->pitch;
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dst_offset+= os_display->width;
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while( tmp_w--)
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{
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*(tmp_src+3) = (*tmp_dst==slot)?0xFF:0x00;
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tmp_src+=4;
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tmp_dst++;
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};
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};
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safe_sti(ifl);
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}
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#endif
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{
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static warn_count;
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if(warn_count < 1)
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{
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printf("blit width %d height %d\n",
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width, height);
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warn_count++;
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};
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};
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if((context->cmd_buffer & 0xFC0)==0xFC0)
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context->cmd_buffer&= 0xFFFFF000;
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b = (u32_t*)ALIGN(context->cmd_buffer,16);
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offset = context->cmd_offset + ((u32_t)b & 0xFFF);
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cmd = XY_SRC_COPY_CHROMA_CMD | BLT_WRITE_RGB | BLT_WRITE_ALPHA;
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cmd |= 3 << 17;
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br13 = os_display->pitch;
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br13|= ROP_COPY_SRC << 16;
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br13|= FORMAT8888 << 24;
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b[n++] = cmd;
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b[n++] = br13;
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b[n++] = (dst_y << 16) | dst_x; // left, top
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b[n++] = ((dst_y+height)<< 16)|(dst_x+width); // bottom, right
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b[n++] = 0; // destination
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b[n++] = (src_y << 16) | src_x; // source left & top
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b[n++] = bitmap->pitch; // source pitch
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b[n++] = bitmap->gaddr; // source
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b[n++] = 0; // Transparency Color Low
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b[n++] = 0x00FFFFFF; // Transparency Color High
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b[n++] = MI_BATCH_BUFFER_END;
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if( n & 1)
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b[n++] = MI_NOOP;
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context->cmd_buffer+= n*4;
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context->obj->base.pending_read_domains |= I915_GEM_DOMAIN_COMMAND;
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mutex_lock(&main_device->struct_mutex);
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i915_gem_object_set_to_gtt_domain(bitmap->obj, false);
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if (HAS_BLT(main_device))
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{
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u32 seqno;
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int i;
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ring = &dev_priv->ring[BCS];
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// printf("dispatch... ");
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i915_gem_object_sync(bitmap->obj, ring);
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intel_ring_invalidate_all_caches(ring);
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seqno = i915_gem_next_request_seqno(ring);
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// printf("seqno = %d\n", seqno);
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for (i = 0; i < ARRAY_SIZE(ring->sync_seqno); i++) {
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if (seqno < ring->sync_seqno[i]) {
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/* The GPU can not handle its semaphore value wrapping,
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* so every billion or so execbuffers, we need to stall
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* the GPU in order to reset the counters.
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*/
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DRM_DEBUG("wrap seqno\n");
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ret = i915_gpu_idle(main_device);
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if (ret)
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goto fail;
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i915_gem_retire_requests(main_device);
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BUG_ON(ring->sync_seqno[i]);
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}
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}
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ret = ring->dispatch_execbuffer(ring, offset, n*4);
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if (ret)
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goto fail;
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// printf("done\n");
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bitmap->obj->base.read_domains = bitmap->obj->base.pending_read_domains;
|
||||
bitmap->obj->base.write_domain = bitmap->obj->base.pending_write_domain;
|
||||
bitmap->obj->fenced_gpu_access = bitmap->obj->pending_fenced_gpu_access;
|
||||
|
||||
i915_gem_object_move_to_active(bitmap->obj, ring, seqno);
|
||||
|
||||
i915_gem_execbuffer_retire_commands(main_device, NULL, ring);
|
||||
// printf("retire\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
ring = &dev_priv->ring[RCS];
|
||||
ring->dispatch_execbuffer(ring, offset, n*4);
|
||||
ring->flush(ring, 0, I915_GEM_DOMAIN_RENDER);
|
||||
};
|
||||
|
||||
// bitmap->obj->base.read_domains = I915_GEM_DOMAIN_CPU;
|
||||
// bitmap->obj->base.write_domain = I915_GEM_DOMAIN_CPU;
|
||||
|
||||
mutex_unlock(&main_device->struct_mutex);
|
||||
fail:
|
||||
return ret;
|
||||
};
|
||||
|
||||
|
||||
#if 0
|
||||
|
||||
i915_gem_execbuffer_retire_commands(dev, ring);
|
||||
/* For display hotplug interrupt */
|
||||
static void
|
||||
ironlake_enable_display_irq(drm_i915_private_t *dev_priv, u32 mask)
|
||||
{
|
||||
if ((dev_priv->irq_mask & mask) != 0) {
|
||||
dev_priv->irq_mask &= ~mask;
|
||||
I915_WRITE(DEIMR, dev_priv->irq_mask);
|
||||
POSTING_READ(DEIMR);
|
||||
}
|
||||
}
|
||||
|
||||
static int ironlake_enable_vblank(struct drm_device *dev, int pipe)
|
||||
{
|
||||
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
|
||||
unsigned long irqflags;
|
||||
|
||||
// if (!i915_pipe_enabled(dev, pipe))
|
||||
// return -EINVAL;
|
||||
|
||||
spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
|
||||
ironlake_enable_display_irq(dev_priv, (pipe == 0) ?
|
||||
DE_PIPEA_VBLANK : DE_PIPEB_VBLANK);
|
||||
spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
static int i915_interrupt_info(struct drm_device *dev)
|
||||
{
|
||||
drm_i915_private_t *dev_priv = dev->dev_private;
|
||||
int ret, i, pipe;
|
||||
|
||||
if (!HAS_PCH_SPLIT(dev)) {
|
||||
dbgprintf("Interrupt enable: %08x\n",
|
||||
I915_READ(IER));
|
||||
dbgprintf("Interrupt identity: %08x\n",
|
||||
I915_READ(IIR));
|
||||
dbgprintf("Interrupt mask: %08x\n",
|
||||
I915_READ(IMR));
|
||||
for_each_pipe(pipe)
|
||||
dbgprintf("Pipe %c stat: %08x\n",
|
||||
pipe_name(pipe),
|
||||
I915_READ(PIPESTAT(pipe)));
|
||||
} else {
|
||||
dbgprintf("North Display Interrupt enable: %08x\n",
|
||||
I915_READ(DEIER));
|
||||
dbgprintf("North Display Interrupt identity: %08x\n",
|
||||
I915_READ(DEIIR));
|
||||
dbgprintf("North Display Interrupt mask: %08x\n",
|
||||
I915_READ(DEIMR));
|
||||
dbgprintf("South Display Interrupt enable: %08x\n",
|
||||
I915_READ(SDEIER));
|
||||
dbgprintf("South Display Interrupt identity: %08x\n",
|
||||
I915_READ(SDEIIR));
|
||||
dbgprintf("South Display Interrupt mask: %08x\n",
|
||||
I915_READ(SDEIMR));
|
||||
dbgprintf("Graphics Interrupt enable: %08x\n",
|
||||
I915_READ(GTIER));
|
||||
dbgprintf("Graphics Interrupt identity: %08x\n",
|
||||
I915_READ(GTIIR));
|
||||
dbgprintf("Graphics Interrupt mask: %08x\n",
|
||||
I915_READ(GTIMR));
|
||||
}
|
||||
dbgprintf("Interrupts received: %d\n",
|
||||
atomic_read(&dev_priv->irq_received));
|
||||
for (i = 0; i < I915_NUM_RINGS; i++) {
|
||||
if (IS_GEN6(dev) || IS_GEN7(dev)) {
|
||||
printf("Graphics Interrupt mask (%s): %08x\n",
|
||||
dev_priv->ring[i].name,
|
||||
I915_READ_IMR(&dev_priv->ring[i]));
|
||||
}
|
||||
// i915_ring_seqno_info(m, &dev_priv->ring[i]);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void execute_buffer (struct drm_i915_gem_object *buffer, uint32_t offset,
|
||||
int size)
|
||||
{
|
||||
struct intel_ring_buffer *ring;
|
||||
drm_i915_private_t *dev_priv = main_device->dev_private;
|
||||
u32 invalidate;
|
||||
u32 seqno = 2;
|
||||
|
||||
offset += buffer->gtt_offset;
|
||||
// dbgprintf("execute %x size %d\n", offset, size);
|
||||
|
||||
// asm volatile(
|
||||
// "mfence \n"
|
||||
// "wbinvd \n"
|
||||
// "mfence \n"
|
||||
// :::"memory");
|
||||
|
||||
ring = &dev_priv->ring[RCS];
|
||||
ring->dispatch_execbuffer(ring, offset, size);
|
||||
|
||||
invalidate = I915_GEM_DOMAIN_COMMAND;
|
||||
if (INTEL_INFO(main_device)->gen >= 4)
|
||||
invalidate |= I915_GEM_DOMAIN_SAMPLER;
|
||||
if (ring->flush(ring, invalidate, 0))
|
||||
i915_gem_next_request_seqno(ring);
|
||||
|
||||
ring->irq_get(ring);
|
||||
|
||||
ring->add_request(ring, &seqno);
|
||||
|
||||
// i915_interrupt_info(main_device);
|
||||
|
||||
};
|
||||
|
||||
|
||||
int blit_textured(u32 hbitmap, int dst_x, int dst_y,
|
||||
int src_x, int src_y, u32 w, u32 h)
|
||||
{
|
||||
drm_i915_private_t *dev_priv = main_device->dev_private;
|
||||
|
||||
bitmap_t *src_bitmap, *dst_bitmap;
|
||||
bitmap_t screen;
|
||||
|
||||
rect_t winrc;
|
||||
|
||||
// dbgprintf(" handle: %d dx %d dy %d sx %d sy %d w %d h %d\n",
|
||||
// hbitmap, dst_x, dst_y, src_x, src_y, w, h);
|
||||
|
||||
if(unlikely(hbitmap==0))
|
||||
return -1;
|
||||
|
||||
src_bitmap = (bitmap_t*)hman_get_data(&bm_man, hbitmap);
|
||||
// dbgprintf("bitmap %x\n", src_bitmap);
|
||||
|
||||
if(unlikely(src_bitmap==NULL))
|
||||
return -1;
|
||||
|
||||
GetWindowRect(&winrc);
|
||||
|
||||
screen.pitch = os_display->pitch;
|
||||
screen.gaddr = 0;
|
||||
screen.width = os_display->width;
|
||||
screen.height = os_display->height;
|
||||
screen.obj = (void*)-1;
|
||||
|
||||
dst_bitmap = &screen;
|
||||
|
||||
dst_x+= winrc.left;
|
||||
dst_y+= winrc.top;
|
||||
|
||||
sna_blit_copy(dst_bitmap, dst_x, dst_y, w, h, src_bitmap, src_x, src_y);
|
||||
|
||||
};
|
||||
|
||||
int sna_blit_tex(bitmap_t *dst_bitmap, int dst_x, int dst_y,
|
||||
int w, int h, bitmap_t *src_bitmap, int src_x, int src_y,
|
||||
bitmap_t *mask_bitmap);
|
||||
|
||||
|
||||
int blit_tex(u32 hbitmap, int dst_x, int dst_y,
|
||||
int src_x, int src_y, u32 w, u32 h)
|
||||
{
|
||||
drm_i915_private_t *dev_priv = main_device->dev_private;
|
||||
struct context *ctx;
|
||||
|
||||
bitmap_t *src_bitmap, *dst_bitmap;
|
||||
bitmap_t screen;
|
||||
int ret;
|
||||
|
||||
bitmap_t *mask_bitmap;
|
||||
rect_t winrc;
|
||||
|
||||
// dbgprintf(" handle: %d dx %d dy %d sx %d sy %d w %d h %d\n",
|
||||
// hbitmap, dst_x, dst_y, src_x, src_y, w, h);
|
||||
|
||||
if(unlikely(hbitmap==0))
|
||||
return -1;
|
||||
|
||||
src_bitmap = (bitmap_t*)hman_get_data(&bm_man, hbitmap);
|
||||
// dbgprintf("bitmap %x\n", src_bitmap);
|
||||
|
||||
if(unlikely(src_bitmap==NULL))
|
||||
return -1;
|
||||
|
||||
ctx = get_context();
|
||||
if(unlikely(ctx==NULL))
|
||||
{
|
||||
ret = create_context();
|
||||
if(ret!=0)
|
||||
return -1;
|
||||
|
||||
ctx = get_context();
|
||||
};
|
||||
|
||||
mask_bitmap = ctx->mask;
|
||||
|
||||
GetWindowRect(&winrc);
|
||||
dst_x+= winrc.left;
|
||||
dst_y+= winrc.top;
|
||||
|
||||
|
||||
if(ctx->seqno != os_display->mask_seqno)
|
||||
{
|
||||
u8* src_offset;
|
||||
u8* dst_offset;
|
||||
u32 slot;
|
||||
u32 ifl;
|
||||
|
||||
ret = gem_object_lock(mask_bitmap->obj);
|
||||
if(ret !=0 )
|
||||
{
|
||||
dbgprintf("%s fail\n", __FUNCTION__);
|
||||
return ret;
|
||||
};
|
||||
|
||||
// printf("width %d height %d\n", winrc.right, winrc.bottom);
|
||||
|
||||
mask_bitmap->width = winrc.right;
|
||||
mask_bitmap->height = winrc.bottom;
|
||||
mask_bitmap->pitch = ALIGN(w,64);
|
||||
|
||||
slot = *((u8*)CURRENT_TASK);
|
||||
// slot = 0x01;
|
||||
|
||||
slot|= (slot<<8)|(slot<<16)|(slot<<24);
|
||||
|
||||
|
||||
__asm__ __volatile__ (
|
||||
"movd %[slot], %%xmm6 \n"
|
||||
"punpckldq %%xmm6, %%xmm6 \n"
|
||||
"punpcklqdq %%xmm6, %%xmm6 \n"
|
||||
:: [slot] "m" (slot)
|
||||
:"xmm6");
|
||||
|
||||
src_offset = mask_bitmap->uaddr;
|
||||
|
||||
dst_offset = (u8*)(dst_y*os_display->width + dst_x);
|
||||
dst_offset+= get_display_map();
|
||||
|
||||
u32_t tmp_h = mask_bitmap->height;
|
||||
|
||||
ifl = safe_cli();
|
||||
while( tmp_h--)
|
||||
{
|
||||
int tmp_w = mask_bitmap->width;
|
||||
|
||||
u8* tmp_src = src_offset;
|
||||
u8* tmp_dst = dst_offset;
|
||||
|
||||
src_offset+= mask_bitmap->pitch;
|
||||
dst_offset+= os_display->width;
|
||||
|
||||
// while( tmp_w--)
|
||||
// {
|
||||
// *(tmp_src) = (*tmp_dst==slot)?0x1:0x00;
|
||||
// tmp_src++;
|
||||
// tmp_dst++;
|
||||
// };
|
||||
while(tmp_w >= 64)
|
||||
{
|
||||
__asm__ __volatile__ (
|
||||
"movdqu (%0), %%xmm0 \n"
|
||||
"movdqu 16(%0), %%xmm1 \n"
|
||||
"movdqu 32(%0), %%xmm2 \n"
|
||||
"movdqu 48(%0), %%xmm3 \n"
|
||||
"pcmpeqb %%xmm6, %%xmm0 \n"
|
||||
"pcmpeqb %%xmm6, %%xmm1 \n"
|
||||
"pcmpeqb %%xmm6, %%xmm2 \n"
|
||||
"pcmpeqb %%xmm6, %%xmm3 \n"
|
||||
"movdqa %%xmm0, (%%edi) \n"
|
||||
"movdqa %%xmm1, 16(%%edi) \n"
|
||||
"movdqa %%xmm2, 32(%%edi) \n"
|
||||
"movdqa %%xmm3, 48(%%edi) \n"
|
||||
|
||||
:: "r" (tmp_dst), "D" (tmp_src)
|
||||
:"xmm0","xmm1","xmm2","xmm3");
|
||||
tmp_w -= 64;
|
||||
tmp_src += 64;
|
||||
tmp_dst += 64;
|
||||
}
|
||||
|
||||
if( tmp_w >= 32 )
|
||||
{
|
||||
__asm__ __volatile__ (
|
||||
"movdqu (%0), %%xmm0 \n"
|
||||
"movdqu 16(%0), %%xmm1 \n"
|
||||
"pcmpeqb %%xmm6, %%xmm0 \n"
|
||||
"pcmpeqb %%xmm6, %%xmm1 \n"
|
||||
"movdqa %%xmm0, (%%edi) \n"
|
||||
"movdqa %%xmm1, 16(%%edi) \n"
|
||||
|
||||
:: "r" (tmp_dst), "D" (tmp_src)
|
||||
:"xmm0","xmm1");
|
||||
tmp_w -= 32;
|
||||
tmp_src += 32;
|
||||
tmp_dst += 32;
|
||||
}
|
||||
|
||||
while( tmp_w > 0 )
|
||||
{
|
||||
__asm__ __volatile__ (
|
||||
"movdqu (%0), %%xmm0 \n"
|
||||
"pcmpeqb %%xmm6, %%xmm0 \n"
|
||||
"movdqa %%xmm0, (%%edi) \n"
|
||||
:: "r" (tmp_dst), "D" (tmp_src)
|
||||
:"xmm0");
|
||||
tmp_w -= 16;
|
||||
tmp_src += 16;
|
||||
tmp_dst += 16;
|
||||
}
|
||||
};
|
||||
safe_sti(ifl);
|
||||
ctx->seqno = os_display->mask_seqno;
|
||||
}
|
||||
|
||||
screen.pitch = os_display->pitch;
|
||||
screen.gaddr = 0;
|
||||
screen.width = os_display->width;
|
||||
screen.height = os_display->height;
|
||||
screen.obj = (void*)-1;
|
||||
|
||||
dst_bitmap = &screen;
|
||||
|
||||
|
||||
sna_blit_tex(dst_bitmap, dst_x, dst_y, w, h, src_bitmap, src_x, src_y,
|
||||
mask_bitmap);
|
||||
|
||||
// asm volatile ("int3");
|
||||
};
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
void __stdcall run_workqueue(struct workqueue_struct *cwq)
|
||||
{
|
||||
unsigned long irqflags;
|
||||
|
||||
@ -82,7 +82,7 @@ u32_t drvEntry(int action, char *cmdline)
|
||||
return 0;
|
||||
};
|
||||
}
|
||||
dbgprintf("i915 RC 10\n cmdline: %s\n", cmdline);
|
||||
dbgprintf("i915 RC 10.5\n cmdline: %s\n", cmdline);
|
||||
|
||||
cpu_detect();
|
||||
dbgprintf("\ncache line size %d\n", x86_clflush_size);
|
||||
@ -93,7 +93,8 @@ u32_t drvEntry(int action, char *cmdline)
|
||||
|
||||
if(err)
|
||||
{
|
||||
dbgprintf("Epic Fail :(/n");
|
||||
dbgprintf("Epic Fail :(\n");
|
||||
return 0;
|
||||
};
|
||||
|
||||
err = RegService("DISPLAY", display_handler);
|
||||
|
||||
@ -29,8 +29,8 @@ struct file *shmem_file_setup(const char *name, loff_t size, unsigned long flags
|
||||
filep->allocated = 0;
|
||||
filep->vma = NULL;
|
||||
|
||||
printf("%s file %p pages %p count %d\n",
|
||||
__FUNCTION__,filep, filep->pages, count);
|
||||
// printf("%s file %p pages %p count %d\n",
|
||||
// __FUNCTION__,filep, filep->pages, count);
|
||||
|
||||
return filep;
|
||||
}
|
||||
@ -96,8 +96,8 @@ err:
|
||||
|
||||
void shmem_file_delete(struct file *filep)
|
||||
{
|
||||
printf("%s file %p pages %p count %d\n",
|
||||
__FUNCTION__, filep, filep->pages, filep->count);
|
||||
// printf("%s file %p pages %p count %d\n",
|
||||
// __FUNCTION__, filep, filep->pages, filep->count);
|
||||
|
||||
if(filep->pages)
|
||||
kfree(filep->pages);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user