forked from KolibriOS/kolibrios
311 lines
11 KiB
C
311 lines
11 KiB
C
/*
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Copyright (c) 1990-2007 Info-ZIP. All rights reserved.
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See the accompanying file LICENSE, version 2000-Apr-09 or later
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(the contents of which are also included in zip.h) for terms of use.
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If, for some reason, all these files are missing, the Info-ZIP license
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also may be found at: ftp://ftp.info-zip.org/pub/infozip/license.html
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*/
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/* crc_i386.c -- Microsoft 32-bit C/C++ adaptation of crc_i386.asm
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* Created by Rodney Brown from crc_i386.asm, modified by Chr. Spieler.
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* Last revised: 07-Jan-2007
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*
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* Original coded (in crc_i386.asm) and put into the public domain
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* by Paul Kienitz and Christian Spieler.
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*
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* Revised 06-Oct-96, Scott Field (sfield@microsoft.com)
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* fixed to assemble with masm by not using .model directive which makes
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* assumptions about segment alignment. Also,
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* avoid using loop, and j[e]cxz where possible. Use mov + inc, rather
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* than lodsb, and other misc. changes resulting in the following performance
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* increases:
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*
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* unrolled loops NO_UNROLLED_LOOPS
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* *8 >8 <8 *8 >8 <8
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*
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* +54% +42% +35% +82% +52% +25%
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*
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* first item in each table is input buffer length, even multiple of 8
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* second item in each table is input buffer length, > 8
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* third item in each table is input buffer length, < 8
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*
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* Revised 02-Apr-97, Chr. Spieler, based on Rodney Brown (rdb@cmutual.com.au)
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* Incorporated Rodney Brown's 32-bit-reads optimization as found in the
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* UNIX AS source crc_i386.S. This new code can be disabled by defining
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* the macro symbol NO_32_BIT_LOADS.
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*
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* Revised 12-Oct-97, Chr. Spieler, based on Rodney Brown (rdb@cmutual.com.au)
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* Incorporated Rodney Brown's additional tweaks for 32-bit-optimized CPUs
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* (like the Pentium Pro, Pentium II, and probably some Pentium clones).
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* This optimization is controlled by the macro symbol __686 and is disabled
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* by default. (This default is based on the assumption that most users
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* do not yet work on a Pentium Pro or Pentium II machine ...)
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*
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* Revised 16-Nov-97, Chr. Spieler: Made code compatible with Borland C++
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* 32-bit, removed unneeded kludge for potentially unknown movzx mnemonic,
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* confirmed correct working with MS VC++ (32-bit).
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*
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* Revised 22-May-98, Peter Kunath, Chr. Spieler: The 16-Nov-97 revision broke
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* MSVC 5.0. Inside preprocessor macros, each instruction is enclosed in its
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* own __asm {...} construct. For MSVC, a "#pragma warning" was added to
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* shut up the "no return value" warning message.
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*
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* Revised 13-Dec-98, Chr. Spieler: Modified path to "zip.h" header file.
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*
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* Revised 16-Jan-2005, Cosmin Truta: Added the ASM_CRC guard, for easier
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* switching between ASM vs. non-ASM builds, when handling makefiles.
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* Also enabled the 686 build by default, because there are hardly any
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* pre-686 CPUs in serious use nowadays. (See the 12-Oct-97 note above.)
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*
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* Revised 03-Jan-2006, Chr. Spieler
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* Enlarged unrolling loops to "do 16 bytes per turn"; optimized access to
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* data buffer in loop body (adjust pointer only once in loop body and use
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* offsets to access each item); added additional support for the "unfolded
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* tables" optimization variant (enabled by IZ_CRCOPTIM_UNFOLDTBL).
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*
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* Revised 07-Jan-2007, Chr. Spieler
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* Recognize additional conditional flag CRC_TABLE_ONLY that prevents
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* compilation of the crc32() function.
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*
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* FLAT memory model assumed.
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*
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* Loop unrolling can be disabled by defining the macro NO_UNROLLED_LOOPS.
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* This results in shorter code at the expense of reduced performance.
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*
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*/
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#include "../zip.h"
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#include "../crc32.h"
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#if defined(ASM_CRC) && !defined(USE_ZLIB) && !defined(CRC_TABLE_ONLY)
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#if !defined(PRE_686) && !defined(__686)
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# define __686
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#endif
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#ifndef ZCONST
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# define ZCONST const
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#endif
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/* Select wether the following inline-assember code is supported. */
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#if (defined(_MSC_VER) && _MSC_VER >= 700)
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#if (defined(_M_IX86) && _M_IX86 >= 300)
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# define MSC_INLINE_ASM_32BIT_SUPPORT
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/* Disable warning for no return value, typical of asm functions */
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# pragma warning( disable : 4035 )
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#endif
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#endif
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#if (defined(__BORLANDC__) && __BORLANDC__ >= 452)
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# define MSC_INLINE_ASM_32BIT_SUPPORT
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#endif
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#ifdef MSC_INLINE_ASM_32BIT_SUPPORT
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/* This code is intended for Microsoft C/C++ (32-bit) compatible compilers. */
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/*
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* These two (three) macros make up the loop body of the CRC32 cruncher.
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* registers modified:
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* eax : crc value "c"
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* esi : pointer to next data byte (or dword) "buf++"
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* registers read:
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* edi : pointer to base of crc_table array
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* scratch registers:
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* ebx : index into crc_table array
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* (requires upper three bytes = 0 when __686 is undefined)
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*/
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#ifndef __686
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#define Do_CRC { \
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__asm { mov bl, al }; \
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__asm { shr eax, 8 }; \
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__asm { xor eax, [edi+ebx*4] }; }
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#else /* __686 */
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#define Do_CRC { \
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__asm { movzx ebx, al }; \
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__asm { shr eax, 8 }; \
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__asm { xor eax, [edi+ebx*4] }; }
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#endif /* ?__686 */
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#define Do_CRC_byte { \
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__asm { xor al, byte ptr [esi] }; \
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__asm { inc esi }; \
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Do_CRC; }
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#define Do_CRC_byteof(ofs) { \
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__asm { xor al, byte ptr [esi+(ofs)] }; \
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Do_CRC; }
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#ifndef NO_32_BIT_LOADS
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#ifdef IZ_CRCOPTIM_UNFOLDTBL
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# define SavLen len /* the edx register is needed elsewhere */
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# define UpdCRC_dword { \
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__asm { movzx ebx,al }; \
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__asm { mov edx,[edi+ebx*4+3072] }; \
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__asm { movzx ebx,ah }; \
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__asm { shr eax,16 }; \
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__asm { xor edx,[edi+ebx*4+2048] }; \
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__asm { movzx ebx,al }; \
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__asm { shr eax,8 }; \
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__asm { xor edx,[edi+ebx*4+1024] }; \
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__asm { mov eax,[edi+eax*4] }; \
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__asm { xor eax,edx }; }
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# define UpdCRC_dword_sh(dwPtrIncr) { \
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__asm { movzx ebx,al }; \
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__asm { mov edx,[edi+ebx*4+3072] }; \
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__asm { movzx ebx,ah }; \
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__asm { xor edx,[edi+ebx*4+2048] }; \
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__asm { shr eax,16 }; \
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__asm { movzx ebx,al }; \
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__asm { add esi, 4*dwPtrIncr }; \
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__asm { shr eax,8 }; \
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__asm { xor edx,[edi+ebx*4+1024] }; \
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__asm { mov eax,[edi+eax*4] }; \
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__asm { xor eax,edx }; }
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#else /* !IZ_CRCOPTIM_UNFOLDTBL */
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# define SavLen edx /* the edx register is free for use here */
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# define UpdCRC_dword { \
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Do_CRC; \
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Do_CRC; \
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Do_CRC; \
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Do_CRC; }
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# define UpdCRC_dword_sh(dwPtrIncr) { \
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Do_CRC; \
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Do_CRC; \
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__asm { add esi, 4*(dwPtrIncr) }; \
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Do_CRC; \
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Do_CRC; }
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#endif /* ?IZ_CRCOPTIM_UNFOLDTBL */
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#define Do_CRC_dword { \
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__asm { xor eax, dword ptr [esi] }; \
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UpdCRC_dword_sh(1); }
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#define Do_CRC_4dword { \
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__asm { xor eax, dword ptr [esi] }; \
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UpdCRC_dword; \
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__asm { xor eax, dword ptr [esi+4] }; \
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UpdCRC_dword; \
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__asm { xor eax, dword ptr [esi+8] }; \
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UpdCRC_dword; \
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__asm { xor eax, dword ptr [esi+12] }; \
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UpdCRC_dword_sh(4); }
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#endif /* !NO_32_BIT_LOADS */
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/* ========================================================================= */
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ulg crc32(crc, buf, len)
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ulg crc; /* crc shift register */
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ZCONST uch *buf; /* pointer to bytes to pump through */
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extent len; /* number of bytes in buf[] */
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/* Run a set of bytes through the crc shift register. If buf is a NULL
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pointer, then initialize the crc shift register contents instead.
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Return the current crc in either case. */
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{
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__asm {
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push edx
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push ecx
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mov esi,buf ;/* 2nd arg: uch *buf */
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sub eax,eax ;/*> if (!buf) */
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test esi,esi ;/*> return 0; */
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jz fine ;/*> else { */
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call get_crc_table
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mov edi,eax
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mov eax,crc ;/* 1st arg: ulg crc */
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#ifndef __686
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sub ebx,ebx ;/* ebx=0; => bl usable as a dword */
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#endif
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mov ecx,len ;/* 3rd arg: extent len */
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not eax ;/*> c = ~crc; */
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test ecx,ecx
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#ifndef NO_UNROLLED_LOOPS
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jz bail
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# ifndef NO_32_BIT_LOADS
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align_loop:
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test esi,3 ;/* align buf pointer on next */
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jz aligned_now ;/* dword boundary */
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}
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Do_CRC_byte ;
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__asm {
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dec ecx
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jnz align_loop
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aligned_now:
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# endif /* !NO_32_BIT_LOADS */
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mov SavLen,ecx ;/* save current len for later */
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shr ecx,4 ;/* ecx = len / 16 */
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jz No_Sixteens
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; align loop head at start of 486 internal cache line !!
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align 16
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Next_Sixteen:
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}
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# ifndef NO_32_BIT_LOADS
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Do_CRC_4dword ;
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# else /* NO_32_BIT_LOADS */
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Do_CRC_byteof(0) ;
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Do_CRC_byteof(1) ;
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Do_CRC_byteof(2) ;
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Do_CRC_byteof(3) ;
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Do_CRC_byteof(4) ;
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Do_CRC_byteof(5) ;
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Do_CRC_byteof(6) ;
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Do_CRC_byteof(7) ;
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Do_CRC_byteof(8) ;
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Do_CRC_byteof(9) ;
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Do_CRC_byteof(10) ;
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Do_CRC_byteof(11) ;
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Do_CRC_byteof(12) ;
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Do_CRC_byteof(13) ;
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Do_CRC_byteof(14) ;
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Do_CRC_byteof(15) ;
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__asm { add esi,16 };
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# endif /* ?NO_32_BIT_LOADS */
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__asm {
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dec ecx
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jnz Next_Sixteen
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No_Sixteens:
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mov ecx,SavLen
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and ecx,00000000FH ;/* ecx = len % 16 */
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# ifndef NO_32_BIT_LOADS
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shr ecx,2
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jz No_Fours
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Next_Four:
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}
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Do_CRC_dword ;
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__asm {
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dec ecx
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jnz Next_Four
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No_Fours:
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mov ecx,SavLen
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and ecx,000000003H ;/* ecx = len % 4 */
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# endif /* !NO_32_BIT_LOADS */
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#endif /* !NO_UNROLLED_LOOPS */
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jz bail ;/*> if (len) */
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; align loop head at start of 486 internal cache line !!
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align 16
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loupe: ;/*> do { */
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}
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Do_CRC_byte ;/* c = CRC32(c,*buf++,crctab);*/
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__asm {
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dec ecx ;/*> } while (--len); */
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jnz loupe
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bail: ;/*> } */
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not eax ;/*> return ~c; */
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fine:
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pop ecx
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pop edx
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}
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#ifdef NEED_RETURN
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return _EAX;
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#endif
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}
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#endif /* MSC_INLINE_ASM_32BIT_SUPPORT */
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#if (defined(_MSC_VER) && _MSC_VER >= 700)
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#if (defined(_M_IX86) && _M_IX86 >= 300)
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/* Reenable missing return value warning */
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# pragma warning( default : 4035 )
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#endif
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#endif
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#endif /* ASM_CRC && !USE_ZLIB && !CRC_TABLE_ONLY */
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