forked from KolibriOS/kolibrios
a03882245a
git-svn-id: svn://kolibrios.org@8327 a494cfbc-eb01-0410-851d-a64ba20cac60
777 lines
17 KiB
C
Executable File
777 lines
17 KiB
C
Executable File
#include "SoC.h"
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#include "CPU.h"
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#include "MMU.h"
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#include "mem.h"
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#include "callout_RAM.h"
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#include "RAM.h"
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#include "cp15.h"
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#include "math64.h"
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#include "pxa255_IC.h"
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#include "pxa255_TIMR.h"
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#include "pxa255_RTC.h"
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#include "pxa255_UART.h"
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#include "pxa255_PwrClk.h"
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#include "pxa255_GPIO.h"
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#include "pxa255_DMA.h"
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#include "pxa255_DSP.h"
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#include "pxa255_LCD.h"
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#ifdef EMBEDDED
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#include <avr/io.h>
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#endif
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#define ERR(s) do{err_str(s " Halting\r\n"); while(1); }while(0)
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static const UInt8 embedded_boot[] = {
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0x01, 0x00, 0x8F, 0xE2, 0x10, 0xFF, 0x2F, 0xE1, 0x04, 0x27, 0x01, 0x20, 0x00, 0x21, 0x00, 0xF0,
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0x0D, 0xF8, 0x0A, 0x24, 0x24, 0x07, 0x65, 0x1C, 0x05, 0x27, 0x00, 0x22, 0x00, 0xF0, 0x06, 0xF8,
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0x20, 0x60, 0x24, 0x1D, 0x49, 0x1C, 0x80, 0x29, 0xF8, 0xD1, 0x28, 0x47, 0xBC, 0x46, 0xBB, 0xBB,
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0x70, 0x47
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};
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#define ROM_BASE 0x00000000UL
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#define ROM_SIZE sizeof(embedded_boot)
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#define RAM_BASE 0xA0000000UL
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#define RAM_SIZE 0x01000000UL //16M @ 0xA0000000
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static Boolean vMemF(ArmCpu* cpu, void* buf, UInt32 vaddr, UInt8 size, Boolean write, Boolean priviledged, UInt8* fsrP){
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SoC* soc = cpu->userData;
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UInt32 pa;
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if(size & (size - 1)){ //size is not a power of two
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return false;
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}
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if(vaddr & (size - 1)){ //bad alignment
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return false;
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}
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return mmuTranslate(&soc->mmu, vaddr, priviledged, write, &pa, fsrP) && memAccess(&soc->mem, pa, size, write, buf);
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}
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static Boolean hyperF(ArmCpu* cpu){ //return true if handled
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SoC* soc = cpu->userData;
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if(cpu->regs[12] == 0){
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err_str("Hypercall 0 caught\r\n");
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soc->go = false;
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}
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else if(cpu->regs[12] == 1){
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err_dec(cpu->regs[0]);
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}
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else if(cpu->regs[12] == 2){
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char x[2];
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x[1] = 0;
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x[0] = cpu->regs[0];
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err_str(x);
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}
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else if(cpu->regs[12] == 3){ //get ram size
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cpu->regs[0] = RAM_SIZE;
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}
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else if(cpu->regs[12] == 4){ //block device access perform [do a read or write]
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//IN:
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// R0 = op
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// R1 = sector
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return soc->blkF(soc->blkD, cpu->regs[1], soc->blkDevBuf, cpu->regs[0]);
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}
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else if(cpu->regs[12] == 5){ //block device buffer access [read or fill emulator's buffer]
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//IN:
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// R0 = word value
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// R1 = word offset (0, 1, 2...)
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// R2 = op (1 = write, 0 = read)
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//OUT:
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// R0 = word value
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if(cpu->regs[1] >= BLK_DEV_BLK_SZ / sizeof(UInt32)) return false; //invalid request
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if(cpu->regs[2] == 0){
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cpu->regs[0] = soc->blkDevBuf[cpu->regs[1]];
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}
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else if(cpu->regs[2] == 1){
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soc->blkDevBuf[cpu->regs[1]] = cpu->regs[0];
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}
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else return false;
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}
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return true;
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}
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static void setFaultAdrF(ArmCpu* cpu, UInt32 adr, UInt8 faultStatus){
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SoC* soc = cpu->userData;
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cp15SetFaultStatus(&soc->cp15, adr, faultStatus);
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}
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static void emulErrF(_UNUSED_ ArmCpu* cpu, const char* str){
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err_str("Emulation error: <<");
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err_str(str);
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err_str(">> halting\r\n");
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while(1);
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}
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static Boolean pMemReadF(void* userData, UInt32* buf, UInt32 pa){ //for DMA engine and MMU pagetable walks
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ArmMem* mem = userData;
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return memAccess(mem, pa, 4, false, buf);
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}
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static void dumpCpuState(ArmCpu* cpu, char* label){
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UInt8 i;
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if(label){
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err_str("CPU ");
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err_str(label);
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err_str("\r\n");
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}
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for(i = 0; i < 16; i++){
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err_str("R");
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err_dec(i);
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err_str("\t= 0x");
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err_hex(cpuGetRegExternal(cpu, i));
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err_str("\r\n");
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}
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err_str("CPSR\t= 0x");
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err_hex(cpuGetRegExternal(cpu, ARM_REG_NUM_CPSR));
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err_str("\r\nSPSR\t= 0x");
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err_hex(cpuGetRegExternal(cpu, ARM_REG_NUM_SPSR));
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err_str("\r\n");
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}
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static UInt16 socUartPrvRead(void* userData){ //these are special funcs since they always get their own userData - the uart :)
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SoC* soc = userData;
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UInt16 v;
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int r;
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r = soc->rcF();
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if(r == CHAR_CTL_C) v = UART_CHAR_BREAK;
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else if(r == CHAR_NONE) v = UART_CHAR_NONE;
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else if(r >= 0x100) v = UART_CHAR_NONE; //we canot send this char!!!
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else v = r;
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return v;
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}
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static void socUartPrvWrite(UInt16 chr, void* userData){ //these are special funcs since they always get their own userData - the uart :)
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SoC* soc = userData;
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if(chr == UART_CHAR_NONE) return;
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soc->wcF(chr);
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}
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void LinkError_SIZEOF_STRUCT_SOC_wrong();
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void socRamModeAlloc(SoC* soc, _UNUSED_ void* ignored){
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UInt32* ramB = emu_alloc(RAM_SIZE);
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if(!ramB) ERR("Cannot allocate RAM buffer");
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if(!ramInit(&soc->ram.RAM, &soc->mem, RAM_BASE, RAM_SIZE, ramB)) ERR("Cannot init RAM");
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soc->calloutMem = false;
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}
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void socRamModeCallout(SoC* soc, void* callout){
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if(!coRamInit(&soc->ram.coRAM, &soc->mem, RAM_BASE, RAM_SIZE, callout)) ERR("Cannot init coRAM");
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soc->calloutMem = true;
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}
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#define ERR_(s) ERR("error");
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void socInit(SoC* soc, SocRamAddF raF, void*raD, readcharF rc, writecharF wc, blockOp blkF, void* blkD){
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printf ("SoC init! \n");
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Err e;
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soc->rcF = rc;
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soc->wcF = wc;
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soc->blkF = blkF;
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soc->blkD = blkD;
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soc->go = true;
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e = cpuInit(&soc->cpu, ROM_BASE, vMemF, emulErrF, hyperF, &setFaultAdrF);
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if(e){
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err_str("Failed to init CPU: ");
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// err_dec(e);
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// err_str(". Halting\r\n");
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while(1);
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}
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printf("CPU init\n");
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soc->cpu.userData = soc;
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memInit(&soc->mem);
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mmuInit(&soc->mmu, pMemReadF, &soc->mem);
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printf("Init complete\n");
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if(ROM_SIZE > sizeof(soc->romMem)) {
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// err_str("Failed to init CPU: ");
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err_str("ROM_SIZE to small");
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// err_str(". Halting\r\n");
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while(1);
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}
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printf("RAF\n");
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raF(soc, raD);
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if(!ramInit(&soc->ROM, &soc->mem, ROM_BASE, ROM_SIZE, soc->romMem)) ERR_("Cannot init ROM");
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cp15Init(&soc->cp15, &soc->cpu, &soc->mmu);
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__mem_copy(soc->romMem, embedded_boot, sizeof(embedded_boot));
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printf("Things...\n");
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if(!pxa255icInit(&soc->ic, &soc->cpu, &soc->mem)) ERR_("Cannot init PXA255's interrupt controller");
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if(!pxa255timrInit(&soc->timr, &soc->mem, &soc->ic)) ERR_("Cannot init PXA255's OS timers");
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if(!pxa255rtcInit(&soc->rtc, &soc->mem, &soc->ic)) ERR_("Cannot init PXA255's RTC");
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if(!pxa255uartInit(&soc->ffuart, &soc->mem, &soc->ic,PXA255_FFUART_BASE, PXA255_I_FFUART)) ERR_("Cannot init PXA255's FFUART");
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if(!pxa255uartInit(&soc->btuart, &soc->mem, &soc->ic,PXA255_BTUART_BASE, PXA255_I_BTUART)) ERR_("Cannot init PXA255's BTUART");
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if(!pxa255uartInit(&soc->stuart, &soc->mem, &soc->ic,PXA255_STUART_BASE, PXA255_I_STUART)) ERR_("Cannot init PXA255's STUART");
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if(!pxa255pwrClkInit(&soc->pwrClk, &soc->cpu, &soc->mem)) ERR_("Cannot init PXA255's Power and Clock manager");
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if(!pxa255gpioInit(&soc->gpio, &soc->mem, &soc->ic)) ERR_("Cannot init PXA255's GPIO controller");
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if(!pxa255dmaInit(&soc->dma, &soc->mem, &soc->ic)) ERR_("Cannot init PXA255's DMA controller");
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if(!pxa255dspInit(&soc->dsp, &soc->cpu)) ERR_("Cannot init PXA255's cp0 DSP");
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if(!pxa255lcdInit(&soc->lcd, &soc->mem, &soc->ic)) ERR_("Cannot init PXA255's LCD controller");
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printf("go?\n");
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pxa255uartSetFuncs(&soc->ffuart, socUartPrvRead, socUartPrvWrite, soc);
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}
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void gdbCmdWait(SoC* soc, unsigned gdbPort, int* ss);
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void socRun(SoC* soc, UInt32 gdbPort){
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printf("go2?\n");
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UInt32 prevRtc = 0;
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UInt32 cyclesCapt = 0;
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UInt32 cycles = 0; //make 64 if you REALLY need it... later
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#ifdef GDB_SUPPORT
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int ss = 1; //for gdb stub single step
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#else
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gdbPort = 0; //use the param somehow to quiet GCC
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#endif
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printf("run !\n");
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while(soc->go){
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//printf("Soc go...\n");
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cycles++;
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#ifdef EMBEDDED
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if(!(PIND & 0x10)){ //btn down
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if(!prevRtc){
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do{
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prevRtc = gRtc;
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}while(prevRtc != gRtc);
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cyclesCapt = 0;
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}
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else{
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UInt32 t;
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//we only care to go on if the rtc is now different
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do{
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t = gRtc;
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}while(t != gRtc);
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if(t != prevRtc){
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if(!cyclesCapt){
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//this code assumes we're called often enough that the next rtc vals we see is the NEXT second, not the one after or any other such thing
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cyclesCapt = cycles;
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prevRtc = t;
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}
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else{
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err_dec(cycles - cyclesCapt);
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err_str(" Hz\r\n");
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cyclesCapt = 0;
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prevRtc = 0;
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}
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}
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}
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}
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#endif
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if(!(cycles & 0x00000FUL)) pxa255timrTick(&soc->timr);
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if(!(cycles & 0x0000FFUL)) pxa255uartProcess(&soc->ffuart);
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if(!(cycles & 0x000FFFUL)) pxa255rtcUpdate(&soc->rtc);
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if(!(cycles & 0x01FFFFUL)) pxa255lcdFrame(&soc->lcd);
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#ifdef GDB_SUPPORT
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gdbCmdWait(soc, gdbPort, &ss);
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#endif
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cpuCycle(&soc->cpu);
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}
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}
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#ifdef GDB_SUPPORT
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#include <sys/socket.h>
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#include <sys/time.h>
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#include <sys/types.h>
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#include <sys/select.h>
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#include <unistd.h>
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#include <errno.h>
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#include <stdlib.h>
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#include <netinet/in.h>
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#include <string.h>
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#include <stdio.h>
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static int socdBkptDel(SoC* soc, UInt32 addr, UInt8 sz){
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UInt8 i;
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for(i = 0; i < soc->nBkpt; i++){
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if(soc->bkpt[i] == addr){
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soc->nBkpt--;
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soc->bkpt[i] = soc->bkpt[soc->nBkpt];
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i--;
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}
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}
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return 1;
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}
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static int socdBkptAdd(SoC* soc, UInt32 addr, UInt8 sz){ //boolean
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socdBkptDel(soc, addr, sz);
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if(soc->nBkpt == MAX_BKPT) return 0;
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soc->bkpt[soc->nBkpt++] = addr;
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return 1;
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}
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static int socdWtpDel(SoC* soc, UInt32 addr, UInt8 sz){
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UInt8 i;
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for(i = 0; i < soc->nWtp; i++){
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if(soc->wtpA[i] == addr && soc->wtpS[i] == sz){
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soc->nWtp--;
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soc->wtpA[i] = soc->wtpA[soc->nWtp];
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soc->wtpS[i] = soc->wtpS[soc->nWtp];
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i--;
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}
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}
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return 1;
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}
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static int socdWtpAdd(SoC* soc, UInt32 addr, UInt8 sz){ //boolean
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socdWtpDel(soc, addr, sz);
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if(soc->nWtp == MAX_WTP) return 0;
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soc->wtpA[soc->nWtp] = addr;
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soc->wtpS[soc->nWtp] = sz;
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soc->nWtp++;
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return 1;
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}
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UInt32 htoi(const char** cP){
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UInt32 i = 0;
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const char* in = *cP;
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char c;
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while((c = *in) != 0){
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if(c >= '0' && c <= '9') i = (i * 16) + (c - '0');
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else if(c >= 'a' && c <= 'f') i = (i * 16) + (c + 10 - 'a');
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else if(c >= 'A' && c <= 'F') i = (i * 16) + (c + 10 - 'A');
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else break;
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in++;
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}
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*cP = in;
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return i;
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}
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static UInt32 swap32(UInt32 x){
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return ((x >> 24) & 0xff) | ((x >> 8) & 0xff00) | ((x & 0xff00) << 8) | ((x & 0xff) << 24);
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}
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int gdb_memAccess(SoC* soc, UInt32 addr, UInt8* buf, int write){
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UInt32 pa = 0;
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UInt8 fsr = 0;
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return mmuTranslate(&soc->mmu, addr, true, false, &pa, &fsr) && memAccess(&soc->mem, pa, 1, write | 0x80, buf);
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}
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static int addRegToStr(SoC* soc, char* str, int reg){
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if(reg == 0x19 || reg < 0x10){
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if(reg == 0x19) reg = ARM_REG_NUM_CPSR;
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sprintf(str + strlen(str), "%08x", swap32(cpuGetRegExternal(&soc->cpu, reg)));
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}
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else if(reg >= 0x10 && reg < 0x18){
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strcat(str, "000000000000000000000000");
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}
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else if(reg == 0x18){ //fps
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strcat(str, "00000000");
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}
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else return 0;
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return 1;
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}
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static int interpPacket(SoC* soc,const char* in, char* out, int* ss){ //return 0 if we failed to interp a command, 1 is all ok, -1 to send no reply and run
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ArmCpu* cpu = &soc->cpu;
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unsigned char c;
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unsigned addr, len;
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unsigned char* ptr;
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int i;
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int ret = 1;
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if(strcmp(in, "qSupported") == 0){
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strcpy(out, "PacketSize=99");
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}
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else if(strcmp(in, "vCont?") == 0){
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out[0] = 0;
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}
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else if(strcmp(in, "s") == 0){ //single step
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*ss = 1;
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return -1;
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}
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else if(strcmp(in, "c") == 0 || in[0] == 'C'){ //continue [with signal, which we ignore]
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return -1;
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}
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else if(in[0] == 'Z' || in[0] == 'z'){
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char op = in[0];
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char type = in[1];
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int (*f)(SoC* soc, UInt32 addr, UInt8 sz) = NULL;
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in += 3;
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addr = htoi(&in);
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if(*in++ != ',') goto fail; //no comma?
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len = htoi(&in);
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if(*in) goto fail; //string not over?
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if(type == '0' || type == '1'){ //bkpt
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f = (op == 'Z') ? socdBkptAdd : socdBkptDel;
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}
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/*
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else if(type == '2' || type == '3'){ //wtp
|
|
|
|
f = (op == 'Z') ? socdWtpAdd : socdWtpDel;
|
|
}
|
|
else goto fail;
|
|
*/
|
|
strcpy(out,f(soc, addr, len) ? "OK" : "e00");
|
|
}
|
|
else if(in[0] == 'H' && (in[1] == 'c' || in[1] == 'g')){
|
|
strcpy(out, "OK");
|
|
}
|
|
else if(in[0] == 'q'){
|
|
|
|
if(in[1] == 'C'){
|
|
|
|
strcpy(out, "");
|
|
}
|
|
else if(strcmp(in +1, "Offsets") == 0){
|
|
|
|
strcpy(out, "Text=0;Data=0;Bss=0");
|
|
}
|
|
else goto fail;
|
|
}
|
|
else if(in[0] == 'p'){ //read register
|
|
|
|
in++;
|
|
i = htoi(&in);
|
|
if(*in) goto fail; //string not over?
|
|
|
|
out[0] = 0;
|
|
if(!addRegToStr(soc, out, i)) goto fail;
|
|
}
|
|
else if(strcmp(in, "g") == 0){ //read all registers
|
|
|
|
out[0] = 0;
|
|
for(i = 0; i < 0x1a; i++) if(!addRegToStr(soc, out, i)) goto fail;
|
|
}
|
|
else if(in[0] == 'P'){ //write register
|
|
|
|
in++;
|
|
i = htoi(&in);
|
|
if(*in++ != '=') goto fail; //string not over?
|
|
if(i == 0x19 || i <16){
|
|
if(i == 0x19) i = ARM_REG_NUM_CPSR;
|
|
addr = htoi(&in);
|
|
sprintf(out, "OK");
|
|
cpuSetReg(cpu, i, addr);
|
|
}
|
|
else strcpy(out,"e00");
|
|
}
|
|
else if(in[0] == 'm'){ //read memory
|
|
|
|
in++;
|
|
addr = htoi(&in);
|
|
if(*in++ != ',') goto fail;
|
|
len = htoi(&in);
|
|
if(*in) goto fail;
|
|
out[0] = 0;
|
|
while(len--){
|
|
|
|
if(!gdb_memAccess(soc, addr++, &c, false)) break;
|
|
sprintf(out + strlen(out), "%02x", c);
|
|
}
|
|
}
|
|
else if(strcmp(in, "?") == 0){
|
|
|
|
strcpy(out,"S05");
|
|
}
|
|
else goto fail;
|
|
|
|
send_pkt:
|
|
return ret;
|
|
|
|
fail:
|
|
out[0] = 0;
|
|
ret = 0;
|
|
goto send_pkt;
|
|
}
|
|
|
|
static void sendpacket(int sock, char* packet, int withAck){
|
|
|
|
unsigned int c;
|
|
int i;
|
|
|
|
c = 0;
|
|
for(i = 0; i < strlen(packet); i++) c += packet[i];
|
|
memmove(packet + (withAck ? 2 : 1), packet, strlen(packet) + 1);
|
|
if(withAck){
|
|
packet[0] = '+';
|
|
packet[1] = '$';
|
|
}
|
|
else{
|
|
packet[0] = '$';
|
|
}
|
|
sprintf(packet + strlen(packet), "#%02x", c & 0xFF);
|
|
|
|
//printf("sending packet <<%s>>\n", packet);
|
|
send(sock, packet, strlen(packet), 0);
|
|
}
|
|
|
|
void gdbCmdWait(SoC* soc, unsigned gdbPort, int* ss){
|
|
|
|
ArmCpu* cpu = &soc->cpu;
|
|
static int running = 0;
|
|
static int sock = -1;
|
|
char packet[4096];
|
|
struct timeval tv = {0};
|
|
fd_set set;
|
|
int ret;
|
|
|
|
if(*ss && running){
|
|
|
|
strcpy(packet,"S05");
|
|
sendpacket(sock, packet, 0);
|
|
running = 0; //perform single step
|
|
}
|
|
*ss = 0;
|
|
|
|
if(running){ //check for breakpoints
|
|
|
|
UInt8 i;
|
|
|
|
for(i = 0; i < soc->nBkpt; i++){
|
|
|
|
if(soc->cpu.regs[15] == soc->bkpt[i]){
|
|
|
|
// printf("bkpt hit: pc=0x%08lX bk=0x%08lX i=%d\n", soc->cpu.regs[15], soc->bkpt[i], i);
|
|
strcpy(packet,"S05");
|
|
sendpacket(sock, packet, 0);
|
|
running = 0; //perform breakpoint hit
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
if(gdbPort){
|
|
|
|
if(sock == -1){ //no socket yet - make one
|
|
|
|
struct sockaddr_in sa = {AF_INET, htons(gdbPort)};
|
|
socklen_t sl = sizeof(sa);
|
|
|
|
inet_aton("127.0.0.1", &sa.sin_addr.s_addr);
|
|
|
|
sock = socket(PF_INET, SOCK_STREAM, 0);
|
|
if(sock == -1){
|
|
err_str("gdb socket creation fails: ");
|
|
err_dec(errno);
|
|
ERR("\n");
|
|
}
|
|
|
|
ret = bind(sock, (struct sockaddr*)&sa, sizeof(sa));
|
|
if(ret){
|
|
err_str("gdb socket bind fails: ");
|
|
err_dec(errno);
|
|
ERR("\n");
|
|
}
|
|
|
|
ret = listen(sock, 1);
|
|
if(ret){
|
|
err_str("gdb socket listen fails: ");
|
|
err_dec(errno);
|
|
ERR("\n");
|
|
}
|
|
|
|
ret = accept(sock, (struct sockaddr*)&sa, &sl);
|
|
if(ret == -1){
|
|
err_str("gdb socket accept fails: ");
|
|
err_dec(errno);
|
|
ERR("\n");
|
|
}
|
|
close(sock);
|
|
sock = ret;
|
|
|
|
soc->nBkpt = 0;
|
|
soc->nWtp = 0;
|
|
}
|
|
}
|
|
if(gdbPort){
|
|
|
|
do{
|
|
|
|
FD_ZERO(&set);
|
|
FD_SET(sock, &set);
|
|
tv.tv_sec = running ? 0 : 0x00f00000UL;
|
|
do{
|
|
ret = select(sock + 1, &set, NULL, NULL, &tv);
|
|
}while(!ret && !running);
|
|
if(ret < 0){
|
|
err_str("select fails: ");
|
|
err_dec(errno);
|
|
ERR("\n");
|
|
}
|
|
if(ret > 0){
|
|
char c;
|
|
char* p;
|
|
int i, len = 0, esc = 0, end = 0;
|
|
|
|
ret = recv(sock, &c, 1, 0);
|
|
if(ret != 1) ERR("failed to receive byte (1)\n");
|
|
|
|
if(c == 3){
|
|
strcpy(packet,"S11");
|
|
sendpacket(sock, packet, 0);
|
|
running = 0; //perform breakpoint hit
|
|
}
|
|
else if(c != '$'){
|
|
//printf("unknown packet header '%c'\n", c);
|
|
}
|
|
else{
|
|
do{
|
|
if(esc){
|
|
c = c ^ 0x20;
|
|
esc = 0;
|
|
}
|
|
else if(c == 0x7d){
|
|
esc = 1;
|
|
}
|
|
|
|
if(!esc){ //we cannot be here if we're being escaped
|
|
|
|
packet[len++] = c;
|
|
if(end == 0 && c == '#') end = 2;
|
|
else if(end){
|
|
|
|
end--;
|
|
if(!end) break;
|
|
}
|
|
|
|
ret = recv(sock, &c, 1, 0);
|
|
if(ret != 1) ERR("failed to receive byte (2)\n");
|
|
}
|
|
}while(1);
|
|
packet[len] = 0;
|
|
|
|
memmove(packet, packet + 1, len);
|
|
len -= 4;
|
|
packet[len] = 0;
|
|
ret = interpPacket(soc, p = strdup(packet), packet, ss);
|
|
if(ret == 0) printf("how do i respond to packet <<%s>>\n", p);
|
|
if(ret == -1){ //ack it anyways
|
|
char c = '+';
|
|
send(sock, &c, 1, 0);
|
|
running = 1;
|
|
}
|
|
else sendpacket(sock, packet, 1);
|
|
|
|
emu_free(p);
|
|
}
|
|
}
|
|
}while(!running);
|
|
}
|
|
}
|
|
|
|
#endif
|