forked from KolibriOS/kolibrios
1086 lines
33 KiB
C
1086 lines
33 KiB
C
/*
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* Copyright © 1997-2003 by The XFree86 Project, Inc.
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* Copyright © 2007 Dave Airlie
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* Copyright © 2007-2008 Intel Corporation
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* Jesse Barnes <jesse.barnes@intel.com>
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* Copyright 2005-2006 Luc Verhaegen
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* Copyright (c) 2001, Andy Ritger aritger@nvidia.com
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Except as contained in this notice, the name of the copyright holder(s)
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* and author(s) shall not be used in advertising or otherwise to promote
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* the sale, use or other dealings in this Software without prior written
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* authorization from the copyright holder(s) and author(s).
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*/
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#include <linux/list.h>
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#include <linux/list_sort.h>
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#include <linux/export.h>
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#include <drm/drmP.h>
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#include <drm/drm_crtc.h>
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/**
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* drm_mode_debug_printmodeline - debug print a mode
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* @dev: DRM device
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* @mode: mode to print
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*
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* LOCKING:
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* None.
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*
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* Describe @mode using DRM_DEBUG.
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*/
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void drm_mode_debug_printmodeline(const struct drm_display_mode *mode)
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{
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DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d "
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"0x%x 0x%x\n",
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mode->base.id, mode->name, mode->vrefresh, mode->clock,
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mode->hdisplay, mode->hsync_start,
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mode->hsync_end, mode->htotal,
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mode->vdisplay, mode->vsync_start,
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mode->vsync_end, mode->vtotal, mode->type, mode->flags);
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}
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EXPORT_SYMBOL(drm_mode_debug_printmodeline);
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/**
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* drm_cvt_mode -create a modeline based on CVT algorithm
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* @dev: DRM device
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* @hdisplay: hdisplay size
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* @vdisplay: vdisplay size
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* @vrefresh : vrefresh rate
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* @reduced : Whether the GTF calculation is simplified
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* @interlaced:Whether the interlace is supported
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*
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* LOCKING:
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* none.
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*
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* return the modeline based on CVT algorithm
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*
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* This function is called to generate the modeline based on CVT algorithm
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* according to the hdisplay, vdisplay, vrefresh.
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* It is based from the VESA(TM) Coordinated Video Timing Generator by
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* Graham Loveridge April 9, 2003 available at
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* http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls
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*
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* And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c.
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* What I have done is to translate it by using integer calculation.
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*/
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#define HV_FACTOR 1000
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struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay,
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int vdisplay, int vrefresh,
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bool reduced, bool interlaced, bool margins)
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{
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/* 1) top/bottom margin size (% of height) - default: 1.8, */
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#define CVT_MARGIN_PERCENTAGE 18
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/* 2) character cell horizontal granularity (pixels) - default 8 */
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#define CVT_H_GRANULARITY 8
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/* 3) Minimum vertical porch (lines) - default 3 */
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#define CVT_MIN_V_PORCH 3
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/* 4) Minimum number of vertical back porch lines - default 6 */
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#define CVT_MIN_V_BPORCH 6
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/* Pixel Clock step (kHz) */
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#define CVT_CLOCK_STEP 250
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struct drm_display_mode *drm_mode;
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unsigned int vfieldrate, hperiod;
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int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync;
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int interlace;
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/* allocate the drm_display_mode structure. If failure, we will
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* return directly
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*/
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drm_mode = drm_mode_create(dev);
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if (!drm_mode)
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return NULL;
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/* the CVT default refresh rate is 60Hz */
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if (!vrefresh)
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vrefresh = 60;
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/* the required field fresh rate */
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if (interlaced)
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vfieldrate = vrefresh * 2;
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else
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vfieldrate = vrefresh;
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/* horizontal pixels */
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hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY);
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/* determine the left&right borders */
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hmargin = 0;
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if (margins) {
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hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
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hmargin -= hmargin % CVT_H_GRANULARITY;
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}
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/* find the total active pixels */
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drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin;
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/* find the number of lines per field */
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if (interlaced)
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vdisplay_rnd = vdisplay / 2;
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else
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vdisplay_rnd = vdisplay;
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/* find the top & bottom borders */
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vmargin = 0;
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if (margins)
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vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
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drm_mode->vdisplay = vdisplay + 2 * vmargin;
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/* Interlaced */
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if (interlaced)
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interlace = 1;
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else
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interlace = 0;
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/* Determine VSync Width from aspect ratio */
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if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay))
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vsync = 4;
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else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay))
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vsync = 5;
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else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay))
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vsync = 6;
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else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay))
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vsync = 7;
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else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay))
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vsync = 7;
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else /* custom */
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vsync = 10;
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if (!reduced) {
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/* simplify the GTF calculation */
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/* 4) Minimum time of vertical sync + back porch interval (µs)
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* default 550.0
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*/
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int tmp1, tmp2;
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#define CVT_MIN_VSYNC_BP 550
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/* 3) Nominal HSync width (% of line period) - default 8 */
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#define CVT_HSYNC_PERCENTAGE 8
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unsigned int hblank_percentage;
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int vsyncandback_porch, vback_porch, hblank;
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/* estimated the horizontal period */
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tmp1 = HV_FACTOR * 1000000 -
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CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate;
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tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 +
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interlace;
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hperiod = tmp1 * 2 / (tmp2 * vfieldrate);
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tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1;
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/* 9. Find number of lines in sync + backporch */
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if (tmp1 < (vsync + CVT_MIN_V_PORCH))
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vsyncandback_porch = vsync + CVT_MIN_V_PORCH;
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else
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vsyncandback_porch = tmp1;
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/* 10. Find number of lines in back porch */
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vback_porch = vsyncandback_porch - vsync;
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drm_mode->vtotal = vdisplay_rnd + 2 * vmargin +
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vsyncandback_porch + CVT_MIN_V_PORCH;
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/* 5) Definition of Horizontal blanking time limitation */
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/* Gradient (%/kHz) - default 600 */
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#define CVT_M_FACTOR 600
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/* Offset (%) - default 40 */
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#define CVT_C_FACTOR 40
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/* Blanking time scaling factor - default 128 */
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#define CVT_K_FACTOR 128
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/* Scaling factor weighting - default 20 */
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#define CVT_J_FACTOR 20
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#define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256)
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#define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \
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CVT_J_FACTOR)
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/* 12. Find ideal blanking duty cycle from formula */
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hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME *
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hperiod / 1000;
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/* 13. Blanking time */
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if (hblank_percentage < 20 * HV_FACTOR)
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hblank_percentage = 20 * HV_FACTOR;
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hblank = drm_mode->hdisplay * hblank_percentage /
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(100 * HV_FACTOR - hblank_percentage);
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hblank -= hblank % (2 * CVT_H_GRANULARITY);
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/* 14. find the total pixes per line */
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drm_mode->htotal = drm_mode->hdisplay + hblank;
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drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2;
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drm_mode->hsync_start = drm_mode->hsync_end -
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(drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100;
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drm_mode->hsync_start += CVT_H_GRANULARITY -
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drm_mode->hsync_start % CVT_H_GRANULARITY;
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/* fill the Vsync values */
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drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH;
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drm_mode->vsync_end = drm_mode->vsync_start + vsync;
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} else {
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/* Reduced blanking */
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/* Minimum vertical blanking interval time (µs)- default 460 */
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#define CVT_RB_MIN_VBLANK 460
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/* Fixed number of clocks for horizontal sync */
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#define CVT_RB_H_SYNC 32
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/* Fixed number of clocks for horizontal blanking */
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#define CVT_RB_H_BLANK 160
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/* Fixed number of lines for vertical front porch - default 3*/
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#define CVT_RB_VFPORCH 3
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int vbilines;
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int tmp1, tmp2;
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/* 8. Estimate Horizontal period. */
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tmp1 = HV_FACTOR * 1000000 -
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CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate;
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tmp2 = vdisplay_rnd + 2 * vmargin;
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hperiod = tmp1 / (tmp2 * vfieldrate);
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/* 9. Find number of lines in vertical blanking */
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vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1;
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/* 10. Check if vertical blanking is sufficient */
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if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH))
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vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH;
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/* 11. Find total number of lines in vertical field */
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drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines;
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/* 12. Find total number of pixels in a line */
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drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK;
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/* Fill in HSync values */
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drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2;
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drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC;
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/* Fill in VSync values */
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drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH;
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drm_mode->vsync_end = drm_mode->vsync_start + vsync;
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}
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/* 15/13. Find pixel clock frequency (kHz for xf86) */
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drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod;
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drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP;
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/* 18/16. Find actual vertical frame frequency */
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/* ignore - just set the mode flag for interlaced */
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if (interlaced) {
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drm_mode->vtotal *= 2;
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drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
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}
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/* Fill the mode line name */
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drm_mode_set_name(drm_mode);
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if (reduced)
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drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC |
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DRM_MODE_FLAG_NVSYNC);
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else
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drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC |
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DRM_MODE_FLAG_NHSYNC);
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return drm_mode;
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}
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EXPORT_SYMBOL(drm_cvt_mode);
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/**
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* drm_gtf_mode_complex - create the modeline based on full GTF algorithm
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*
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* @dev :drm device
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* @hdisplay :hdisplay size
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* @vdisplay :vdisplay size
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* @vrefresh :vrefresh rate.
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* @interlaced :whether the interlace is supported
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* @margins :desired margin size
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* @GTF_[MCKJ] :extended GTF formula parameters
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*
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* LOCKING.
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* none.
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*
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* return the modeline based on full GTF algorithm.
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*
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* GTF feature blocks specify C and J in multiples of 0.5, so we pass them
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* in here multiplied by two. For a C of 40, pass in 80.
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*/
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struct drm_display_mode *
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drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay,
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int vrefresh, bool interlaced, int margins,
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int GTF_M, int GTF_2C, int GTF_K, int GTF_2J)
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{ /* 1) top/bottom margin size (% of height) - default: 1.8, */
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#define GTF_MARGIN_PERCENTAGE 18
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/* 2) character cell horizontal granularity (pixels) - default 8 */
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#define GTF_CELL_GRAN 8
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/* 3) Minimum vertical porch (lines) - default 3 */
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#define GTF_MIN_V_PORCH 1
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/* width of vsync in lines */
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#define V_SYNC_RQD 3
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/* width of hsync as % of total line */
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#define H_SYNC_PERCENT 8
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/* min time of vsync + back porch (microsec) */
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#define MIN_VSYNC_PLUS_BP 550
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/* C' and M' are part of the Blanking Duty Cycle computation */
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#define GTF_C_PRIME ((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2)
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#define GTF_M_PRIME (GTF_K * GTF_M / 256)
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struct drm_display_mode *drm_mode;
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unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd;
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int top_margin, bottom_margin;
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int interlace;
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unsigned int hfreq_est;
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int vsync_plus_bp, vback_porch;
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unsigned int vtotal_lines, vfieldrate_est, hperiod;
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unsigned int vfield_rate, vframe_rate;
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int left_margin, right_margin;
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unsigned int total_active_pixels, ideal_duty_cycle;
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unsigned int hblank, total_pixels, pixel_freq;
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int hsync, hfront_porch, vodd_front_porch_lines;
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unsigned int tmp1, tmp2;
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drm_mode = drm_mode_create(dev);
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if (!drm_mode)
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return NULL;
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/* 1. In order to give correct results, the number of horizontal
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* pixels requested is first processed to ensure that it is divisible
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* by the character size, by rounding it to the nearest character
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* cell boundary:
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*/
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hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
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hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN;
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/* 2. If interlace is requested, the number of vertical lines assumed
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* by the calculation must be halved, as the computation calculates
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* the number of vertical lines per field.
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*/
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if (interlaced)
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vdisplay_rnd = vdisplay / 2;
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else
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vdisplay_rnd = vdisplay;
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/* 3. Find the frame rate required: */
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if (interlaced)
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vfieldrate_rqd = vrefresh * 2;
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else
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vfieldrate_rqd = vrefresh;
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/* 4. Find number of lines in Top margin: */
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top_margin = 0;
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if (margins)
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top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
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1000;
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/* 5. Find number of lines in bottom margin: */
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bottom_margin = top_margin;
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/* 6. If interlace is required, then set variable interlace: */
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if (interlaced)
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interlace = 1;
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else
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interlace = 0;
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/* 7. Estimate the Horizontal frequency */
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{
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tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500;
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tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) *
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2 + interlace;
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hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1;
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}
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/* 8. Find the number of lines in V sync + back porch */
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/* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */
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vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000;
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vsync_plus_bp = (vsync_plus_bp + 500) / 1000;
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/* 9. Find the number of lines in V back porch alone: */
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vback_porch = vsync_plus_bp - V_SYNC_RQD;
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/* 10. Find the total number of lines in Vertical field period: */
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vtotal_lines = vdisplay_rnd + top_margin + bottom_margin +
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vsync_plus_bp + GTF_MIN_V_PORCH;
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/* 11. Estimate the Vertical field frequency: */
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vfieldrate_est = hfreq_est / vtotal_lines;
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/* 12. Find the actual horizontal period: */
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hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines);
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/* 13. Find the actual Vertical field frequency: */
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vfield_rate = hfreq_est / vtotal_lines;
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/* 14. Find the Vertical frame frequency: */
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if (interlaced)
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vframe_rate = vfield_rate / 2;
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else
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vframe_rate = vfield_rate;
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/* 15. Find number of pixels in left margin: */
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if (margins)
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left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
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1000;
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else
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left_margin = 0;
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/* 16.Find number of pixels in right margin: */
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right_margin = left_margin;
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/* 17.Find total number of active pixels in image and left and right */
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total_active_pixels = hdisplay_rnd + left_margin + right_margin;
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/* 18.Find the ideal blanking duty cycle from blanking duty cycle */
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ideal_duty_cycle = GTF_C_PRIME * 1000 -
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(GTF_M_PRIME * 1000000 / hfreq_est);
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/* 19.Find the number of pixels in the blanking time to the nearest
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* double character cell: */
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hblank = total_active_pixels * ideal_duty_cycle /
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(100000 - ideal_duty_cycle);
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hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN);
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hblank = hblank * 2 * GTF_CELL_GRAN;
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/* 20.Find total number of pixels: */
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total_pixels = total_active_pixels + hblank;
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/* 21.Find pixel clock frequency: */
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pixel_freq = total_pixels * hfreq_est / 1000;
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/* Stage 1 computations are now complete; I should really pass
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* the results to another function and do the Stage 2 computations,
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* but I only need a few more values so I'll just append the
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* computations here for now */
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/* 17. Find the number of pixels in the horizontal sync period: */
|
|
hsync = H_SYNC_PERCENT * total_pixels / 100;
|
|
hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
|
|
hsync = hsync * GTF_CELL_GRAN;
|
|
/* 18. Find the number of pixels in horizontal front porch period */
|
|
hfront_porch = hblank / 2 - hsync;
|
|
/* 36. Find the number of lines in the odd front porch period: */
|
|
vodd_front_porch_lines = GTF_MIN_V_PORCH ;
|
|
|
|
/* finally, pack the results in the mode struct */
|
|
drm_mode->hdisplay = hdisplay_rnd;
|
|
drm_mode->hsync_start = hdisplay_rnd + hfront_porch;
|
|
drm_mode->hsync_end = drm_mode->hsync_start + hsync;
|
|
drm_mode->htotal = total_pixels;
|
|
drm_mode->vdisplay = vdisplay_rnd;
|
|
drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines;
|
|
drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD;
|
|
drm_mode->vtotal = vtotal_lines;
|
|
|
|
drm_mode->clock = pixel_freq;
|
|
|
|
if (interlaced) {
|
|
drm_mode->vtotal *= 2;
|
|
drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
|
|
}
|
|
|
|
drm_mode_set_name(drm_mode);
|
|
if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40)
|
|
drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC;
|
|
else
|
|
drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC;
|
|
|
|
return drm_mode;
|
|
}
|
|
EXPORT_SYMBOL(drm_gtf_mode_complex);
|
|
|
|
/**
|
|
* drm_gtf_mode - create the modeline based on GTF algorithm
|
|
*
|
|
* @dev :drm device
|
|
* @hdisplay :hdisplay size
|
|
* @vdisplay :vdisplay size
|
|
* @vrefresh :vrefresh rate.
|
|
* @interlaced :whether the interlace is supported
|
|
* @margins :whether the margin is supported
|
|
*
|
|
* LOCKING.
|
|
* none.
|
|
*
|
|
* return the modeline based on GTF algorithm
|
|
*
|
|
* This function is to create the modeline based on the GTF algorithm.
|
|
* Generalized Timing Formula is derived from:
|
|
* GTF Spreadsheet by Andy Morrish (1/5/97)
|
|
* available at http://www.vesa.org
|
|
*
|
|
* And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c.
|
|
* What I have done is to translate it by using integer calculation.
|
|
* I also refer to the function of fb_get_mode in the file of
|
|
* drivers/video/fbmon.c
|
|
*
|
|
* Standard GTF parameters:
|
|
* M = 600
|
|
* C = 40
|
|
* K = 128
|
|
* J = 20
|
|
*/
|
|
struct drm_display_mode *
|
|
drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh,
|
|
bool lace, int margins)
|
|
{
|
|
return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh, lace,
|
|
margins, 600, 40 * 2, 128, 20 * 2);
|
|
}
|
|
EXPORT_SYMBOL(drm_gtf_mode);
|
|
|
|
#ifdef CONFIG_VIDEOMODE_HELPERS
|
|
int drm_display_mode_from_videomode(const struct videomode *vm,
|
|
struct drm_display_mode *dmode)
|
|
{
|
|
dmode->hdisplay = vm->hactive;
|
|
dmode->hsync_start = dmode->hdisplay + vm->hfront_porch;
|
|
dmode->hsync_end = dmode->hsync_start + vm->hsync_len;
|
|
dmode->htotal = dmode->hsync_end + vm->hback_porch;
|
|
|
|
dmode->vdisplay = vm->vactive;
|
|
dmode->vsync_start = dmode->vdisplay + vm->vfront_porch;
|
|
dmode->vsync_end = dmode->vsync_start + vm->vsync_len;
|
|
dmode->vtotal = dmode->vsync_end + vm->vback_porch;
|
|
|
|
dmode->clock = vm->pixelclock / 1000;
|
|
|
|
dmode->flags = 0;
|
|
if (vm->flags & DISPLAY_FLAGS_HSYNC_HIGH)
|
|
dmode->flags |= DRM_MODE_FLAG_PHSYNC;
|
|
else if (vm->flags & DISPLAY_FLAGS_HSYNC_LOW)
|
|
dmode->flags |= DRM_MODE_FLAG_NHSYNC;
|
|
if (vm->flags & DISPLAY_FLAGS_VSYNC_HIGH)
|
|
dmode->flags |= DRM_MODE_FLAG_PVSYNC;
|
|
else if (vm->flags & DISPLAY_FLAGS_VSYNC_LOW)
|
|
dmode->flags |= DRM_MODE_FLAG_NVSYNC;
|
|
if (vm->flags & DISPLAY_FLAGS_INTERLACED)
|
|
dmode->flags |= DRM_MODE_FLAG_INTERLACE;
|
|
if (vm->flags & DISPLAY_FLAGS_DOUBLESCAN)
|
|
dmode->flags |= DRM_MODE_FLAG_DBLSCAN;
|
|
if (vm->flags & DISPLAY_FLAGS_DOUBLECLK)
|
|
dmode->flags |= DRM_MODE_FLAG_DBLCLK;
|
|
drm_mode_set_name(dmode);
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(drm_display_mode_from_videomode);
|
|
|
|
#ifdef CONFIG_OF
|
|
/**
|
|
* of_get_drm_display_mode - get a drm_display_mode from devicetree
|
|
* @np: device_node with the timing specification
|
|
* @dmode: will be set to the return value
|
|
* @index: index into the list of display timings in devicetree
|
|
*
|
|
* This function is expensive and should only be used, if only one mode is to be
|
|
* read from DT. To get multiple modes start with of_get_display_timings and
|
|
* work with that instead.
|
|
*/
|
|
int of_get_drm_display_mode(struct device_node *np,
|
|
struct drm_display_mode *dmode, int index)
|
|
{
|
|
struct videomode vm;
|
|
int ret;
|
|
|
|
ret = of_get_videomode(np, &vm, index);
|
|
if (ret)
|
|
return ret;
|
|
|
|
drm_display_mode_from_videomode(&vm, dmode);
|
|
|
|
pr_debug("%s: got %dx%d display mode from %s\n",
|
|
of_node_full_name(np), vm.hactive, vm.vactive, np->name);
|
|
drm_mode_debug_printmodeline(dmode);
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(of_get_drm_display_mode);
|
|
#endif /* CONFIG_OF */
|
|
#endif /* CONFIG_VIDEOMODE_HELPERS */
|
|
|
|
/**
|
|
* drm_mode_set_name - set the name on a mode
|
|
* @mode: name will be set in this mode
|
|
*
|
|
* LOCKING:
|
|
* None.
|
|
*
|
|
* Set the name of @mode to a standard format.
|
|
*/
|
|
void drm_mode_set_name(struct drm_display_mode *mode)
|
|
{
|
|
bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
|
|
|
|
snprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s",
|
|
mode->hdisplay, mode->vdisplay,
|
|
interlaced ? "i" : "");
|
|
}
|
|
EXPORT_SYMBOL(drm_mode_set_name);
|
|
|
|
/**
|
|
* drm_mode_list_concat - move modes from one list to another
|
|
* @head: source list
|
|
* @new: dst list
|
|
*
|
|
* LOCKING:
|
|
* Caller must ensure both lists are locked.
|
|
*
|
|
* Move all the modes from @head to @new.
|
|
*/
|
|
void drm_mode_list_concat(struct list_head *head, struct list_head *new)
|
|
{
|
|
|
|
struct list_head *entry, *tmp;
|
|
|
|
list_for_each_safe(entry, tmp, head) {
|
|
list_move_tail(entry, new);
|
|
}
|
|
}
|
|
EXPORT_SYMBOL(drm_mode_list_concat);
|
|
|
|
/**
|
|
* drm_mode_width - get the width of a mode
|
|
* @mode: mode
|
|
*
|
|
* LOCKING:
|
|
* None.
|
|
*
|
|
* Return @mode's width (hdisplay) value.
|
|
*
|
|
* FIXME: is this needed?
|
|
*
|
|
* RETURNS:
|
|
* @mode->hdisplay
|
|
*/
|
|
int drm_mode_width(const struct drm_display_mode *mode)
|
|
{
|
|
return mode->hdisplay;
|
|
|
|
}
|
|
EXPORT_SYMBOL(drm_mode_width);
|
|
|
|
/**
|
|
* drm_mode_height - get the height of a mode
|
|
* @mode: mode
|
|
*
|
|
* LOCKING:
|
|
* None.
|
|
*
|
|
* Return @mode's height (vdisplay) value.
|
|
*
|
|
* FIXME: is this needed?
|
|
*
|
|
* RETURNS:
|
|
* @mode->vdisplay
|
|
*/
|
|
int drm_mode_height(const struct drm_display_mode *mode)
|
|
{
|
|
return mode->vdisplay;
|
|
}
|
|
EXPORT_SYMBOL(drm_mode_height);
|
|
|
|
/** drm_mode_hsync - get the hsync of a mode
|
|
* @mode: mode
|
|
*
|
|
* LOCKING:
|
|
* None.
|
|
*
|
|
* Return @modes's hsync rate in kHz, rounded to the nearest int.
|
|
*/
|
|
int drm_mode_hsync(const struct drm_display_mode *mode)
|
|
{
|
|
unsigned int calc_val;
|
|
|
|
if (mode->hsync)
|
|
return mode->hsync;
|
|
|
|
if (mode->htotal < 0)
|
|
return 0;
|
|
|
|
calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */
|
|
calc_val += 500; /* round to 1000Hz */
|
|
calc_val /= 1000; /* truncate to kHz */
|
|
|
|
return calc_val;
|
|
}
|
|
EXPORT_SYMBOL(drm_mode_hsync);
|
|
|
|
/**
|
|
* drm_mode_vrefresh - get the vrefresh of a mode
|
|
* @mode: mode
|
|
*
|
|
* LOCKING:
|
|
* None.
|
|
*
|
|
* Return @mode's vrefresh rate in Hz or calculate it if necessary.
|
|
*
|
|
* FIXME: why is this needed? shouldn't vrefresh be set already?
|
|
*
|
|
* RETURNS:
|
|
* Vertical refresh rate. It will be the result of actual value plus 0.5.
|
|
* If it is 70.288, it will return 70Hz.
|
|
* If it is 59.6, it will return 60Hz.
|
|
*/
|
|
int drm_mode_vrefresh(const struct drm_display_mode *mode)
|
|
{
|
|
int refresh = 0;
|
|
unsigned int calc_val;
|
|
|
|
if (mode->vrefresh > 0)
|
|
refresh = mode->vrefresh;
|
|
else if (mode->htotal > 0 && mode->vtotal > 0) {
|
|
int vtotal;
|
|
vtotal = mode->vtotal;
|
|
/* work out vrefresh the value will be x1000 */
|
|
calc_val = (mode->clock * 1000);
|
|
calc_val /= mode->htotal;
|
|
refresh = (calc_val + vtotal / 2) / vtotal;
|
|
|
|
if (mode->flags & DRM_MODE_FLAG_INTERLACE)
|
|
refresh *= 2;
|
|
if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
|
|
refresh /= 2;
|
|
if (mode->vscan > 1)
|
|
refresh /= mode->vscan;
|
|
}
|
|
return refresh;
|
|
}
|
|
EXPORT_SYMBOL(drm_mode_vrefresh);
|
|
|
|
/**
|
|
* drm_mode_set_crtcinfo - set CRTC modesetting parameters
|
|
* @p: mode
|
|
* @adjust_flags: unused? (FIXME)
|
|
*
|
|
* LOCKING:
|
|
* None.
|
|
*
|
|
* Setup the CRTC modesetting parameters for @p, adjusting if necessary.
|
|
*/
|
|
void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
|
|
{
|
|
if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
|
|
return;
|
|
|
|
p->crtc_hdisplay = p->hdisplay;
|
|
p->crtc_hsync_start = p->hsync_start;
|
|
p->crtc_hsync_end = p->hsync_end;
|
|
p->crtc_htotal = p->htotal;
|
|
p->crtc_hskew = p->hskew;
|
|
p->crtc_vdisplay = p->vdisplay;
|
|
p->crtc_vsync_start = p->vsync_start;
|
|
p->crtc_vsync_end = p->vsync_end;
|
|
p->crtc_vtotal = p->vtotal;
|
|
|
|
if (p->flags & DRM_MODE_FLAG_INTERLACE) {
|
|
if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
|
|
p->crtc_vdisplay /= 2;
|
|
p->crtc_vsync_start /= 2;
|
|
p->crtc_vsync_end /= 2;
|
|
p->crtc_vtotal /= 2;
|
|
}
|
|
}
|
|
|
|
if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
|
|
p->crtc_vdisplay *= 2;
|
|
p->crtc_vsync_start *= 2;
|
|
p->crtc_vsync_end *= 2;
|
|
p->crtc_vtotal *= 2;
|
|
}
|
|
|
|
if (p->vscan > 1) {
|
|
p->crtc_vdisplay *= p->vscan;
|
|
p->crtc_vsync_start *= p->vscan;
|
|
p->crtc_vsync_end *= p->vscan;
|
|
p->crtc_vtotal *= p->vscan;
|
|
}
|
|
|
|
p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
|
|
p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
|
|
p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
|
|
p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
|
|
}
|
|
EXPORT_SYMBOL(drm_mode_set_crtcinfo);
|
|
|
|
|
|
/**
|
|
* drm_mode_copy - copy the mode
|
|
* @dst: mode to overwrite
|
|
* @src: mode to copy
|
|
*
|
|
* LOCKING:
|
|
* None.
|
|
*
|
|
* Copy an existing mode into another mode, preserving the object id and
|
|
* list head of the destination mode.
|
|
*/
|
|
void drm_mode_copy(struct drm_display_mode *dst, const struct drm_display_mode *src)
|
|
{
|
|
int id = dst->base.id;
|
|
struct list_head head = dst->head;
|
|
|
|
*dst = *src;
|
|
dst->base.id = id;
|
|
dst->head = head;
|
|
}
|
|
EXPORT_SYMBOL(drm_mode_copy);
|
|
|
|
/**
|
|
* drm_mode_duplicate - allocate and duplicate an existing mode
|
|
* @m: mode to duplicate
|
|
*
|
|
* LOCKING:
|
|
* None.
|
|
*
|
|
* Just allocate a new mode, copy the existing mode into it, and return
|
|
* a pointer to it. Used to create new instances of established modes.
|
|
*/
|
|
struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev,
|
|
const struct drm_display_mode *mode)
|
|
{
|
|
struct drm_display_mode *nmode;
|
|
|
|
nmode = drm_mode_create(dev);
|
|
if (!nmode)
|
|
return NULL;
|
|
|
|
drm_mode_copy(nmode, mode);
|
|
|
|
return nmode;
|
|
}
|
|
EXPORT_SYMBOL(drm_mode_duplicate);
|
|
|
|
/**
|
|
* drm_mode_equal - test modes for equality
|
|
* @mode1: first mode
|
|
* @mode2: second mode
|
|
*
|
|
* LOCKING:
|
|
* None.
|
|
*
|
|
* Check to see if @mode1 and @mode2 are equivalent.
|
|
*
|
|
* RETURNS:
|
|
* True if the modes are equal, false otherwise.
|
|
*/
|
|
bool drm_mode_equal(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2)
|
|
{
|
|
/* do clock check convert to PICOS so fb modes get matched
|
|
* the same */
|
|
if (mode1->clock && mode2->clock) {
|
|
if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock))
|
|
return false;
|
|
} else if (mode1->clock != mode2->clock)
|
|
return false;
|
|
|
|
return drm_mode_equal_no_clocks(mode1, mode2);
|
|
}
|
|
EXPORT_SYMBOL(drm_mode_equal);
|
|
|
|
/**
|
|
* drm_mode_equal_no_clocks - test modes for equality
|
|
* @mode1: first mode
|
|
* @mode2: second mode
|
|
*
|
|
* LOCKING:
|
|
* None.
|
|
*
|
|
* Check to see if @mode1 and @mode2 are equivalent, but
|
|
* don't check the pixel clocks.
|
|
*
|
|
* RETURNS:
|
|
* True if the modes are equal, false otherwise.
|
|
*/
|
|
bool drm_mode_equal_no_clocks(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2)
|
|
{
|
|
if (mode1->hdisplay == mode2->hdisplay &&
|
|
mode1->hsync_start == mode2->hsync_start &&
|
|
mode1->hsync_end == mode2->hsync_end &&
|
|
mode1->htotal == mode2->htotal &&
|
|
mode1->hskew == mode2->hskew &&
|
|
mode1->vdisplay == mode2->vdisplay &&
|
|
mode1->vsync_start == mode2->vsync_start &&
|
|
mode1->vsync_end == mode2->vsync_end &&
|
|
mode1->vtotal == mode2->vtotal &&
|
|
mode1->vscan == mode2->vscan &&
|
|
mode1->flags == mode2->flags)
|
|
return true;
|
|
|
|
return false;
|
|
}
|
|
EXPORT_SYMBOL(drm_mode_equal_no_clocks);
|
|
|
|
/**
|
|
* drm_mode_validate_size - make sure modes adhere to size constraints
|
|
* @dev: DRM device
|
|
* @mode_list: list of modes to check
|
|
* @maxX: maximum width
|
|
* @maxY: maximum height
|
|
* @maxPitch: max pitch
|
|
*
|
|
* LOCKING:
|
|
* Caller must hold a lock protecting @mode_list.
|
|
*
|
|
* The DRM device (@dev) has size and pitch limits. Here we validate the
|
|
* modes we probed for @dev against those limits and set their status as
|
|
* necessary.
|
|
*/
|
|
void drm_mode_validate_size(struct drm_device *dev,
|
|
struct list_head *mode_list,
|
|
int maxX, int maxY, int maxPitch)
|
|
{
|
|
struct drm_display_mode *mode;
|
|
|
|
list_for_each_entry(mode, mode_list, head) {
|
|
if (maxPitch > 0 && mode->hdisplay > maxPitch)
|
|
mode->status = MODE_BAD_WIDTH;
|
|
|
|
if (maxX > 0 && mode->hdisplay > maxX)
|
|
mode->status = MODE_VIRTUAL_X;
|
|
|
|
if (maxY > 0 && mode->vdisplay > maxY)
|
|
mode->status = MODE_VIRTUAL_Y;
|
|
}
|
|
}
|
|
EXPORT_SYMBOL(drm_mode_validate_size);
|
|
|
|
/**
|
|
* drm_mode_validate_clocks - validate modes against clock limits
|
|
* @dev: DRM device
|
|
* @mode_list: list of modes to check
|
|
* @min: minimum clock rate array
|
|
* @max: maximum clock rate array
|
|
* @n_ranges: number of clock ranges (size of arrays)
|
|
*
|
|
* LOCKING:
|
|
* Caller must hold a lock protecting @mode_list.
|
|
*
|
|
* Some code may need to check a mode list against the clock limits of the
|
|
* device in question. This function walks the mode list, testing to make
|
|
* sure each mode falls within a given range (defined by @min and @max
|
|
* arrays) and sets @mode->status as needed.
|
|
*/
|
|
void drm_mode_validate_clocks(struct drm_device *dev,
|
|
struct list_head *mode_list,
|
|
int *min, int *max, int n_ranges)
|
|
{
|
|
struct drm_display_mode *mode;
|
|
int i;
|
|
|
|
list_for_each_entry(mode, mode_list, head) {
|
|
bool good = false;
|
|
for (i = 0; i < n_ranges; i++) {
|
|
if (mode->clock >= min[i] && mode->clock <= max[i]) {
|
|
good = true;
|
|
break;
|
|
}
|
|
}
|
|
if (!good)
|
|
mode->status = MODE_CLOCK_RANGE;
|
|
}
|
|
}
|
|
EXPORT_SYMBOL(drm_mode_validate_clocks);
|
|
|
|
/**
|
|
* drm_mode_prune_invalid - remove invalid modes from mode list
|
|
* @dev: DRM device
|
|
* @mode_list: list of modes to check
|
|
* @verbose: be verbose about it
|
|
*
|
|
* LOCKING:
|
|
* Caller must hold a lock protecting @mode_list.
|
|
*
|
|
* Once mode list generation is complete, a caller can use this routine to
|
|
* remove invalid modes from a mode list. If any of the modes have a
|
|
* status other than %MODE_OK, they are removed from @mode_list and freed.
|
|
*/
|
|
void drm_mode_prune_invalid(struct drm_device *dev,
|
|
struct list_head *mode_list, bool verbose)
|
|
{
|
|
struct drm_display_mode *mode, *t;
|
|
|
|
list_for_each_entry_safe(mode, t, mode_list, head) {
|
|
if (mode->status != MODE_OK) {
|
|
list_del(&mode->head);
|
|
if (verbose) {
|
|
drm_mode_debug_printmodeline(mode);
|
|
DRM_DEBUG_KMS("Not using %s mode %d\n",
|
|
mode->name, mode->status);
|
|
}
|
|
drm_mode_destroy(dev, mode);
|
|
}
|
|
}
|
|
}
|
|
EXPORT_SYMBOL(drm_mode_prune_invalid);
|
|
|
|
/**
|
|
* drm_mode_compare - compare modes for favorability
|
|
* @priv: unused
|
|
* @lh_a: list_head for first mode
|
|
* @lh_b: list_head for second mode
|
|
*
|
|
* LOCKING:
|
|
* None.
|
|
*
|
|
* Compare two modes, given by @lh_a and @lh_b, returning a value indicating
|
|
* which is better.
|
|
*
|
|
* RETURNS:
|
|
* Negative if @lh_a is better than @lh_b, zero if they're equivalent, or
|
|
* positive if @lh_b is better than @lh_a.
|
|
*/
|
|
static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b)
|
|
{
|
|
struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head);
|
|
struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head);
|
|
int diff;
|
|
|
|
diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) -
|
|
((a->type & DRM_MODE_TYPE_PREFERRED) != 0);
|
|
if (diff)
|
|
return diff;
|
|
diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay;
|
|
if (diff)
|
|
return diff;
|
|
|
|
diff = b->vrefresh - a->vrefresh;
|
|
if (diff)
|
|
return diff;
|
|
|
|
diff = b->clock - a->clock;
|
|
return diff;
|
|
}
|
|
|
|
/**
|
|
* drm_mode_sort - sort mode list
|
|
* @mode_list: list to sort
|
|
*
|
|
* LOCKING:
|
|
* Caller must hold a lock protecting @mode_list.
|
|
*
|
|
* Sort @mode_list by favorability, putting good modes first.
|
|
*/
|
|
void drm_mode_sort(struct list_head *mode_list)
|
|
{
|
|
list_sort(NULL, mode_list, drm_mode_compare);
|
|
}
|
|
EXPORT_SYMBOL(drm_mode_sort);
|
|
|
|
/**
|
|
* drm_mode_connector_list_update - update the mode list for the connector
|
|
* @connector: the connector to update
|
|
*
|
|
* LOCKING:
|
|
* Caller must hold a lock protecting @mode_list.
|
|
*
|
|
* This moves the modes from the @connector probed_modes list
|
|
* to the actual mode list. It compares the probed mode against the current
|
|
* list and only adds different modes. All modes unverified after this point
|
|
* will be removed by the prune invalid modes.
|
|
*/
|
|
void drm_mode_connector_list_update(struct drm_connector *connector)
|
|
{
|
|
struct drm_display_mode *mode;
|
|
struct drm_display_mode *pmode, *pt;
|
|
int found_it;
|
|
|
|
list_for_each_entry_safe(pmode, pt, &connector->probed_modes,
|
|
head) {
|
|
found_it = 0;
|
|
/* go through current modes checking for the new probed mode */
|
|
list_for_each_entry(mode, &connector->modes, head) {
|
|
if (drm_mode_equal(pmode, mode)) {
|
|
found_it = 1;
|
|
/* if equal delete the probed mode */
|
|
mode->status = pmode->status;
|
|
/* Merge type bits together */
|
|
mode->type |= pmode->type;
|
|
list_del(&pmode->head);
|
|
drm_mode_destroy(connector->dev, pmode);
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (!found_it) {
|
|
list_move_tail(&pmode->head, &connector->modes);
|
|
}
|
|
}
|
|
}
|
|
EXPORT_SYMBOL(drm_mode_connector_list_update);
|