- SysFuncs docs updated;

- PCI Expansion ROM is now readable via uMMIO.

git-svn-id: svn://kolibrios.org@1353 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
Artem Jerdev (art_zh) 2010-01-03 21:38:39 +00:00
parent a41482cf9d
commit 10f720429e
4 changed files with 127 additions and 6 deletions

View File

@ -431,18 +431,21 @@ align 4
pci_mmio_map: pci_mmio_map:
and edx,0x0ffff and edx,0x0ffff
cmp ah,6 cmp ah,6
jc @f jc .bar_0_5
jz .bar_rom
mov eax,-2 mov eax,-2
ret ret
@@: .bar_rom:
mov ah, 8 ; bar6 = Expansion ROM base address
.bar_0_5:
push ecx push ecx
add ebx, 4095 add ebx, 4095
and ebx,-4096 and ebx,-4096
push ebx push ebx
mov bl, ah ; bl = BAR# (0..5) mov bl, ah ; bl = BAR# (0..5), however bl=8 for BAR6
shl bl, 1 shl bl, 1
shl bl, 1 shl bl, 1
add bl, 0x10 ; bl = BARs offset in PCI config. space add bl, 0x10 ; now bl = BAR offset in PCI config. space
mov ax,word [mmio_pci_addr] mov ax,word [mmio_pci_addr]
mov bh, al ; bh = dddddfff mov bh, al ; bh = dddddfff
mov al, 2 ; al : DW to read mov al, 2 ; al : DW to read

View File

@ -3289,6 +3289,63 @@ IPC
¢å®¤¨â, ­ ¯à¨¬¥à, ¢ ¨§¢¥áâ­ë© Interrupt List by Ralf Brown; ¢å®¤¨â, ­ ¯à¨¬¥à, ¢ ¨§¢¥áâ­ë© Interrupt List by Ralf Brown;
ᯨ᮪ ¢â®àëå ¤®«¦¥­ ¡ëâì 㪠§ ­ ¢ ¤®ªã¬¥­â æ¨¨ ¯® ãáâனáâ¢ã. ᯨ᮪ ¢â®àëå ¤®«¦¥­ ¡ëâì 㪠§ ­ ¢ ¤®ªã¬¥­â æ¨¨ ¯® ãáâனáâ¢ã.
======================================================================
====================== ”ã­ªæ¨ï 62, ¯®¤äã­ªæ¨ï 11 =====================
== ˆ­¨æ¨ «¨§¨à®¢ âì ¯®«ì§®¢ â¥«ì᪨© / á ®â®¡à ¦¥­¨¥¬ ­  ¯ ¬ïâì ==
======================================================================
<EFBFBD> à ¬¥âàë:
* eax = 62 - ­®¬¥à ä㭪樨
* bl = 11 - ­®¬¥à ¯®¤ä㭪樨
* cx =  ¤à¥á PCI-ãáâனá⢠
‚®§¢à é ¥¬®¥ §­ ç¥­¨¥:
* eax = -1 - ¤®áâ㯠ª PCI § ¯à¥éñ­;
* eax = -2 - ¤®áâ㯠ª MMIO-¡«®ª ¬ ãáâனá⢠ ­¥ à §à¥èñ­;
* eax = -3 - ®è¨¡ª   ««®ª æ¨¨ ¯®«ì§®¢ â¥«ì᪮© ¤¨­. ¯ ¬ïâ¨; ¨­ ç¥
* eax = à §¬¥à ¤®áâ㯭®© ¤¨­ ¬¨ç¥áª®© ¯ ¬ïâ¨.
‡ ¬¥ç ­¨ï:
* <20>।¢ à¨â¥«ì­® ¤®«¦¥­ ¡ëâì à §à¥èñ­ ­¨§ª®ã஢­¥¢ë© ¤®áâ㯠ª PCI
¤«ï ¯à¨«®¦¥­¨© ¯®¤ä㭪樥© 12 ä㭪樨 21.
*  ¤à¥á PCI-ãáâனá⢠ ¤®«¦¥­ ᮢ¯ ¤ âì á á¨á⥬­®© ¯¥à¥¬¥­­®©
mmio_pci_addr
======================================================================
====================== ”ã­ªæ¨ï 62, ¯®¤äã­ªæ¨ï 12 =====================
== ‚뤥«¨âì ¤¨ ¯ §®­ «¨­¥©­ëå  ¤à¥á®¢ ¤«ï ¯®«ì§®¢ â¥«ì᪮£® MMIO ==
======================================================================
<EFBFBD> à ¬¥âàë:
* eax = 62 - ­®¬¥à ä㭪樨
* bl = 12 - ­®¬¥à ¯®¤ä㭪樨
* bh = ­®¬¥à BAR-ॣ¨áâà  ¢ ª®­ä¨£ãà æ¨®­­®© §®­¥ PCI
* ecx = à §¬¥à MMIO-¡«®ª  (¢ ¡ ©â å)
* edx = ᬥ饭¨¥ ®â­®á¨â¥«ì­® ­ ç «  MMIO-¡«®ª  (¢ 4K-áâà ­¨æ å!)
‚®§¢à é ¥¬®¥ §­ ç¥­¨¥:
* eax = -1 - ¤®áâ㯠ª PCI § ¯à¥éñ­;
* eax = -2 - ­¥¢¥à­ë© ­®¬¥à BAR-ॣ¨áâà ;
* eax = -3 - BAR ­¥ ᮤ¥à¦¨â  ¤à¥á  IO;
* eax = -4 - BAR  ¤à¥áã¥â ¯®àâë IO;
* eax = -5 - ®è¨¡ª   ««®ª æ¨¨; ¨­ ç¥
* eax = ­ ç «ì­ë©  ¤à¥á MMIO ¢  ¤à¥á­®¬ ¯à®áâà ­á⢥ ¯à¨«®¦¥­¨ï.
‡ ¬¥ç ­¨ï:
* <20>।¢ à¨â¥«ì­® ¤®«¦¥­ ¡ëâì à §à¥èñ­ ­¨§ª®ã஢­¥¢ë© ¤®áâ㯠ª PCI
¤«ï ¯à¨«®¦¥­¨© ¯®¤ä㭪樥© 12 ä㭪樨 21.
* €¤à¥á PCI-ãáâனá⢠ § ¤ ¥âáï á¨á⥬­®© ¯¥à¥¬¥­­®© mmio_pci_addr.
* <20>।®áâ ¢«¥­­ë© ¤¨ ¯ §®­ «¨­¥©­ëå  ¤à¥á®¢ ¤®«¦¥­ ®á¢®¡®¦¤ âìáï
¯®á।á⢮¬ ¢ë§®¢  ä㭪樨 62:13
======================================================================
====================== ”ã­ªæ¨ï 62, ¯®¤äã­ªæ¨ï 13 =====================
== Žá¢®¡®¤¨âì ¤¨ ¯ §®­ «¨­¥©­ëå  ¤à¥á®¢ ¯®«ì§®¢ â¥«ì᪮£® MMIO ==
======================================================================
<EFBFBD> à ¬¥âàë:
* eax = 62 - ­®¬¥à ä㭪樨
* bl = 12 - ­®¬¥à ¯®¤ä㭪樨
* ecx = ­ ç «ì­ë©  ¤à¥á ®á¢®¡®¦¤ ¥¬®£® MMIO-¡«®ª  ¢  ¤à¥á­®¬
¯à®áâà ­á⢥ ¯à¨«®¦¥­¨ï
‚®§¢à é ¥¬®¥ §­ ç¥­¨¥:
* eax = 1 - ¡«®ª ãᯥ譮 ®á¢®¡®¦¤¥­;
‡ ¬¥ç ­¨ï:
* <20>।¢ à¨â¥«ì­® ¯à¨«®¦¥­¨î ¤®«¦¥­ ¡ëâì ¢ë¤¥«¥­ uMMIO-¡«®ª (fn62:12)
====================================================================== ======================================================================
================ ”ã­ªæ¨ï 63 - à ¡®â  á ¤®áª®© ®â« ¤ª¨. =============== ================ ”ã­ªæ¨ï 63 - à ¡®â  á ¤®áª®© ®â« ¤ª¨. ===============
====================================================================== ======================================================================

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@ -3260,6 +3260,59 @@ Remarks:
Ralf Brown; registers of the second type must be listed Ralf Brown; registers of the second type must be listed
in the device documentation. in the device documentation.
======================================================================
===================== Function 62, subfunction 11 ====================
== Initialize user-accessible MMIO channel ==
======================================================================
Parameters:
* eax = 62 - function
* bl = 11 - subfunction
* cx = PCI-address (bbbbbbbb dddddfff)
Returns:
* eax = -1 - PCI access not granted;
* eax = -2 - no user MMIO access to this PCI address;
* eax = -3 - memory allocation error; otherwise
* eax = available user heap size.
Remarks:
* Low-level PCI access must be allowed (fn21:12)
* PCI-address should correspond the system var [mmio_pci_addr]
======================================================================
===================== Function 62, subfunction 12 ====================
== Request user-accessible MMIO address space ==
======================================================================
Parameters:
* eax = 62 - function
* bl = 12 - subfunction
* bh = BAR number in PCI configuration space
* ecx = MMIO-block size needed (bytes)
* edx = MMIO-offset (number of whole 4Kb-pages!)
Returns:
* eax = -1 - user PCI access denied;
* eax = -2 - invalid BAR number;
* eax = -3 - BAR contains no valid IO addres;
* eax = -4 - BAR addresses IO ports;
* eax = -5 - dynamic allocation error; otherwise
* eax = MMIO start address (in application's linear space).
Remarks:
* Low-level PCI access must be allowed (fn21:12)
* The system var [mmio_pci_addr] sets the actual PCI-address
* The granted MMIO addresses should be released after use (fn62:13)
======================================================================
===================== Function 62, subfunction 13 ====================
== Release a block of user MMIO addresses ==
======================================================================
<EFBFBD> à ¬¥âàë:
* eax = 62 - function
* bl = 12 - subfunction
* ecx = MMIO start address (in application's linear space).
Returns:
* eax = 1 if the block is successfully released;
* eax = 0 in case of reallocation error;
Remarks:
* A valid uMMIO block should exist at this address (fn62:12)
====================================================================== ======================================================================
============== Function 63 - work with the debug board. ============== ============== Function 63 - work with the debug board. ==============
====================================================================== ======================================================================

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@ -473,11 +473,19 @@ Try_MMIO:
mcall 4 mcall 4
jmp mmio_next_bar jmp mmio_next_bar
@@: @@:
cmp bh, '6' ; expansion ROM ?
je @f
mov [bar_ram+3], bh mov [bar_ram+3], bh
mov ebx, [gr_pos] mov ebx, [gr_pos]
mov edx, bar_ram mov edx, bar_ram
mcall 4 mcall 4
jump mmio_dump
@@:
mov ebx, [gr_pos]
mov edx, bar_rom
mcall 4
mmio_dump:
mov edx, eax mov edx, eax
mov esi, 64 mov esi, 64
mov ecx, 0x099 ; dump color : blue mov ecx, 0x099 ; dump color : blue
@ -490,7 +498,7 @@ Try_MMIO:
mmio_next_bar: mmio_next_bar:
mov bh, [MMIO_BAR] mov bh, [MMIO_BAR]
inc bh inc bh
cmp bh,6 cmp bh,7
je @f je @f
mov [MMIO_BAR], bh mov [MMIO_BAR], bh
add [gr_pos], 10 add [gr_pos], 10
@ -529,7 +537,7 @@ PCIWin mls \
bar_ram db 'BARx: MMIO block', 0 bar_ram db 'BARx: MMIO block', 0
bar_io db 'BARx: IO ports',0 bar_io db 'BARx: IO ports',0
bar_um db 'BARx: unmapped',0 bar_um db 'BARx: unmapped',0
bar_rom db 'BAR6: Onboard ROM', 0 ; << no ROM test yet bar_rom db 'BAR6: Expansion ROM', 0
;------------------------------------------------------------------ ;------------------------------------------------------------------
; UNINITIALIZED DATA AREA ; UNINITIALIZED DATA AREA