r300_pio blit & transparent blit

git-svn-id: svn://kolibrios.org@868 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
Sergey Semyonov (Serge) 2008-09-24 14:30:07 +00:00
parent 2860a7433c
commit ad6f92b5b9
6 changed files with 115 additions and 26 deletions

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@ -8,6 +8,9 @@
#define PIXBLIT 7
#define PIXLOCK 8
#define PIXUNLOCK 9
#define PIXDESTROY 10
#define TRANSBLIT 11
typedef unsigned int color_t;
@ -95,10 +98,12 @@ int Blit(blit_t *blit);
int RadeonComposite( blit_t *blit);
int CreatePixmap(userpixmap_t *io);
int DestroyPixmap(userpixmap_t *io);
int LockPixmap(userpixmap_t *io);
int UnlockPixmap(userpixmap_t *io);
int PixBlit(pixblit_t* blit);
int LockPixmap(userpixmap_t *io);
# define RADEON_GMC_SRC_PITCH_OFFSET_CNTL (1 << 0)
# define RADEON_GMC_DST_PITCH_OFFSET_CNTL (1 << 1)
@ -123,6 +128,8 @@ int LockPixmap(userpixmap_t *io);
# define RADEON_CNTL_PAINT 0x00009100
# define RADEON_CNTL_BITBLT 0x00009200
# define RADEON_CNTL_TRANBLT 0x00009C00
# define RADEON_CNTL_PAINT_POLYLINE 0x00009500
# define RADEON_CNTL_PAINT_MULTI 0x00009A00

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@ -196,16 +196,20 @@ int Line2P(line2p_t *draw)
#if R300_PIO
R5xxFIFOWait(7);
R5xxFIFOWait(6);
OUTREG(R5XX_DP_GUI_MASTER_CNTL, rhd.gui_control | R5XX_ROP3_P |
OUTREG(R5XX_DP_GUI_MASTER_CNTL,
rhd.gui_control |
R5XX_GMC_BRUSH_SOLID_COLOR |
R5XX_GMC_SRC_DATATYPE_COLOR);
R5XX_GMC_SRC_DATATYPE_COLOR |
R5XX_GMC_CLR_CMP_CNTL_DIS |
R5XX_GMC_WR_MSK_DIS |
R5XX_ROP3_P
);
OUTREG(R5XX_DST_LINE_PATCOUNT, 0x55 << R5XX_BRES_CNTL_SHIFT);
OUTREG(R5XX_DP_BRUSH_FRGD_CLR, draw->color);
OUTREG(R5XX_DP_WRITE_MASK, 0xFFFFFFFF);
OUTREG(R5XX_DST_PITCH_OFFSET, rhd.dst_pitch_offset);
OUTREG(R5XX_DST_LINE_START,(y0<<16)|x0);
@ -219,7 +223,9 @@ int Line2P(line2p_t *draw)
RADEON_GMC_BRUSH_SOLID_COLOR |
RADEON_GMC_DST_32BPP |
RADEON_GMC_SRC_DATATYPE_COLOR |
(1 << 28)+(1 << 30) | R5XX_ROP3_P);
R5XX_GMC_CLR_CMP_CNTL_DIS |
R5XX_GMC_WR_MSK_DIS |
R5XX_ROP3_P);
OUT_RING(rhd.dst_pitch_offset);
OUT_RING(draw->color);
@ -365,6 +371,14 @@ int UnlockPixmap(userpixmap_t *io)
if( (pixmap->flags & 1) != PX_LOCK )
return ERR_PARAM;
/* Sanity checks */
if( (pixmap->usermap == 0)||
((u32_t)pixmap->usermap >= 0x80000000) ||
((u32_t)pixmap->usermap & 4095)
)
return ERR_PARAM;
size = (pixmap->pitch*pixmap->width+4095) & ~ 4095;
UnmapPages(pixmap->usermap, size);
@ -403,6 +417,32 @@ int PixBlit(pixblit_t *blit)
ifl = safe_cli();
#if R300_PIO
R5xxFIFOWait(7);
OUTREG(R5XX_DP_GUI_MASTER_CNTL,
RADEON_GMC_SRC_PITCH_OFFSET_CNTL |
RADEON_GMC_DST_PITCH_OFFSET_CNTL |
RADEON_GMC_BRUSH_NONE |
RADEON_GMC_DST_32BPP |
RADEON_GMC_SRC_DATATYPE_COLOR |
RADEON_DP_SRC_SOURCE_MEMORY |
R5XX_GMC_CLR_CMP_CNTL_DIS |
R5XX_GMC_WR_MSK_DIS |
R5XX_ROP3_S
);
OUTREG(R5XX_DP_CNTL, R5XX_DST_X_LEFT_TO_RIGHT | R5XX_DST_Y_TOP_TO_BOTTOM);
OUTREG(R5XX_DST_PITCH_OFFSET, dstpixmap->pitch_offset);
OUTREG(R5XX_SRC_PITCH_OFFSET, srcpixmap->pitch_offset);
OUTREG(R5XX_SRC_Y_X,(blit->src_y<<16)|blit->src_x);
OUTREG(R5XX_DST_Y_X,(blit->dst_y<<16)|blit->dst_x);
OUTREG(R5XX_DST_HEIGHT_WIDTH,(blit->h<<16)|blit->w);
#else
BEGIN_RING();
OUT_RING(CP_PACKET3(RADEON_CNTL_BITBLT, 5));
@ -413,7 +453,10 @@ int PixBlit(pixblit_t *blit)
RADEON_GMC_DST_32BPP |
RADEON_GMC_SRC_DATATYPE_COLOR |
RADEON_DP_SRC_SOURCE_MEMORY |
(1 << 28)+(1 << 30) | R5XX_ROP3_S);
R5XX_GMC_CLR_CMP_CNTL_DIS |
R5XX_GMC_WR_MSK_DIS |
R5XX_ROP3_S
);
OUT_RING(srcpixmap->pitch_offset);
OUT_RING(dstpixmap->pitch_offset);
@ -423,6 +466,8 @@ int PixBlit(pixblit_t *blit)
OUT_RING((blit->w<<16)|blit->h);
COMMIT_RING();
#endif
safe_sti(ifl);
return ERR_OK;
}
@ -439,7 +484,7 @@ int TransBlit(pixblit_t *blit)
pixmap_t *srcpixmap;
pixmap_t *dstpixmap;
dbgprintf("Transblit src: %x dst: %x\n",blit->srcpix, blit->dstpix);
// dbgprintf("Transblit src: %x dst: %x\n",blit->srcpix, blit->dstpix);
dstpixmap = (blit->dstpix == (void*)-1) ? &scr_pixmap : blit->dstpix ;
srcpixmap = (blit->srcpix == (void*)-1) ? &scr_pixmap : blit->srcpix ;
@ -453,6 +498,36 @@ int TransBlit(pixblit_t *blit)
ifl = safe_cli();
#if R300_PIO
R5xxFIFOWait(10);
OUTREG(R5XX_DP_GUI_MASTER_CNTL,
RADEON_GMC_SRC_PITCH_OFFSET_CNTL |
RADEON_GMC_DST_PITCH_OFFSET_CNTL |
RADEON_GMC_BRUSH_NONE |
RADEON_GMC_DST_32BPP |
RADEON_GMC_SRC_DATATYPE_COLOR |
RADEON_DP_SRC_SOURCE_MEMORY |
R5XX_GMC_WR_MSK_DIS |
R5XX_ROP3_S
);
OUTREG(R5XX_DP_CNTL, R5XX_DST_X_LEFT_TO_RIGHT | R5XX_DST_Y_TOP_TO_BOTTOM);
OUTREG(R5XX_CLR_CMP_CLR_SRC, 0xFF000000);
OUTREG(R5XX_CLR_CMP_MASK, R5XX_CLR_CMP_MSK);
OUTREG(R5XX_CLR_CMP_CNTL, R5XX_SRC_CMP_EQ_COLOR | R5XX_CLR_CMP_SRC_SOURCE);
OUTREG(R5XX_DST_PITCH_OFFSET, dstpixmap->pitch_offset);
OUTREG(R5XX_SRC_PITCH_OFFSET, srcpixmap->pitch_offset);
OUTREG(R5XX_SRC_Y_X,(blit->src_y<<16)|blit->src_x);
OUTREG(R5XX_DST_Y_X,(blit->dst_y<<16)|blit->dst_x);
OUTREG(R5XX_DST_HEIGHT_WIDTH,(blit->h<<16)|blit->w);
#else
BEGIN_RING();
OUT_RING(CP_PACKET3(RADEON_CNTL_TRANBLT, 8));
@ -462,20 +537,25 @@ int TransBlit(pixblit_t *blit)
RADEON_GMC_DST_32BPP |
RADEON_GMC_SRC_DATATYPE_COLOR |
RADEON_DP_SRC_SOURCE_MEMORY |
(1 << 30) | R5XX_ROP3_S);
R5XX_GMC_WR_MSK_DIS |
R5XX_ROP3_S
);
OUT_RING(srcpixmap->pitch_offset);
OUT_RING(dstpixmap->pitch_offset);
OUT_RING((2<<24)+5);
OUT_RING(R5XX_CLR_CMP_SRC_SOURCE | R5XX_SRC_CMP_EQ_COLOR);
OUT_RING(0xFF000000);
OUT_RING(0xFF000000);
OUT_RING((blit->src_x<<16)|blit->src_y);
OUT_RING((blit->dst_x<<16)|blit->dst_y);
OUT_RING((blit->w<<16)|blit->h);
COMMIT_RING();
#endif
safe_sti(ifl);
return ERR_OK;
}

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@ -69,7 +69,7 @@ u32 __stdcall drvEntry(int action)
R5xx2DInit();
rhd.has_tcl = 1;
Init3DEngine(&rhd);
// Init3DEngine(&rhd);
//init_r500();

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@ -5,7 +5,7 @@
#define IS_R300_3D 0
#define IS_R500_3D 1
#define R300_PIO 0
#define R300_PIO 1
enum RHD_CHIPSETS {
RHD_UNKNOWN = 0,

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@ -143,6 +143,8 @@ void free(void*);
#define kmalloc malloc
#define kfree free
#define xcalloc calloc
///////////////////////////////////////////////////////////////////////////////
int memcmp(const void *s1, const void *s2, size_t n);

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@ -1,5 +1,5 @@
//#define R300_TEST
#define R300_TEST
#include "r5xx_regs.h"
@ -353,8 +353,8 @@ void R5xx2DInit()
u32 base;
#ifdef R300_TEST
rhd.displayWidth = 800;
rhd.displayHeight = 600;
rhd.displayWidth = 1024;
rhd.displayHeight = 768;
#else
rhd.displayWidth = INREG(D1GRPH_X_END);
rhd.displayHeight = INREG(D1GRPH_Y_END);
@ -407,7 +407,7 @@ void R5xx2DInit()
MASKREG( RADEON_AIC_CNTL,0, RADEON_PCIGART_TRANSLATE_EN);
load_microcode();
// load_microcode();
rhd.ring_base = CreateRingBuffer(0x8000, PG_SW | PG_NOCACHE);
dbgprintf("create cp ring buffer %x\n", rhd.ring_base);