Converted unfinished cardbus and AGP drivers to PE, moved to drivers/unfinished

git-svn-id: svn://kolibrios.org@5066 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
hidnplayr 2014-08-29 15:09:56 +00:00
parent 5c90aa59dc
commit 24547ca793
4 changed files with 199 additions and 183 deletions

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@ -10,39 +10,94 @@
struct PCI_header
vendor_id dw ?
device_id dw ?
command dw ?
status dw ?
revision_id db ?
prog_if db ?
subclass db ?
class_code db ?
cache_line_size db ?
latency_timer db ?
header_type db ?
bist db ?
vendor_id dw ? ; 0x00
device_id dw ? ; 0x02
command dw ? ; 0x04
status dw ? ; 0x06
revision_id db ? ; 0x08
prog_if db ? ; 0x09
subclass db ? ; 0x0A
class_code db ? ; 0x0B
cache_line_size db ? ; 0x0C
latency_timer db ? ; 0x0D
header_type db ? ; 0x0E
bist db ? ; 0x0F
ends
struct PCI_header00 PCI_header
base_addr_0 dd ?
base_addr_1 dd ?
base_addr_2 dd ?
base_addr_3 dd ?
base_addr_4 dd ?
base_addr_5 dd ?
cardbus_cis_ptr dd ?
subsys_vendor dw ?
subsys_id dw ?
exp_rom_addr dd ?
cap_ptr db ?
reserved rb 7
interrupt_line db ?
interrupt_pin db ?
min_grant db ?
max_latency db ?
base_addr_0 dd ? ; 0x10
base_addr_1 dd ? ; 0x14
base_addr_2 dd ? ; 0x18
base_addr_3 dd ? ; 0x1C
base_addr_4 dd ? ; 0x20
base_addr_5 dd ? ; 0x24
cardbus_cis_ptr dd ? ; 0x28
subsys_vendor dw ? ; 0x2C
subsys_id dw ? ; 0x2E
exp_rom_addr dd ? ; 0x30
cap_ptr db ? ; 0x34
rb 7 ; reserved
interrupt_line db ? ; 0x3C
interrupt_pin db ? ; 0x3D
min_grant db ? ; 0x3E
max_latency db ? ; 0x3F
ends
struct PCI_header01 PCI_header
base_addr_0 dd ? ; 0x10
base_addr_1 dd ? ; 0x14
prim_bus_nr db ? ; 0x18
sec_bus_nr db ? ; 0x19
sub_bus_nr db ? ; 0x1A
sec_lat_tmr db ? ; 0x1B
io_base db ? ; 0x1C
io_limit db ? ; 0x1D
sec_status dw ? ; 0x1E
mem_base dw ? ; 0x20
mem_limit dw ? ; 0x22
pref_mem_base dw ? ; 0x24
pref_mem_limit dw ? ; 0x26
pref_base_up dd ? ; 0x28
pref_limit_up dd ? ; 0x2C
io_base_up dw ? ; 0x30
io_limit_up dw ? ; 0x32
cap_ptr db ? ; 0x34
rb 3 ; reserved
exp_rom_addr dd ? ; 0x38
interrupt_line db ? ; 0x3C
interrupt_pin db ? ; 0x3E
bridge_ctrl dw ? ; 0x3F
ends
struct PCI_header02 PCI_header
base_addr dd ? ; 0x10
cap_list_offs db ? ; 0x14
rb 1 ; reserved
sec_stat dw ? ; 0x16
pci_bus_nr db ? ; 0x18
cardbus_bus_nr db ? ; 0x19
sub_bus_nr db ? ; 0x1A
cardbus_lat_tmr db ? ; 0x1B
mbar_0 dd ? ; 0x1C
mlimit_0 dd ? ; 0x20
mbar_1 dd ? ; 0x24
mlimit_1 dd ? ; 0x28
iobar_0 dd ? ; 0x2C
iolimit_0 dd ? ; 0x30
iobar_1 dd ? ; 0x34
iolimit_1 dd ? ; 0x38
interrupt_line db ? ; 0x3C
interrupt_pin db ? ; 0x3D
bridge_ctrl dw ? ; 0x3E
subs_did dw ? ; 0x40
subs_vid dw ? ; 0x42
legacy_bar dd ? ; 0x44
ends

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@ -1,6 +1,6 @@
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; ;;
;; Copyright (C) KolibriOS team 2004-2012. All rights reserved. ;;
;; Copyright (C) KolibriOS team 2004-2014. All rights reserved. ;;
;; Distributed under terms of the GNU General Public License ;;
;; ;;
;; simple AGP driver for KolibriOS ;;
@ -13,99 +13,78 @@
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
format MS COFF
format PE DLL native
entry START
DEBUG equ 1
FAST_WRITE equ 0 ; may cause problems with some motherboards
CURRENT_API = 0x0200
COMPATIBLE_API = 0x0100
API_VERSION = (COMPATIBLE_API shl 16) + CURRENT_API
include 'proc32.inc'
include 'imports.inc'
FAST_WRITE = 0 ; may cause problems with some motherboards
struc IOCTL
{ .handle dd ?
.io_code dd ?
.input dd ?
.inp_size dd ?
.output dd ?
.out_size dd ?
}
section '.flat' readable writable executable
virtual at 0
IOCTL IOCTL
end virtual
include '../proc32.inc'
include '../struct.inc'
include '../macros.inc'
include '../pci_pe.inc'
public START
public service_proc
public version
;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; ;;
;; proc START ;;
;; ;;
;; (standard driver proc) ;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;
DRV_ENTRY equ 1
DRV_EXIT equ -1
proc START c, reason:dword, cmdline:dword
SRV_GETVERSION equ 0
SRV_DETECT equ 1
cmp [reason], DRV_ENTRY
jne .fail
API_VERSION equ 1
section '.flat' code readable align 16
proc START stdcall, state:dword
cmp [state], 1
jne .exit
.entry:
if DEBUG
mov esi, msgInit
call SysMsgBoardStr
end if
invoke SysMsgBoardStr
invoke RegService, my_service, service_proc
call detect
stdcall RegService, my_service, service_proc
ret
.fail:
.exit:
.fail:
xor eax, eax
ret
endp
handle equ IOCTL.handle
io_code equ IOCTL.io_code
input equ IOCTL.input
inp_size equ IOCTL.inp_size
output equ IOCTL.output
out_size equ IOCTL.out_size
;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; ;;
;; proc SERVICE_PROC ;;
;; ;;
;; (standard driver proc) ;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;
align 4
proc service_proc stdcall, ioctl:dword
mov ebx, [ioctl]
mov eax, [ebx+io_code]
cmp eax, SRV_GETVERSION
jne @F
mov edx, [ioctl]
mov eax, [edx + IOCTL.io_code]
mov eax, [ebx+output]
cmp [ebx+out_size], 4
;------------------------------------------------------
cmp eax, 0 ;SRV_GETVERSION
jne .fail
cmp [edx + IOCTL.out_size], 4
jb .fail
mov eax, [edx + IOCTL.output]
mov [eax], dword API_VERSION
xor eax, eax
ret
@@:
mov ebx, [ioctl]
mov eax, [ebx+io_code]
cmp eax, SRV_DETECT
jne @F
call detect
@@:
.fail:
.fail:
or eax, -1
ret
endp
restore handle
restore io_code
restore input
restore inp_size
restore output
restore out_size
endp
align 4
proc detect
@ -114,12 +93,12 @@ proc detect
endl
mov esi, msgSearch
call SysMsgBoardStr
invoke SysMsgBoardStr
xor eax, eax
mov [bus], eax
inc eax
call PciApi ; get last bus
invoke PciApi ; get last bus
cmp eax, -1
je .error
mov [last_bus], eax
@ -127,14 +106,11 @@ proc detect
.next_bus:
and [devfn], 0
.next_dev:
stdcall PciRead16, [bus], [devfn], dword 0x0a ; read class/subclass
invoke PciRead16, [bus], [devfn], PCI_header.subclass ; subclass/vendor
cmp ax, 0x0300 ; display controller - vga compatable controller
je .found
cmp ax, 0x0302 ; display controller - 3d controller
je .found
cmp ax, 0x0380 ; display controller - other display controller
je .found
@ -150,14 +126,14 @@ proc detect
.error:
mov esi, msgFail
call SysMsgBoardStr
invoke SysMsgBoardStr
xor eax, eax
inc eax
ret
.found:
stdcall PciRead8, [bus], [devfn], dword 0x06 ; read prog IF
invoke PciRead8, [bus], [devfn], PCI_header00.prog_if
test al, 1 shl 4 ; got capabilities list?
jnz .got_capabilities_list
@ -167,12 +143,12 @@ proc detect
jmp .next
.got_capabilities_list:
stdcall PciRead8, [bus], [devfn], dword 0x34 ; read capabilities offset
invoke PciRead8, [bus], [devfn], PCI_header00.cap_ptr
and eax, 11111100b ; always dword aligned
mov edi, eax
.read_capability:
stdcall PciRead32, [bus], [devfn], edi ; read capability
invoke PciRead32, [bus], [devfn], edi ; read capability
cmp al, 0x02 ; AGP
je .got_agp
movzx edi, ah ; pointer to next capability
@ -191,47 +167,45 @@ proc detect
.agp_2:
mov esi, msgAGP2
call SysMsgBoardStr
invoke SysMsgBoardStr
stdcall PciRead32, [bus], [devfn], edi ; read AGP status
invoke PciRead32, [bus], [devfn], edi ; read AGP status
.agp_2_:
test al, 100b
jnz .100b
test al, 10b
jnz .010b
test al, 1b
jz .error
.001b:
mov [cmd], 001b
mov esi, msg1
call SysMsgBoardStr
invoke SysMsgBoardStr
jmp .agp_go
.010b:
mov [cmd], 010b
mov esi, msg2
call SysMsgBoardStr
invoke SysMsgBoardStr
jmp .agp_go
.100b:
mov [cmd], 100b
mov esi, msg4
call SysMsgBoardStr
invoke SysMsgBoardStr
jmp .agp_go
.agp_2m:
mov esi, msgAGP2m
call SysMsgBoardStr
invoke SysMsgBoardStr
jmp .agp_2_
.agp_3:
mov esi, msgAGP3
call SysMsgBoardStr
invoke SysMsgBoardStr
stdcall PciRead32, [bus], [devfn], edi ; read AGP status
invoke PciRead32, [bus], [devfn], edi ; read AGP status
test al, 1 shl 3
jz .agp_2m
@ -239,13 +213,13 @@ proc detect
jnz .8x
mov [cmd], 01b
mov esi, msg4
call SysMsgBoardStr
invoke SysMsgBoardStr
jmp .agp_go
.8x:
mov [cmd], 10b
mov esi, msg8
call SysMsgBoardStr
invoke SysMsgBoardStr
.agp_go:
@ -254,7 +228,7 @@ if FAST_WRITE
jz @f
or [cmd], 1 shl 4
mov esi, msgfast
call SysMsgBoardStr
invoke SysMsgBoardStr
@@:
end if
@ -262,26 +236,28 @@ end if
jz @f
or [cmd], 1 shl 9
mov esi, msgside
call SysMsgBoardStr
invoke SysMsgBoardStr
@@:
add edi, 4
mov eax, [cmd]
or eax, 1 shl 8 ; enable AGP
stdcall PciWrite32, [bus], [devfn], edi, eax ; write AGP cmd
invoke PciWrite32, [bus], [devfn], edi, eax ; write AGP cmd
mov esi, msgOK
call SysMsgBoardStr
invoke SysMsgBoardStr
ret
endp
; initialized data
; End of code
align 4
version dd (5 shl 16) or (API_VERSION and 0xFFFF)
data fixups
end data
include '../peimport.inc'
my_service db 'AGP', 0 ; max 16 chars include zero
@ -299,8 +275,6 @@ msg1 db '1x speed', 13, 10, 0
msgfast db 'Fast Write', 13, 10, 0
msgside db 'Side band addressing', 13, 10, 0
section '.data' data readable writable align 16
; uninitialized data
revision db ?

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@ -17,31 +17,26 @@
; WARNING: Cards must be inserted before the driver starts, and shouldn't be removed.
; This module doesn't handle insertions and removals.
format MS COFF
format PE DLL native
entry START
API_VERSION = 0x01000100
DRIVER_VERSION = 5
CURRENT_API = 0x0200
COMPATIBLE_API = 0x0100
API_VERSION = (COMPATIBLE_API shl 16) + CURRENT_API
CARDBUS_IO = 0xFC00
DEBUG = 1
__DEBUG__ = 1
__DEBUG_LEVEL__ = 1
section '.flat' readable writable executable
include '../proc32.inc'
include '../struct.inc'
include '../macros.inc'
include '../proc32.inc'
include '../imports.inc'
include '../pci.inc'
include '../pci_pe.inc'
include '../fdo.inc'
public START
public service_proc
public version
section '.flat' code readable align 16
;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; ;;
;; proc START ;;
@ -49,23 +44,19 @@ section '.flat' code readable align 16
;; (standard driver proc) ;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;
align 4
proc START stdcall, state:dword
proc START c, reason:dword, cmdline:dword
cmp [state], 1
jne .exit
.entry:
cmp [reason], DRV_ENTRY
jne .fail
DEBUGF 1, "Loading cardbus driver\n"
stdcall RegService, my_service, service_proc
invoke RegService, my_service, service_proc
call detect
ret
.fail:
.exit:
xor eax, eax
ret
@ -80,7 +71,6 @@ endp
;; (standard driver proc) ;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;
align 4
proc service_proc stdcall, ioctl:dword
mov edx, [ioctl]
@ -120,7 +110,7 @@ proc detect
xor eax, eax
mov [bus], eax
inc eax
call PciApi
invoke PciApi
cmp eax, -1
je .err
mov [last_bus], eax
@ -131,13 +121,13 @@ proc detect
.next_bus:
and [devfn], 0
.next_dev:
stdcall PciRead32, [bus], [devfn], PCI_VENDOR_ID
invoke PciRead32, [bus], [devfn], PCI_header02.vendor_id
test eax, eax
jz .next
cmp eax, -1
je .next
stdcall PciRead16, [bus], [devfn], 0x0a ; class & subclass
invoke PciRead16, [bus], [devfn], 0x0a ; class & subclass
cmp ax, 0x0607
je .found
@ -159,47 +149,46 @@ proc detect
.found:
DEBUGF 1, "Found cardbus bridge: bus=0x%x, dev=0x%x\n", [bus], [devfn]
stdcall PciRead8, [bus], [devfn], 0x0e ; get header type
invoke PciRead8, [bus], [devfn], PCI_header.header_type
DEBUGF 1, "Header type=0x%x\n", eax:2
test al, al
jz .next
cmp al, 2
jne .next
; Write PCI and cardbus numbers
stdcall PciRead32, [bus], [devfn], 0x18 ; PCcard latency settings + Card bus number, PCI bus number
and eax, 0xff000000 ; Keep original latency setting, clear the rest
invoke PciRead32, [bus], [devfn], PCI_header02.pci_bus_nr ; PCcard latency settings + Card bus number, PCI bus number
and eax, 0xff000000 ; Keep original latency setting, clear the rest
mov al, byte[bus]
mov ah, byte[card_bus]
mov ebx, [card_bus]
shl ebx, 16
or eax, ebx
DEBUGF 1, "Latency, bus,.. 0x%x\n", eax
stdcall PciWrite32, [bus], [devfn], 0x18, eax
invoke PciWrite32, [bus], [devfn], PCI_header02.pci_bus_nr, eax
; set ExCA legacy mode base
stdcall PciWrite32, [bus], [devfn], 0x44, 1
invoke PciWrite32, [bus], [devfn], 0x44, 1
; Enable power
stdcall PciRead8, [bus], [devfn], 0x14 ; get capabilities offset
invoke PciRead8, [bus], [devfn], 0x14 ; get capabilities offset
movzx eax, al ; (A0 for TI bridges)
DEBUGF 1, "Capabilities offset=0x%x\n", eax:2
add al, 4 ; Power management control/status
stdcall PciWrite16, [bus], [devfn], eax, 0x0100 ; Enable PME signaling, power state=D0
invoke PciWrite16, [bus], [devfn], eax, 0x0100 ; Enable PME signaling, power state=D0
; Enable Bus master, io space, memory space
stdcall PciWrite16, [bus], [devfn], PCI_REG_COMMAND, 0x0007
invoke PciWrite16, [bus], [devfn], PCI_header02.command, 0x0007
; Write CardBus Socket/ExCA base address
mov eax, 0x7f000000
push eax
stdcall PciWrite32, [bus], [devfn], 0x10, eax ; base is 4 Kbyte aligned
invoke PciWrite32, [bus], [devfn], PCI_header02.base_addr, eax ; base is 4 Kbyte aligned
pop ebx
stdcall MapIoMem, ebx, 4096, 0x1b
invoke MapIoMem, ebx, 4096, 0x1b
mov ecx, eax
; Check if a card is present in the socket
@ -212,7 +201,7 @@ proc detect
; No card found... set PCI command back to 0
stdcall PciWrite16, [bus], [devfn], PCI_REG_COMMAND, 0 ; To avoid conflicts with other sockets
invoke PciWrite16, [bus], [devfn], PCI_header02.command, 0 ; To avoid conflicts with other sockets
DEBUGF 1, "Cardbus KO\n"
jmp .next
@ -222,7 +211,7 @@ proc detect
mov dword[ecx + 0x10], 0x33 ; Request 3.3V for Vcc and Vpp (Control register)
;push ecx
;mov esi, 10
;call Sleep
;invoke Sleep
;pop ecx
;mov byte[ecx + 0x803], 0x40 ; stop reset
mov dword[ecx + 0xC], 0x4000 ; force Card CV test (Force register) ;;; WHY???
@ -245,23 +234,23 @@ irp regvalue, 0x7efff000, 0x7effffff, 0x7effe000, 0x7effe000, CARDBUS_IO,
common
reg = 0x1C
forward
stdcall PciWrite32, [bus], [devfn], reg, regvalue
invoke PciWrite32, [bus], [devfn], reg, regvalue
DEBUGF 1, "Writing 0x%x to 0x%x\n", regvalue, reg
reg = reg + 4
}
stdcall PciWrite8, [bus], [devfn], 0x3c, 0xc ; IRQ line
invoke PciWrite8, [bus], [devfn], PCI_header02.interrupt_line, 0xc ; IRQ line
stdcall PciRead16, [bus], [devfn], 0x3e ; Bridge control
invoke PciRead16, [bus], [devfn], PCI_header02.bridge_ctrl ; Bridge control
or ax, 0x0700 ; Enable write posting, both memory windows prefetchable
stdcall PciWrite16, [bus], [devfn], 0x3e, eax
invoke PciWrite16, [bus], [devfn], PCI_header02.bridge_ctrl, eax
DEBUGF 1, "Write posting enabled\n"
DEBUGF 1, "Bridge PCI registers:\n"
rept 17 reg
{
stdcall PciRead32, [bus], [devfn], 4*(reg-1)
invoke PciRead32, [bus], [devfn], 4*(reg-1)
DEBUGF 1, "0x%x\n", eax
}
@ -271,11 +260,11 @@ rept 17 reg
mov ecx, 100
.waitactive:
push ecx
stdcall PciRead32, [card_bus], 0, PCI_VENDOR_ID ; Check if the card is awake yet
invoke PciRead32, [card_bus], 0, PCI_header02.vendor_id ; Check if the card is awake yet
inc eax
jnz .got_it
mov esi, 2
call Sleep
invoke Sleep
pop ecx
dec ecx
jnz .waitactive
@ -288,9 +277,9 @@ rept 17 reg
pop eax
DEBUGF 1, "Card is enabled!\n"
stdcall PciWrite32, [card_bus], 0, PCI_BASE_ADDRESS_0, CARDBUS_IO ; Supposing it's IO space that is needed
stdcall PciWrite8, [card_bus], 0, PCI_REG_IRQ, 0xC ; FIXME
stdcall PciWrite16, [card_bus], 0, PCI_REG_COMMAND, PCI_BIT_PIO or PCI_BIT_MMIO
invoke PciWrite32, [card_bus], 0, PCI_header02.base_addr, CARDBUS_IO ; Supposing it's IO space that is needed
invoke PciWrite8, [card_bus], 0, PCI_header02.interrupt_line, 0xC ; FIXME
invoke PciWrite16, [card_bus], 0, PCI_header02.command, PCI_CMD_PIO or PCI_CMD_MMIO
DEBUGF 1, "done\n"
@ -302,18 +291,16 @@ rept 17 reg
ret
endp
; End of code
section '.data' data readable writable align 16
data fixups
end data
include '../peimport.inc'
version dd (DRIVER_VERSION shl 16) or (API_VERSION and 0xFFFF)
my_service db 'CARDBUS',0 ; max 16 chars include zero
include_debug_strings ; All data wich FDO uses will be included here