forked from KolibriOS/kolibrios
i915: 3.12.9 fix tiling for Gen3 gpu's
git-svn-id: svn://kolibrios.org@4557 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
Sergey Semyonov (Serge)
parent
49560506b1
commit
9297b1d4c8
@ -3352,7 +3352,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
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intel_crtc->config.has_pch_encoder);
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intel_enable_plane(dev_priv, plane, pipe);
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intel_enable_planes(crtc);
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// intel_crtc_update_cursor(crtc, true);
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intel_crtc_update_cursor(crtc, true);
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if (intel_crtc->config.has_pch_encoder)
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ironlake_pch_enable(crtc);
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@ -3460,7 +3460,7 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
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intel_crtc->config.has_pch_encoder);
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intel_enable_plane(dev_priv, plane, pipe);
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intel_enable_planes(crtc);
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// intel_crtc_update_cursor(crtc, true);
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intel_crtc_update_cursor(crtc, true);
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hsw_enable_ips(intel_crtc);
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@ -3523,7 +3523,7 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc)
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if (dev_priv->fbc.plane == plane)
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intel_disable_fbc(dev);
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// intel_crtc_update_cursor(crtc, false);
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intel_crtc_update_cursor(crtc, false);
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intel_disable_planes(crtc);
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intel_disable_plane(dev_priv, plane, pipe);
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@ -3596,7 +3596,7 @@ static void haswell_crtc_disable(struct drm_crtc *crtc)
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hsw_disable_ips(intel_crtc);
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// intel_crtc_update_cursor(crtc, false);
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intel_crtc_update_cursor(crtc, false);
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intel_disable_planes(crtc);
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intel_disable_plane(dev_priv, plane, pipe);
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@ -3739,7 +3739,7 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
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intel_enable_pipe(dev_priv, pipe, false);
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intel_enable_plane(dev_priv, plane, pipe);
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intel_enable_planes(crtc);
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// intel_crtc_update_cursor(crtc, true);
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intel_crtc_update_cursor(crtc, true);
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intel_update_fbc(dev);
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@ -3780,7 +3780,7 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
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/* The fixup needs to happen before cursor is enabled */
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if (IS_G4X(dev))
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g4x_fixup_plane(dev_priv, pipe);
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// intel_crtc_update_cursor(crtc, true);
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intel_crtc_update_cursor(crtc, true);
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/* Give the overlay scaler a chance to enable if it's on this pipe */
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intel_crtc_dpms_overlay(intel_crtc, true);
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@ -3829,7 +3829,7 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc)
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intel_disable_fbc(dev);
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intel_crtc_dpms_overlay(intel_crtc, false);
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// intel_crtc_update_cursor(crtc, false);
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intel_crtc_update_cursor(crtc, false);
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intel_disable_planes(crtc);
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intel_disable_plane(dev_priv, plane, pipe);
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@ -3841,6 +3841,9 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc)
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if (encoder->post_disable)
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encoder->post_disable(encoder);
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if (IS_VALLEYVIEW(dev))
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vlv_disable_pll(dev_priv, pipe);
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else
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i9xx_disable_pll(dev_priv, pipe);
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intel_crtc->active = false;
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@ -6794,6 +6797,7 @@ static void i845_update_cursor(struct drm_crtc *crtc, u32 base)
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intel_crtc->cursor_visible = visible;
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}
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#endif
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static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base)
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{
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@ -6906,13 +6910,11 @@ static void intel_crtc_update_cursor(struct drm_crtc *crtc,
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ivb_update_cursor(crtc, base);
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} else {
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I915_WRITE(CURPOS(pipe), pos);
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if (IS_845G(dev) || IS_I865G(dev))
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i845_update_cursor(crtc, base);
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else
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i9xx_update_cursor(crtc, base);
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}
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}
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#if 0
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static int intel_crtc_cursor_set(struct drm_crtc *crtc,
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struct drm_file *file,
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uint32_t handle,
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@ -7027,6 +7029,7 @@ fail:
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drm_gem_object_unreference_unlocked(&obj->base);
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return ret;
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}
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#endif
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static int intel_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
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{
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@ -7040,7 +7043,6 @@ static int intel_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
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return 0;
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}
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#endif
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/** Sets the color ramps on behalf of RandR */
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void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
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@ -9348,7 +9350,7 @@ out_config:
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static const struct drm_crtc_funcs intel_crtc_funcs = {
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// .cursor_set = intel_crtc_cursor_set,
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// .cursor_move = intel_crtc_cursor_move,
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.cursor_move = intel_crtc_cursor_move,
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.gamma_set = intel_crtc_gamma_set,
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.set_config = intel_crtc_set_config,
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.destroy = intel_crtc_destroy,
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@ -111,6 +111,7 @@ bool set_mode(struct drm_device *dev, struct drm_connector *connector,
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const char *con_name;
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const char *enc_name;
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unsigned hdisplay, vdisplay;
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int stride;
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int ret;
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mutex_lock(&dev->mode_config.mutex);
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@ -169,10 +170,27 @@ do_set:
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fb->width = reqmode->width;
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fb->height = reqmode->height;
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fb->pitches[0] = fb->pitches[1] = fb->pitches[2] =
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fb->pitches[3] = ALIGN(reqmode->width * 4, 512);
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if(dev_priv->mm.bit_6_swizzle_x != I915_BIT_6_SWIZZLE_NONE)
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{
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fb_obj->tiling_mode = I915_TILING_X;
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fb_obj->stride = fb->pitches[0];
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if(IS_GEN3(dev))
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for (stride = 512; stride < reqmode->width * 4; stride <<= 1);
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else
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stride = ALIGN(reqmode->width * 4, 512);
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}
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else
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{
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fb_obj->tiling_mode = I915_TILING_NONE;
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stride = ALIGN(reqmode->width * 4, 64);
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}
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fb->pitches[0] =
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fb->pitches[1] =
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fb->pitches[2] =
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fb->pitches[3] = stride;
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fb_obj->stride = stride;
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fb->bits_per_pixel = 32;
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fb->depth = 24;
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@ -590,86 +608,14 @@ int init_cursor(cursor_t *cursor)
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}
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static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base)
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{
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struct drm_device *dev = crtc->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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int pipe = intel_crtc->pipe;
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bool visible = base != 0;
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if (intel_crtc->cursor_visible != visible) {
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uint32_t cntl = I915_READ(CURCNTR(pipe));
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if (base) {
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cntl &= ~(CURSOR_MODE | MCURSOR_PIPE_SELECT);
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cntl |= CURSOR_MODE_64_ARGB_AX | MCURSOR_GAMMA_ENABLE;
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cntl |= pipe << 28; /* Connect to correct pipe */
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} else {
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cntl &= ~(CURSOR_MODE | MCURSOR_GAMMA_ENABLE);
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cntl |= CURSOR_MODE_DISABLE;
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}
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I915_WRITE(CURCNTR(pipe), cntl);
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intel_crtc->cursor_visible = visible;
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}
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/* and commit changes on next vblank */
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I915_WRITE(CURBASE(pipe), base);
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}
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void __stdcall move_cursor_kms(cursor_t *cursor, int x, int y)
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{
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struct drm_i915_private *dev_priv = os_display->ddev->dev_private;
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struct intel_crtc *intel_crtc = to_intel_crtc(os_display->crtc);
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u32 base, pos;
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bool visible;
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struct drm_crtc *crtc = os_display->crtc;
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x-= cursor->hot_x;
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y-= cursor->hot_y;
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int pipe = intel_crtc->pipe;
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intel_crtc->cursor_x = x;
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intel_crtc->cursor_y = y;
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x = x - cursor->hot_x;
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y = y - cursor->hot_y;
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pos = 0;
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base = intel_crtc->cursor_addr;
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if (x >= os_display->width)
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base = 0;
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if (y >= os_display->height)
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base = 0;
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if (x < 0)
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{
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if (x + intel_crtc->cursor_width < 0)
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base = 0;
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pos |= CURSOR_POS_SIGN << CURSOR_X_SHIFT;
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x = -x;
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}
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pos |= x << CURSOR_X_SHIFT;
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if (y < 0)
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{
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if (y + intel_crtc->cursor_height < 0)
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base = 0;
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pos |= CURSOR_POS_SIGN << CURSOR_Y_SHIFT;
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y = -y;
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}
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pos |= y << CURSOR_Y_SHIFT;
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visible = base != 0;
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if (!visible && !intel_crtc->cursor_visible)
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return;
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I915_WRITE(CURPOS(pipe), pos);
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// if (IS_845G(dev) || IS_I865G(dev))
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// i845_update_cursor(crtc, base);
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// else
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i9xx_update_cursor(os_display->crtc, base);
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if (crtc->funcs->cursor_move)
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crtc->funcs->cursor_move(crtc, x, y);
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};
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@ -683,6 +629,8 @@ cursor_t* __stdcall select_cursor_kms(cursor_t *cursor)
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old = os_display->cursor;
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os_display->cursor = cursor;
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intel_crtc->cursor_bo = cursor->cobj;
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if (!dev_priv->info->cursor_needs_physical)
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intel_crtc->cursor_addr = i915_gem_obj_ggtt_offset(cursor->cobj);
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else
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