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https://git.missingno.dev/kolibrios-nvme-driver/
synced 2025-01-03 11:25:55 +01:00
disable MSI interrupts if present
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3d78f22409
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@ -882,8 +882,46 @@ proc nvme_init stdcall, pci:dword
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and eax, not (1 shl 10)
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invoke PciWrite16, dword [esi + pcidev.bus], dword [esi + pcidev.devfn], PCI_header00.command, eax
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mov edi, dword [esi + pcidev.io_addr]
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; Check if the device has a pointer to the capabilities list (status register bit 4 set to 1)
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; though this check is probably unnecessary since all PCIe devices should have this bit set to 1
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invoke PciRead16, dword [esi + pcidev.bus], dword [esi + pcidev.devfn], PCI_header00.status
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test ax, (1 shl 4)
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jz .exit_fail
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invoke PciRead8, dword [esi + pcidev.bus], dword [esi + pcidev.devfn], PCI_header00.cap_ptr
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and eax, 0xfc ; bottom two bits are reserved, so mask them before we access the configuration space
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mov edi, eax
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DEBUGF DBG_INFO, "nvme%u: Checking capabilities: %x\n", [esi + pcidev.num], edi
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; We need to check if there are any MSI/MSI-X capabilities, and if so, make sure they're disabled since
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; we're using old fashioned pin-based interrupts (for now)
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.read_cap:
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invoke PciRead32, dword [esi + pcidev.bus], dword [esi + pcidev.devfn], edi
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add edi, 2
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cmp al, MSICAP_CID
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je .got_msi_cap
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cmp al, MSIXCAP_CID
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je .got_msix_cap
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movzx edi, ah
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test edi, edi
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jnz .read_cap
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jmp .end_cap_parse
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.got_msi_cap:
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DEBUGF DBG_INFO, "nvme%u: Found MSI capability\n", [esi + pcidev.num]
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invoke PciRead32, dword [esi + pcidev.bus], dword [esi + pcidev.devfn], edi
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and eax, not MSICAP_MSIE
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invoke PciWrite32, dword [esi + pcidev.bus], dword [esi + pcidev.devfn], edi
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jmp .end_cap_parse
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.got_msix_cap:
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DEBUGF DBG_INFO, "nvme%u: Found MSI-X capability\n", [esi + pcidev.num]
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invoke PciRead32, dword [esi + pcidev.bus], dword [esi + pcidev.devfn], edi
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and eax, not MSIXCAP_MXE
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invoke PciWrite32, dword [esi + pcidev.bus], dword [esi + pcidev.devfn], edi
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.end_cap_parse:
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mov edi, dword [esi + pcidev.io_addr]
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if 0
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mov eax, dword [edi + NVME_MMIO.CAP]
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DEBUGF DBG_INFO, "(NVMe) CAP (0-31): 0x%x\n", eax
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@ -26,6 +26,11 @@ CQ_ENTRIES = NVM_ACQS ; I/O and Admin Completion Queue Size
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PAGE_SIZE = 4096 shl NVM_MPS
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SUPPORTED_LBADS = 9 ; KolibriOS only supports LBADS of 512, later on we may remove this restriction
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MSIXCAP_CID = 0x11
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MSIXCAP_MXE = 1 shl 15 ; MSI-X Enable bit
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MSICAP_CID = 0x05
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MSICAP_MSIE = 1 ; MSI Enable bit
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ADMIN_QUEUE = 0 ; Admin Queue ID
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IEN_ON = 2
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