- SysFuncs docs updated;
- PCI Expansion ROM is now readable via uMMIO. git-svn-id: svn://kolibrios.org@1353 a494cfbc-eb01-0410-851d-a64ba20cac60
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Artem Jerdev (art_zh)
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commit
10f720429e
@ -431,18 +431,21 @@ align 4
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pci_mmio_map:
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and edx,0x0ffff
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cmp ah,6
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jc @f
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jc .bar_0_5
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jz .bar_rom
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mov eax,-2
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ret
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@@:
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.bar_rom:
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mov ah, 8 ; bar6 = Expansion ROM base address
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.bar_0_5:
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push ecx
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add ebx, 4095
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and ebx,-4096
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push ebx
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mov bl, ah ; bl = BAR# (0..5)
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mov bl, ah ; bl = BAR# (0..5), however bl=8 for BAR6
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shl bl, 1
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shl bl, 1
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add bl, 0x10 ; bl = BARs offset in PCI config. space
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add bl, 0x10 ; now bl = BAR offset in PCI config. space
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mov ax,word [mmio_pci_addr]
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mov bh, al ; bh = dddddfff
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mov al, 2 ; al : DW to read
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@ -3289,6 +3289,63 @@ IPC
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¢å®¤¨â, ¯à¨¬¥à, ¢ ¨§¢¥áâë© Interrupt List by Ralf Brown;
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ᯨ᮪ ¢â®àëå ¤®«¦¥ ¡ëâì 㪠§ ¢ ¤®ªã¬¥â 樨 ¯® ãáâனáâ¢ã.
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======================================================================
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====================== ”ãªæ¨ï 62, ¯®¤äãªæ¨ï 11 =====================
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== ˆ¨æ¨ «¨§¨à®¢ âì ¯®«ì§®¢ ⥫ì᪨© ‚/‚ á ®â®¡à ¦¥¨¥¬ ¯ ¬ïâì ==
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======================================================================
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<EFBFBD> à ¬¥âàë:
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* eax = 62 - ®¬¥à äãªæ¨¨
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* bl = 11 - ®¬¥à ¯®¤äãªæ¨¨
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* cx = ¤à¥á PCI-ãáâனáâ¢
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‚®§¢à é ¥¬®¥ § 票¥:
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* eax = -1 - ¤®áâ㯠ª PCI § ¯à¥éñ;
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* eax = -2 - ¤®áâ㯠ª MMIO-¡«®ª ¬ ãáâனá⢠¥ à §à¥èñ;
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* eax = -3 - ®è¨¡ª ««®ª 樨 ¯®«ì§®¢ ⥫ì᪮© ¤¨. ¯ ¬ïâ¨; ¨ ç¥
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* eax = à §¬¥à ¤®áâ㯮© ¤¨ ¬¨ç¥áª®© ¯ ¬ïâ¨.
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‡ ¬¥ç ¨ï:
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* <20>।¢ à¨â¥«ì® ¤®«¦¥ ¡ëâì à §à¥èñ ¨§ª®ã஢¥¢ë© ¤®áâ㯠ª PCI
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¤«ï ¯à¨«®¦¥¨© ¯®¤äãªæ¨¥© 12 äãªæ¨¨ 21.
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* ¤à¥á PCI-ãáâனá⢠¤®«¦¥ ᮢ¯ ¤ âì á á¨á⥬®© ¯¥à¥¬¥®©
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mmio_pci_addr
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======================================================================
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====================== ”ãªæ¨ï 62, ¯®¤äãªæ¨ï 12 =====================
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== ‚뤥«¨âì ¤¨ ¯ §® «¨¥©ëå ¤à¥á®¢ ¤«ï ¯®«ì§®¢ ⥫ì᪮£® MMIO ==
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======================================================================
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<EFBFBD> à ¬¥âàë:
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* eax = 62 - ®¬¥à äãªæ¨¨
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* bl = 12 - ®¬¥à ¯®¤äãªæ¨¨
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* bh = ®¬¥à BAR-ॣ¨áâà ¢ ª®ä¨£ãà 樮®© §®¥ PCI
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* ecx = à §¬¥à MMIO-¡«®ª (¢ ¡ ©â å)
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* edx = ᬥ饨¥ ®â®á¨â¥«ì® ç « MMIO-¡«®ª (¢ 4K-áâà ¨æ å!)
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‚®§¢à é ¥¬®¥ § 票¥:
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* eax = -1 - ¤®áâ㯠ª PCI § ¯à¥éñ;
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* eax = -2 - ¥¢¥àë© ®¬¥à BAR-ॣ¨áâà ;
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* eax = -3 - BAR ¥ ᮤ¥à¦¨â ¤à¥á IO;
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* eax = -4 - BAR ¤à¥áã¥â ¯®àâë IO;
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* eax = -5 - ®è¨¡ª ««®ª 樨; ¨ ç¥
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* eax = ç «ìë© ¤à¥á MMIO ¢ ¤à¥á®¬ ¯à®áâà á⢥ ¯à¨«®¦¥¨ï.
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‡ ¬¥ç ¨ï:
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* <20>।¢ à¨â¥«ì® ¤®«¦¥ ¡ëâì à §à¥èñ ¨§ª®ã஢¥¢ë© ¤®áâ㯠ª PCI
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¤«ï ¯à¨«®¦¥¨© ¯®¤äãªæ¨¥© 12 äãªæ¨¨ 21.
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* €¤à¥á PCI-ãáâனá⢠§ ¤ ¥âáï á¨á⥬®© ¯¥à¥¬¥®© mmio_pci_addr.
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* <20>।®áâ ¢«¥ë© ¤¨ ¯ §® «¨¥©ëå ¤à¥á®¢ ¤®«¦¥ ®á¢®¡®¦¤ âìáï
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¯®á।á⢮¬ ¢ë§®¢ äãªæ¨¨ 62:13
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======================================================================
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====================== ”ãªæ¨ï 62, ¯®¤äãªæ¨ï 13 =====================
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== Žá¢®¡®¤¨âì ¤¨ ¯ §® «¨¥©ëå ¤à¥á®¢ ¯®«ì§®¢ ⥫ì᪮£® MMIO ==
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======================================================================
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<EFBFBD> à ¬¥âàë:
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* eax = 62 - ®¬¥à äãªæ¨¨
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* bl = 12 - ®¬¥à ¯®¤äãªæ¨¨
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* ecx = ç «ìë© ¤à¥á ®á¢®¡®¦¤ ¥¬®£® MMIO-¡«®ª ¢ ¤à¥á®¬
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¯à®áâà á⢥ ¯à¨«®¦¥¨ï
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‚®§¢à é ¥¬®¥ § 票¥:
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* eax = 1 - ¡«®ª ãá¯¥è® ®á¢®¡®¦¤¥;
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‡ ¬¥ç ¨ï:
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* <20>।¢ à¨â¥«ì® ¯à¨«®¦¥¨î ¤®«¦¥ ¡ëâì ¢ë¤¥«¥ uMMIO-¡«®ª (fn62:12)
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======================================================================
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================ ”ãªæ¨ï 63 - à ¡®â á ¤®áª®© ®â« ¤ª¨. ===============
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======================================================================
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@ -3260,6 +3260,59 @@ Remarks:
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Ralf Brown; registers of the second type must be listed
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in the device documentation.
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======================================================================
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===================== Function 62, subfunction 11 ====================
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== Initialize user-accessible MMIO channel ==
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======================================================================
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Parameters:
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* eax = 62 - function
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* bl = 11 - subfunction
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* cx = PCI-address (bbbbbbbb dddddfff)
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Returns:
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* eax = -1 - PCI access not granted;
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* eax = -2 - no user MMIO access to this PCI address;
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* eax = -3 - memory allocation error; otherwise
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* eax = available user heap size.
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Remarks:
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* Low-level PCI access must be allowed (fn21:12)
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* PCI-address should correspond the system var [mmio_pci_addr]
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======================================================================
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===================== Function 62, subfunction 12 ====================
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== Request user-accessible MMIO address space ==
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======================================================================
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Parameters:
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* eax = 62 - function
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* bl = 12 - subfunction
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* bh = BAR number in PCI configuration space
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* ecx = MMIO-block size needed (bytes)
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* edx = MMIO-offset (number of whole 4Kb-pages!)
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Returns:
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* eax = -1 - user PCI access denied;
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* eax = -2 - invalid BAR number;
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* eax = -3 - BAR contains no valid IO addres;
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* eax = -4 - BAR addresses IO ports;
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* eax = -5 - dynamic allocation error; otherwise
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* eax = MMIO start address (in application's linear space).
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Remarks:
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* Low-level PCI access must be allowed (fn21:12)
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* The system var [mmio_pci_addr] sets the actual PCI-address
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* The granted MMIO addresses should be released after use (fn62:13)
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======================================================================
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===================== Function 62, subfunction 13 ====================
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== Release a block of user MMIO addresses ==
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======================================================================
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<EFBFBD> à ¬¥âàë:
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* eax = 62 - function
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* bl = 12 - subfunction
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* ecx = MMIO start address (in application's linear space).
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Returns:
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* eax = 1 if the block is successfully released;
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* eax = 0 in case of reallocation error;
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Remarks:
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* A valid uMMIO block should exist at this address (fn62:12)
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======================================================================
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============== Function 63 - work with the debug board. ==============
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======================================================================
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@ -473,11 +473,19 @@ Try_MMIO:
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mcall 4
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jmp mmio_next_bar
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@@:
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cmp bh, '6' ; expansion ROM ?
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je @f
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mov [bar_ram+3], bh
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mov ebx, [gr_pos]
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mov edx, bar_ram
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mcall 4
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jump mmio_dump
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@@:
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mov ebx, [gr_pos]
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mov edx, bar_rom
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mcall 4
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mmio_dump:
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mov edx, eax
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mov esi, 64
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mov ecx, 0x099 ; dump color : blue
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@ -490,7 +498,7 @@ Try_MMIO:
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mmio_next_bar:
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mov bh, [MMIO_BAR]
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inc bh
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cmp bh,6
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cmp bh,7
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je @f
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mov [MMIO_BAR], bh
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add [gr_pos], 10
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@ -529,7 +537,7 @@ PCIWin mls \
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bar_ram db 'BARx: MMIO block', 0
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bar_io db 'BARx: IO ports',0
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bar_um db 'BARx: unmapped',0
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bar_rom db 'BAR6: Onboard ROM', 0 ; << no ROM test yet
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bar_rom db 'BAR6: Expansion ROM', 0
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;------------------------------------------------------------------
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; UNINITIALIZED DATA AREA
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