Use xsave/xrestor if available, enable AVX* instructions.
git-svn-id: svn://kolibrios.org@7124 a494cfbc-eb01-0410-851d-a64ba20cac60
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@ -8,7 +8,7 @@
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$Revision$
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dpl0 equ 10010000b ; data read dpl0
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dpl0 equ 10010000b ; data read dpl0
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drw0 equ 10010010b ; data read/write dpl0
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drw3 equ 11110010b ; data read/write dpl3
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cpl0 equ 10011010b ; code read dpl0
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@ -78,6 +78,12 @@ CAPS_CID equ 42 ;
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; 44
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CAPS_CX16 equ 45 ;CMPXCHG16B instruction
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CAPS_xTPR equ 46 ;
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CAPS_XSAVE equ (32 + 26) ; XSAVE and XRSTOR instructions
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CAPS_OSXSAVE equ (32 + 27)
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; A value of 1 indicates that the OS has set CR4.OSXSAVE[bit 18] to enable
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; XSETBV/XGETBV instructions to access XCR0 and to support processor extended
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; state management using XSAVE/XRSTOR.
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CAPS_AVX equ (32 + 28) ; not AVX2
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;
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;reserved
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;
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@ -117,34 +123,41 @@ CR0_CD equ 0x40000000 ;cache disable
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CR0_PG equ 0x80000000 ;paging
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CR4_VME equ 0x0001
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CR4_PVI equ 0x0002
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CR4_TSD equ 0x0004
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CR4_DE equ 0x0008
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CR4_PSE equ 0x0010
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CR4_PAE equ 0x0020
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CR4_MCE equ 0x0040
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CR4_PGE equ 0x0080
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CR4_PCE equ 0x0100
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CR4_OSFXSR equ 0x0200
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CR4_OSXMMEXPT equ 0x0400
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CR4_VME equ 0x000001
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CR4_PVI equ 0x000002
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CR4_TSD equ 0x000004
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CR4_DE equ 0x000008
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CR4_PSE equ 0x000010
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CR4_PAE equ 0x000020
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CR4_MCE equ 0x000040
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CR4_PGE equ 0x000080
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CR4_PCE equ 0x000100
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CR4_OSFXSR equ 0x000200
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CR4_OSXMMEXPT equ 0x000400
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CR4_OSXSAVE equ 0x040000
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SSE_IE equ 0x0001
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SSE_DE equ 0x0002
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SSE_ZE equ 0x0004
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SSE_OE equ 0x0008
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SSE_UE equ 0x0010
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SSE_PE equ 0x0020
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SSE_DAZ equ 0x0040
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SSE_IM equ 0x0080
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SSE_DM equ 0x0100
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SSE_ZM equ 0x0200
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SSE_OM equ 0x0400
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SSE_UM equ 0x0800
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SSE_PM equ 0x1000
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SSE_FZ equ 0x8000
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XCR0_FPU_MMX equ 0x0001
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XCR0_SSE equ 0x0002
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XCR0_AVX equ 0x0004
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XCR0_MPX equ 0x0018
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XCR0_AVX512 equ 0x00e0
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SSE_INIT equ (SSE_IM+SSE_DM+SSE_ZM+SSE_OM+SSE_UM+SSE_PM)
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MXCSR_IE equ 0x0001
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MXCSR_DE equ 0x0002
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MXCSR_ZE equ 0x0004
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MXCSR_OE equ 0x0008
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MXCSR_UE equ 0x0010
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MXCSR_PE equ 0x0020
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MXCSR_DAZ equ 0x0040
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MXCSR_IM equ 0x0080
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MXCSR_DM equ 0x0100
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MXCSR_ZM equ 0x0200
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MXCSR_OM equ 0x0400
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MXCSR_UM equ 0x0800
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MXCSR_PM equ 0x1000
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MXCSR_FZ equ 0x8000
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MXCSR_INIT equ (MXCSR_IM+MXCSR_DM+MXCSR_ZM+MXCSR_OM+MXCSR_UM+MXCSR_PM)
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IRQ_PIC equ 0
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IRQ_APIC equ 1
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@ -252,7 +265,7 @@ new_app_base equ 0;
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twdw equ 0x2000 ;(CURRENT_TASK-window_data)
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std_application_base_address equ new_app_base
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RING0_STACK_SIZE equ (0x2000 - 512) ;512 байт для контекста FPU
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RING0_STACK_SIZE equ 0x2000
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REG_SS equ (RING0_STACK_SIZE-4)
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REG_APP_ESP equ (RING0_STACK_SIZE-8)
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@ -169,7 +169,7 @@ debug_getcontext:
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.ring0:
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; note that following code assumes that all interrupt/exception handlers
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; saves ring-3 context by pushad in this order
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; save ring-3 context by pushad in this order
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; top of ring0 stack: ring3 stack ptr (ss+esp), iret data (cs+eip+eflags), pushad
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sub esi, 8+12+20h
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lodsd ;edi
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@ -1,6 +1,6 @@
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; ;;
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;; Copyright (C) KolibriOS team 2004-2015. All rights reserved. ;;
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;; Copyright (C) KolibriOS team 2004-2017. All rights reserved. ;;
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;; Distributed under terms of the GNU General Public License ;;
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;; ;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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@ -12,19 +12,76 @@ init_fpu:
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clts
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fninit
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bt [cpu_caps], CAPS_SSE
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jnc .no_SSE
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bt [cpu_caps+(CAPS_XSAVE/8)], CAPS_XSAVE mod 8
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jnc .no_xsave
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mov ecx, cr4
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or ecx, CR4_OSXSAVE
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mov cr4, ecx
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mov eax, 0x0d
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xor ecx, ecx
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cpuid
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mov ebx, XCR0_FPU_MMX + XCR0_SSE + XCR0_AVX + XCR0_AVX512
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and ebx, eax
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xor ecx, ecx
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xgetbv
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or eax, ebx
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xor ecx, ecx
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xsetbv
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mov eax, 0x0d
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xor ecx, ecx
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cpuid
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mov [xsave_area_size], ebx
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test eax, XCR0_AVX512
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jz @f
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call init_avx512
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ret
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@@:
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test eax, XCR0_AVX
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jz @f
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call init_avx
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ret
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@@:
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test eax, XCR0_SSE
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jz @f
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call init_sse
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ret
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@@:
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call init_fpu_mmx
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ret
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.no_xsave:
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mov [xsave_area_size], 512 ; enough for FPU/MMX and SSE
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bt [cpu_caps], CAPS_SSE
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jnc @f
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call init_sse
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fxsave [fpu_data]
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ret
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@@:
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call init_fpu_mmx
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fnsave [fpu_data]
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ret
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init_fpu_mmx:
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mov ecx, cr0
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and ecx, not CR0_EM
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or ecx, CR0_MP + CR0_NE
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mov cr0, ecx
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ret
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init_sse:
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mov ebx, cr4
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mov ecx, cr0
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or ebx, CR4_OSFXSR+CR4_OSXMMEXPT
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mov cr4, ebx
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and ecx, not (CR0_MP+CR0_EM)
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and ecx, not (CR0_EM + CR0_MP)
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or ecx, CR0_NE
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mov cr0, ecx
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mov dword [esp-4], SSE_INIT
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mov dword [esp-4], MXCSR_INIT
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ldmxcsr [esp-4]
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xorps xmm0, xmm0
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@ -35,14 +92,46 @@ init_fpu:
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xorps xmm5, xmm5
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xorps xmm6, xmm6
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xorps xmm7, xmm7
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fxsave [fpu_data] ;[eax]
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ret
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.no_SSE:
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init_avx:
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mov ebx, cr4
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or ebx, CR4_OSFXSR + CR4_OSXMMEXPT
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mov cr4, ebx
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mov ecx, cr0
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and ecx, not CR0_EM
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or ecx, CR0_MP+CR0_NE
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and ecx, not (CR0_EM + CR0_MP)
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or ecx, CR0_NE
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mov cr0, ecx
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fnsave [fpu_data]
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mov dword [esp-4], MXCSR_INIT
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vldmxcsr [esp-4]
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vzeroall
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ret
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init_avx512:
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mov ebx, cr4
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or ebx, CR4_OSFXSR + CR4_OSXMMEXPT
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mov cr4, ebx
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mov ecx, cr0
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and ecx, not (CR0_EM + CR0_MP)
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or ecx, CR0_NE
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mov cr0, ecx
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mov dword [esp-4], MXCSR_INIT
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vldmxcsr [esp-4]
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vpxorq zmm0, zmm0, zmm0
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vpxorq zmm1, zmm1, zmm1
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vpxorq zmm2, zmm2, zmm2
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vpxorq zmm3, zmm3, zmm3
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vpxorq zmm4, zmm4, zmm4
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vpxorq zmm5, zmm5, zmm5
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vpxorq zmm6, zmm6, zmm6
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vpxorq zmm7, zmm7, zmm7
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ret
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; param
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@ -90,6 +179,11 @@ fpu_save:
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align 4
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save_context:
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bt [cpu_caps+(CAPS_OSXSAVE/8)], CAPS_OSXSAVE mod 8
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jnc .no_xsave
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xsave [eax]
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ret
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.no_xsave:
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bt [cpu_caps], CAPS_SSE
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jnc .no_SSE
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@ -115,6 +209,14 @@ fpu_restore:
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jne .copy
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clts
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bt [cpu_caps+(CAPS_OSXSAVE/8)], CAPS_OSXSAVE mod 8
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jnc .no_xsave
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xrstor [esi]
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popfd
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pop esi
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pop ecx
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ret
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.no_xsave:
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bt [cpu_caps], CAPS_SSE
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jnc .no_SSE
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@ -901,7 +901,9 @@ proc set_app_params stdcall,slot:dword, params:dword, flags:dword
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pl0_stack dd ?
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endl
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stdcall kernel_alloc, RING0_STACK_SIZE+512
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mov eax, [xsave_area_size]
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add eax, RING0_STACK_SIZE
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stdcall kernel_alloc, eax
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mov [pl0_stack], eax
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lea edi, [eax+RING0_STACK_SIZE]
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@ -432,6 +432,8 @@ cpu_sign dd ?
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cpu_info dd ?
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cpu_caps rd 4
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xsave_area_size dd ?
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pg_data PG_DATA
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heap_test dd ?
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@ -1184,7 +1184,7 @@ proc setup_os_slot
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mov [edx+APPDATA.io_map+4], eax
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mov dword [edx+APPDATA.pl0_stack], ebx
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lea edi, [ebx+0x2000-512]
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lea edi, [ebx+RING0_STACK_SIZE]
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mov dword [edx+APPDATA.fpu_state], edi
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mov dword [edx+APPDATA.saved_esp0], edi
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mov dword [edx+APPDATA.saved_esp], edi
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