i915: fix memory leak
git-svn-id: svn://kolibrios.org@3037 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
parent
a34e834d07
commit
c61318c4d9
@ -431,12 +431,9 @@ static int intel_gtt_init(void)
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u32 gtt_map_size;
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int ret;
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ENTER();
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ret = intel_private.driver->setup();
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if (ret != 0)
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{
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LEAVE();
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return ret;
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};
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@ -494,8 +491,6 @@ static int intel_gtt_init(void)
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intel_private.base.gma_bus_addr = (gma_addr & PCI_BASE_ADDRESS_MEM_MASK);
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LEAVE();
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return 0;
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}
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@ -16,19 +16,18 @@ struct hmm bm_mm;
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extern struct drm_device *main_device;
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void __attribute__((regparm(1))) destroy_bitmap(bitmap_t *bitmap)
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{
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dma_addr_t *pages = bitmap->obj->allocated_pages;;
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dma_addr_t *pages = bitmap->obj->allocated_pages;
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int i;
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printf("destroy bitmap %d\n", bitmap->handle);
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free_handle(&bm_mm, bitmap->handle);
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bitmap->handle = 0;
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bitmap->obj->base.read_domains = I915_GEM_DOMAIN_GTT;
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bitmap->obj->base.write_domain = I915_GEM_DOMAIN_CPU;
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mutex_lock(&main_device->struct_mutex);
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drm_gem_object_unreference(&bitmap->obj->base);
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mutex_unlock(&main_device->struct_mutex);
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@ -37,6 +36,8 @@ void __attribute__((regparm(1))) destroy_bitmap(bitmap_t *bitmap)
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for (i = 0; i < bitmap->page_count; i++)
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FreePage(pages[i]);
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DRM_DEBUG("%s freec %d pages\n", __FUNCTION__, bitmap->page_count);
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free(pages);
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};
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UserFree(bitmap->uaddr);
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@ -212,6 +213,8 @@ int create_surface(struct drm_device *dev, struct io_call_10 *pbitmap)
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bitmap->max_count = max_count;
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};
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DRM_DEBUG("%s alloc %d pages\n", __FUNCTION__, page_count);
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obj = i915_gem_alloc_object(dev, size);
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if (obj == NULL)
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goto err4;
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@ -243,7 +246,7 @@ int create_surface(struct drm_device *dev, struct io_call_10 *pbitmap)
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pbitmap->pitch = pitch;
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printf("%s handle: %d pitch: %d gpu_addr: %x user_addr: %x\n",
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DRM_DEBUG("%s handle: %d pitch: %d gpu_addr: %x user_addr: %x\n",
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__FUNCTION__, handle, pitch, obj->gtt_offset, uaddr);
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return 0;
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@ -282,7 +285,9 @@ int lock_surface(struct io_call_12 *pbitmap)
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if(unlikely(bitmap==NULL))
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return -1;
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mutex_lock(&main_device->struct_mutex);
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ret = i915_gem_object_set_to_cpu_domain(bitmap->obj, true);
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mutex_unlock(&main_device->struct_mutex);
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if(ret != 0 )
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{
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@ -338,7 +343,7 @@ int get_driver_caps(hwcaps_t *caps)
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void __attribute__((regparm(1))) destroy_context(struct context *context)
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{
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printf("destroy context %x\n", context);
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DRM_DEBUG("destroy context %x\n", context);
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context_map[context->slot] = NULL;
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@ -365,7 +370,7 @@ struct context *get_context(struct drm_device *dev)
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return context;
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context = CreateObject(GetPid(), sizeof(*context));
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printf("context %x\n", context);
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if( context != NULL)
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{
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drm_i915_private_t *dev_priv = dev->dev_private;
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@ -1297,8 +1297,6 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
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int ret = 0, mmio_bar, mmio_size;
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uint32_t aperture_size;
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ENTER();
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info = (struct intel_device_info *) flags;
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#if 0
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@ -1384,17 +1382,9 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
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aperture_size = dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
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dev_priv->mm.gtt_base_addr = dev_priv->mm.gtt->gma_bus_addr;
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dbgprintf("gtt_base_addr %x aperture_size %d\n",
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DRM_INFO("gtt_base_addr %x aperture_size %d\n",
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dev_priv->mm.gtt_base_addr, aperture_size );
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// dev_priv->mm.gtt_mapping =
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// io_mapping_create_wc(dev_priv->mm.gtt_base_addr,
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// aperture_size);
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// if (dev_priv->mm.gtt_mapping == NULL) {
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// ret = -EIO;
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// goto out_rmmap;
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// }
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// i915_mtrr_setup(dev_priv, dev_priv->mm.gtt_base_addr,
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// aperture_size);
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@ -1489,8 +1479,6 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
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if (IS_GEN5(dev))
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intel_gpu_ips_init(dev_priv);
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LEAVE();
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return 0;
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out_gem_unload:
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@ -455,7 +455,7 @@ int i915_init(void)
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return -ENODEV;
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}
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dbgprintf("device %x:%x\n", device.pci_dev.vendor,
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DRM_INFO("device %x:%x\n", device.pci_dev.vendor,
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device.pci_dev.device);
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if (intel_info->gen != 3) {
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@ -475,8 +475,6 @@ int drm_get_dev(struct pci_dev *pdev, const struct pci_device_id *ent)
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struct drm_device *dev;
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int ret;
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ENTER();
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dev = kzalloc(sizeof(*dev), 0);
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if (!dev)
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return -ENOMEM;
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@ -515,8 +513,6 @@ int drm_get_dev(struct pci_dev *pdev, const struct pci_device_id *ent)
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if (ret)
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goto err_g4;
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LEAVE();
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return 0;
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err_g4:
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@ -529,8 +525,6 @@ err_g4:
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//err_g1:
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free(dev);
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LEAVE();
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return ret;
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}
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@ -1409,6 +1409,7 @@ i915_gem_object_put_pages_gtt(struct drm_i915_gem_object *obj)
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for (i = 0; i < obj->pages.nents; i++)
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FreePage(obj->pages.page[i]);
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DRM_DEBUG_KMS("%s free %d pages\n", __FUNCTION__, obj->pages.nents);
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obj->dirty = 0;
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kfree(obj->pages.page);
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}
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@ -1465,7 +1466,7 @@ i915_gem_object_get_pages_gtt(struct drm_i915_gem_object *obj)
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obj->pages.page[i] = page;
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};
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DRM_DEBUG_KMS("%s alloc %d pages\n", __FUNCTION__, page_count);
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obj->pages.nents = page_count;
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@ -1835,8 +1836,6 @@ i915_gem_retire_work_handler(struct work_struct *work)
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bool idle;
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int i;
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// ENTER();
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dev_priv = container_of(work, drm_i915_private_t,
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mm.retire_work.work);
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dev = dev_priv->dev;
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@ -1844,7 +1843,6 @@ i915_gem_retire_work_handler(struct work_struct *work)
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/* Come back later if the device is busy... */
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if (!mutex_trylock(&dev->struct_mutex)) {
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queue_delayed_work(dev_priv->wq, &dev_priv->mm.retire_work, HZ);
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// LEAVE();
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return;
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}
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@ -1867,7 +1865,6 @@ i915_gem_retire_work_handler(struct work_struct *work)
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intel_mark_idle(dev);
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mutex_unlock(&dev->struct_mutex);
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// LEAVE();
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}
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/**
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@ -2518,7 +2518,6 @@ static struct drm_device *irq_device;
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void irq_handler_kms()
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{
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printf("%s\n",__FUNCTION__);
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ironlake_irq_handler(irq_device);
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}
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@ -2527,8 +2526,6 @@ int drm_irq_install(struct drm_device *dev)
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int irq_line;
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int ret = 0;
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ENTER();
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mutex_lock(&dev->struct_mutex);
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/* Driver must have been initialized */
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@ -2574,10 +2571,7 @@ int drm_irq_install(struct drm_device *dev)
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PciWrite16(dev->pdev->busnr, dev->pdev->devfn, 4, cmd);
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dbgprintf("PCI_CMD: %04x\n", cmd);
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DRM_INFO("i915: irq initialized.\n");
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LEAVE();
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DRM_DEBUG("i915: irq initialized.\n");
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return ret;
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}
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@ -1821,7 +1821,6 @@ static void intel_disable_pipe(struct drm_i915_private *dev_priv,
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I915_WRITE(reg, val & ~PIPECONF_ENABLE);
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intel_wait_for_pipe_off(dev_priv->dev, pipe);
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}
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/*
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@ -2216,7 +2215,6 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
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intel_unpin_fb_obj(to_intel_framebuffer(fb)->obj);
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mutex_unlock(&dev->struct_mutex);
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DRM_ERROR("failed to update base address\n");
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LEAVE();
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return ret;
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}
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@ -3357,7 +3355,6 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc)
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mutex_lock(&dev->struct_mutex);
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intel_update_fbc(dev);
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mutex_unlock(&dev->struct_mutex);
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}
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static void ironlake_crtc_off(struct drm_crtc *crtc)
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@ -7486,7 +7483,7 @@ static void intel_crtc_init(struct drm_device *dev, int pipe)
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drm_crtc_helper_add(&intel_crtc->base, &intel_helper_funcs);
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dbgprintf("CRTC %d mode %x FB %x enable %d\n",
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DRM_DEBUG_KMS("CRTC %d mode %x FB %x enable %d\n",
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intel_crtc->base.base.id, intel_crtc->base.mode,
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intel_crtc->base.fb, intel_crtc->base.enabled);
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@ -240,8 +240,6 @@ int intel_fbdev_init(struct drm_device *dev)
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drm_i915_private_t *dev_priv = dev->dev_private;
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int ret;
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ENTER();
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ifbdev = kzalloc(sizeof(struct intel_fbdev), GFP_KERNEL);
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if (!ifbdev)
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return -ENOMEM;
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@ -260,8 +258,7 @@ int intel_fbdev_init(struct drm_device *dev)
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drm_fb_helper_single_add_all_connectors(&ifbdev->helper);
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drm_fb_helper_initial_config(&ifbdev->helper, 32);
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LEAVE();
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return 0;
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return 0;
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}
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@ -34,7 +34,6 @@
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#include <drm/i915_drm.h>
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#include "i915_drv.h"
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struct gmbus_port {
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const char *name;
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int reg;
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@ -33,7 +33,6 @@
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#include <linux/moduleparam.h>
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#include "intel_drv.h"
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#define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
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void
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@ -1104,24 +1104,13 @@ static bool g4x_compute_wm0(struct drm_device *dev,
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int *cursor_wm)
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{
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struct drm_crtc *crtc;
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int htotal, hdisplay, clock, pixel_size;
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int line_time_us, line_count;
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int entries, tlb_miss;
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// ENTER();
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// dbgprintf("plane %d display %x cursor %x \n", plane, display, cursor);
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// dbgprintf("plane_wm %x cursor_wm %x \n", plane_wm, cursor_wm);
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crtc = intel_get_crtc_for_plane(dev, plane);
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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// dbgprintf("CRTC %d\n, fb %x, enabled %d\n",
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// crtc->base.id, crtc->fb, crtc->enabled );
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if (crtc->fb == NULL || !crtc->enabled || !intel_crtc->active) {
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*cursor_wm = cursor->guard_size;
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*plane_wm = display->guard_size;
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@ -1133,8 +1122,6 @@ static bool g4x_compute_wm0(struct drm_device *dev,
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clock = crtc->mode.clock;
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pixel_size = crtc->fb->bits_per_pixel / 8;
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// dbgprintf("mark 1\n");
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/* Use the small buffer method to calculate plane watermark */
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entries = ((clock * pixel_size / 1000) * display_latency_ns) / 1000;
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tlb_miss = display->fifo_size*display->cacheline_size - hdisplay * 8;
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@ -1145,37 +1132,18 @@ static bool g4x_compute_wm0(struct drm_device *dev,
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if (*plane_wm > (int)display->max_wm)
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*plane_wm = display->max_wm;
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// dbgprintf("clock %d line_time_us %d\n",clock, line_time_us );
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/* Use the large buffer method to calculate cursor watermark */
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line_time_us = ((htotal * 1000) / clock);
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line_count = (cursor_latency_ns / line_time_us + 1000) / 1000;
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entries = line_count * 64 * pixel_size;
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// dbgprintf("mark 3\n");
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// dbgprintf("fifo size %d line size %d\n",
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// cursor->fifo_size, cursor->cacheline_size);
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tlb_miss = cursor->fifo_size*cursor->cacheline_size - hdisplay * 8;
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if (tlb_miss > 0)
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entries += tlb_miss;
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// dbgprintf("mark 4\n");
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entries = DIV_ROUND_UP(entries, cursor->cacheline_size);
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// dbgprintf("entries %d \n",entries);
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*cursor_wm = entries + cursor->guard_size;
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if (*cursor_wm > (int)cursor->max_wm)
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*cursor_wm = (int)cursor->max_wm;
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// LEAVE();
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return true;
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}
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@ -1940,7 +1908,6 @@ static void sandybridge_update_wm(struct drm_device *dev)
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(fbc_wm << WM1_LP_FBC_SHIFT) |
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(plane_wm << WM1_LP_SR_SHIFT) |
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cursor_wm);
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}
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static void
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@ -2163,7 +2130,6 @@ void intel_update_watermarks(struct drm_device *dev)
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if (dev_priv->display.update_wm)
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dev_priv->display.update_wm(dev);
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}
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void intel_update_linetime_watermarks(struct drm_device *dev,
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@ -1178,8 +1178,6 @@ static int intel_wrap_ring_buffer(struct intel_ring_buffer *ring)
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uint32_t __iomem *virt;
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int rem = ring->size - ring->tail;
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ENTER();
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if (ring->space < rem) {
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int ret = intel_wait_ring_buffer(ring, rem);
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if (ret)
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@ -1194,8 +1192,7 @@ static int intel_wrap_ring_buffer(struct intel_ring_buffer *ring)
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ring->tail = 0;
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ring->space = ring_space(ring);
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LEAVE();
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return 0;
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return 0;
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}
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static int intel_ring_wait_seqno(struct intel_ring_buffer *ring, u32 seqno)
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@ -142,7 +142,7 @@ bool set_mode(struct drm_device *dev, struct drm_connector *connector,
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};
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};
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printf("%s failed\n", __FUNCTION__);
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DRM_ERROR("%s failed\n", __FUNCTION__);
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return -1;
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@ -202,7 +202,7 @@ do_set:
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sysSetScreen(fb->width, fb->height, fb->pitches[0]);
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dbgprintf("new mode %d x %d pitch %d\n",
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DRM_DEBUG_KMS("new mode %d x %d pitch %d\n",
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fb->width, fb->height, fb->pitches[0]);
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}
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else
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@ -249,7 +249,7 @@ static struct drm_connector* get_def_connector(struct drm_device *dev)
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crtc = encoder->crtc;
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dbgprintf("CONNECTOR %x ID: %d status %d encoder %x\n crtc %x",
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DRM_DEBUG_KMS("CONNECTOR %x ID: %d status %d encoder %x\n crtc %x",
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connector, connector->base.id,
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connector->status, connector->encoder,
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crtc);
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@ -278,8 +278,6 @@ int init_display_kms(struct drm_device *dev)
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u32_t ifl;
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int err;
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// ENTER();
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list_for_each_entry(connector, &dev->mode_config.connector_list, head)
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{
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if( connector->status != connector_status_connected)
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@ -289,14 +287,14 @@ int init_display_kms(struct drm_device *dev)
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encoder = connector_funcs->best_encoder(connector);
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if( encoder == NULL)
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{
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dbgprintf("CONNECTOR %x ID: %d no active encoders\n",
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DRM_DEBUG_KMS("CONNECTOR %x ID: %d no active encoders\n",
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connector, connector->base.id);
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continue;
|
||||
}
|
||||
connector->encoder = encoder;
|
||||
crtc = encoder->crtc;
|
||||
|
||||
dbgprintf("CONNECTOR %x ID:%d status:%d ENCODER %x CRTC %x ID:%d\n",
|
||||
DRM_DEBUG_KMS("CONNECTOR %x ID:%d status:%d ENCODER %x CRTC %x ID:%d\n",
|
||||
connector, connector->base.id,
|
||||
connector->status, connector->encoder,
|
||||
crtc, crtc->base.id );
|
||||
@ -306,7 +304,7 @@ int init_display_kms(struct drm_device *dev)
|
||||
|
||||
if(connector == NULL)
|
||||
{
|
||||
dbgprintf("No active connectors!\n");
|
||||
DRM_ERROR("No active connectors!\n");
|
||||
return -1;
|
||||
};
|
||||
|
||||
@ -329,7 +327,7 @@ int init_display_kms(struct drm_device *dev)
|
||||
|
||||
if(crtc == NULL)
|
||||
{
|
||||
dbgprintf("No CRTC for encoder %d\n", encoder->base.id);
|
||||
DRM_ERROR("No CRTC for encoder %d\n", encoder->base.id);
|
||||
return -1;
|
||||
};
|
||||
|
||||
@ -371,13 +369,6 @@ int init_display_kms(struct drm_device *dev)
|
||||
main_device = dev;
|
||||
|
||||
err = init_bitmaps();
|
||||
if( !err )
|
||||
{
|
||||
printf("Initialize bitmap manager\n");
|
||||
};
|
||||
|
||||
|
||||
// LEAVE();
|
||||
|
||||
return 0;
|
||||
};
|
||||
@ -387,8 +378,6 @@ int get_videomodes(videomode_t *mode, int *count)
|
||||
{
|
||||
int err = -1;
|
||||
|
||||
// ENTER();
|
||||
|
||||
// dbgprintf("mode %x count %d\n", mode, *count);
|
||||
|
||||
if( *count == 0 )
|
||||
@ -420,7 +409,6 @@ int get_videomodes(videomode_t *mode, int *count)
|
||||
*count = i;
|
||||
err = 0;
|
||||
};
|
||||
// LEAVE();
|
||||
return err;
|
||||
};
|
||||
|
||||
@ -428,8 +416,6 @@ int set_user_mode(videomode_t *mode)
|
||||
{
|
||||
int err = -1;
|
||||
|
||||
// ENTER();
|
||||
|
||||
// dbgprintf("width %d height %d vrefresh %d\n",
|
||||
// mode->width, mode->height, mode->freq);
|
||||
|
||||
@ -444,17 +430,19 @@ int set_user_mode(videomode_t *mode)
|
||||
err = 0;
|
||||
};
|
||||
|
||||
// LEAVE();
|
||||
return err;
|
||||
};
|
||||
|
||||
void __attribute__((regparm(1))) destroy_cursor(cursor_t *cursor)
|
||||
{
|
||||
/* FIXME synchronization */
|
||||
|
||||
list_del(&cursor->list);
|
||||
// radeon_bo_unpin(cursor->robj);
|
||||
// KernelFree(cursor->data);
|
||||
|
||||
i915_gem_object_unpin(cursor->cobj);
|
||||
|
||||
mutex_lock(&main_device->struct_mutex);
|
||||
drm_gem_object_unreference(&cursor->cobj->base);
|
||||
mutex_unlock(&main_device->struct_mutex);
|
||||
|
||||
__DestroyObject(cursor);
|
||||
};
|
||||
|
||||
@ -464,12 +452,11 @@ int init_cursor(cursor_t *cursor)
|
||||
struct drm_i915_gem_object *obj;
|
||||
uint32_t *bits;
|
||||
uint32_t *src;
|
||||
void *mapped;
|
||||
|
||||
int i,j;
|
||||
int ret;
|
||||
|
||||
// ENTER();
|
||||
|
||||
if (dev_priv->info->cursor_needs_physical)
|
||||
{
|
||||
bits = (uint32_t*)KernelAlloc(CURSOR_WIDTH*CURSOR_HEIGHT*4);
|
||||
@ -492,7 +479,7 @@ int init_cursor(cursor_t *cursor)
|
||||
/* You don't need to worry about fragmentation issues.
|
||||
* GTT space is continuous. I guarantee it. */
|
||||
|
||||
bits = (u32*)MapIoMem(dev_priv->mm.gtt->gma_bus_addr + obj->gtt_offset,
|
||||
mapped = bits = (u32*)MapIoMem(dev_priv->mm.gtt->gma_bus_addr + obj->gtt_offset,
|
||||
CURSOR_WIDTH*CURSOR_HEIGHT*4, PG_SW);
|
||||
|
||||
if (unlikely(bits == NULL))
|
||||
@ -516,6 +503,8 @@ int init_cursor(cursor_t *cursor)
|
||||
for(i = 0; i < CURSOR_WIDTH*(CURSOR_HEIGHT-32); i++)
|
||||
*bits++ = 0;
|
||||
|
||||
FreeKernelSpace(mapped);
|
||||
|
||||
// release old cursor
|
||||
|
||||
KernelFree(cursor->data);
|
||||
@ -523,7 +512,6 @@ int init_cursor(cursor_t *cursor)
|
||||
cursor->data = bits;
|
||||
|
||||
cursor->header.destroy = destroy_cursor;
|
||||
// LEAVE();
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -679,37 +667,19 @@ static u32_t get_display_map()
|
||||
typedef int v4si __attribute__ ((vector_size (16)));
|
||||
|
||||
|
||||
|
||||
static void
|
||||
i915_gem_execbuffer_retire_commands(struct drm_device *dev,
|
||||
struct drm_file *file,
|
||||
struct intel_ring_buffer *ring)
|
||||
{
|
||||
struct drm_i915_gem_request *request;
|
||||
u32 invalidate;
|
||||
u32 req;
|
||||
/*
|
||||
* Ensure that the commands in the batch buffer are
|
||||
* finished before the interrupt fires.
|
||||
*
|
||||
* The sampler always gets flushed on i965 (sigh).
|
||||
*/
|
||||
invalidate = I915_GEM_DOMAIN_COMMAND;
|
||||
if (INTEL_INFO(dev)->gen >= 4)
|
||||
invalidate |= I915_GEM_DOMAIN_SAMPLER;
|
||||
if (ring->flush(ring, invalidate, 0)) {
|
||||
i915_gem_next_request_seqno(ring);
|
||||
return;
|
||||
}
|
||||
/* Unconditionally force add_request to emit a full flush. */
|
||||
ring->gpu_caches_dirty = true;
|
||||
|
||||
/* Add a breadcrumb for the completion of the batch buffer */
|
||||
if (request == NULL || i915_add_request(ring, NULL, &req)) {
|
||||
i915_gem_next_request_seqno(ring);
|
||||
}
|
||||
(void)i915_add_request(ring, file, NULL);
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
int blit_video(u32 hbitmap, int dst_x, int dst_y,
|
||||
int src_x, int src_y, u32 w, u32 h)
|
||||
{
|
||||
@ -728,6 +698,7 @@ int blit_video(u32 hbitmap, int dst_x, int dst_y,
|
||||
u32_t offset;
|
||||
u8 slot;
|
||||
int n=0;
|
||||
int ret;
|
||||
|
||||
if(unlikely(hbitmap==0))
|
||||
return -1;
|
||||
@ -746,7 +717,7 @@ int blit_video(u32 hbitmap, int dst_x, int dst_y,
|
||||
dst_clip.xmin = 0;
|
||||
dst_clip.ymin = 0;
|
||||
dst_clip.xmax = winrc.right-winrc.left-1;
|
||||
dst_clip.ymax = winrc.bottom -winrc.top -1;
|
||||
dst_clip.ymax = winrc.bottom -winrc.top-1;
|
||||
|
||||
src_clip.xmin = 0;
|
||||
src_clip.ymin = 0;
|
||||
@ -913,18 +884,56 @@ int blit_video(u32 hbitmap, int dst_x, int dst_y,
|
||||
|
||||
context->cmd_buffer+= n*4;
|
||||
|
||||
// i915_gem_object_set_to_gtt_domain(bitmap->obj, false);
|
||||
context->obj->base.pending_read_domains |= I915_GEM_DOMAIN_COMMAND;
|
||||
|
||||
|
||||
mutex_lock(&main_device->struct_mutex);
|
||||
|
||||
i915_gem_object_set_to_gtt_domain(bitmap->obj, false);
|
||||
|
||||
if (HAS_BLT(main_device))
|
||||
{
|
||||
int ret;
|
||||
u32 seqno;
|
||||
int i;
|
||||
|
||||
ring = &dev_priv->ring[BCS];
|
||||
// printf("dispatch... ");
|
||||
ring->dispatch_execbuffer(ring, offset, n*4);
|
||||
|
||||
i915_gem_object_sync(bitmap->obj, ring);
|
||||
intel_ring_invalidate_all_caches(ring);
|
||||
|
||||
seqno = i915_gem_next_request_seqno(ring);
|
||||
// printf("seqno = %d\n", seqno);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(ring->sync_seqno); i++) {
|
||||
if (seqno < ring->sync_seqno[i]) {
|
||||
/* The GPU can not handle its semaphore value wrapping,
|
||||
* so every billion or so execbuffers, we need to stall
|
||||
* the GPU in order to reset the counters.
|
||||
*/
|
||||
DRM_DEBUG("wrap seqno\n");
|
||||
|
||||
ret = i915_gpu_idle(main_device);
|
||||
if (ret)
|
||||
goto fail;
|
||||
i915_gem_retire_requests(main_device);
|
||||
|
||||
BUG_ON(ring->sync_seqno[i]);
|
||||
}
|
||||
}
|
||||
|
||||
ret = ring->dispatch_execbuffer(ring, offset, n*4);
|
||||
if (ret)
|
||||
goto fail;
|
||||
// printf("done\n");
|
||||
|
||||
i915_gem_execbuffer_retire_commands(main_device, ring);
|
||||
bitmap->obj->base.read_domains = bitmap->obj->base.pending_read_domains;
|
||||
bitmap->obj->base.write_domain = bitmap->obj->base.pending_write_domain;
|
||||
bitmap->obj->fenced_gpu_access = bitmap->obj->pending_fenced_gpu_access;
|
||||
|
||||
i915_gem_object_move_to_active(bitmap->obj, ring, seqno);
|
||||
|
||||
i915_gem_execbuffer_retire_commands(main_device, NULL, ring);
|
||||
// printf("retire\n");
|
||||
}
|
||||
else
|
||||
@ -934,12 +943,12 @@ int blit_video(u32 hbitmap, int dst_x, int dst_y,
|
||||
ring->flush(ring, 0, I915_GEM_DOMAIN_RENDER);
|
||||
};
|
||||
|
||||
bitmap->obj->base.read_domains = I915_GEM_DOMAIN_CPU;
|
||||
bitmap->obj->base.write_domain = I915_GEM_DOMAIN_CPU;
|
||||
// bitmap->obj->base.read_domains = I915_GEM_DOMAIN_CPU;
|
||||
// bitmap->obj->base.write_domain = I915_GEM_DOMAIN_CPU;
|
||||
|
||||
return 0;
|
||||
mutex_unlock(&main_device->struct_mutex);
|
||||
fail:
|
||||
return -1;
|
||||
return ret;
|
||||
};
|
||||
|
||||
|
||||
@ -1317,7 +1326,6 @@ int __queue_work(struct workqueue_struct *wq,
|
||||
struct work_struct *work)
|
||||
{
|
||||
unsigned long flags;
|
||||
// ENTER();
|
||||
|
||||
// dbgprintf("wq: %x, work: %x\n",
|
||||
// wq, work );
|
||||
@ -1336,13 +1344,11 @@ int __queue_work(struct workqueue_struct *wq,
|
||||
// dbgprintf("wq: %x head %x, next %x\n",
|
||||
// wq, &wq->worklist, wq->worklist.next);
|
||||
|
||||
// LEAVE();
|
||||
return 1;
|
||||
};
|
||||
|
||||
void __stdcall delayed_work_timer_fn(unsigned long __data)
|
||||
{
|
||||
// ENTER();
|
||||
struct delayed_work *dwork = (struct delayed_work *)__data;
|
||||
struct workqueue_struct *wq = dwork->work.data;
|
||||
|
||||
@ -1350,7 +1356,6 @@ void __stdcall delayed_work_timer_fn(unsigned long __data)
|
||||
// wq, &dwork->work );
|
||||
|
||||
__queue_work(wq, &dwork->work);
|
||||
// LEAVE();
|
||||
}
|
||||
|
||||
|
||||
@ -1368,7 +1373,6 @@ int queue_delayed_work(struct workqueue_struct *wq,
|
||||
struct delayed_work *dwork, unsigned long delay)
|
||||
{
|
||||
u32 flags;
|
||||
// ENTER();
|
||||
|
||||
// dbgprintf("wq: %x, work: %x\n",
|
||||
// wq, &dwork->work );
|
||||
|
Loading…
Reference in New Issue
Block a user