ddk: kernel rw locks
git-svn-id: svn://kolibrios.org@5345 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
Sergey Semyonov (Serge)
parent
966e9d897b
commit
cfd2f3ef88
@ -47,6 +47,11 @@
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.global _MutexInit
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.global _MutexLock
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.global _MutexUnlock
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.global _InitRwsem
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.global _DownRead
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.global _DownWrite
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.global _UpRead
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.global _UpWrite
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.global _PciApi
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.global _PciRead16
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@ -120,6 +125,12 @@
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.def _MutexLock; .scl 2; .type 32; .endef
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.def _MutexUnlock; .scl 2; .type 32; .endef
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.def _InitRwsem; .scl 2; .type 32; .endef
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.def _DownRead; .scl 2; .type 32; .endef
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.def _DownWrite; .scl 2; .type 32; .endef
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.def _UpRead; .scl 2; .type 32; .endef
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.def _UpWrite; .scl 2; .type 32; .endef
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.def _PciApi; .scl 2; .type 32; .endef
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.def _PciRead16; .scl 2; .type 32; .endef
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.def _PciRead32; .scl 2; .type 32; .endef
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@ -191,6 +202,12 @@ _MutexInit:
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_MutexLock:
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_MutexUnlock:
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_InitRwsem:
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_DownRead:
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_DownWrite:
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_UpRead:
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_UpWrite:
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_PciApi:
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_PciRead16:
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_PciRead32:
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@ -263,6 +280,12 @@ _WaitEventTimeout:
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.ascii " -export:MutexLock" # fastcall
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.ascii " -export:MutexUnlock" # fastcall
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.ascii " -export:InitRwsem" # fastcall
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.ascii " -export:DownRead" # fastcall
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.ascii " -export:DownWrite" # fastcall
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.ascii " -export:UpRead" # fastcall
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.ascii " -export:UpWrite" # fastcall
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.ascii " -export:PciApi" #
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.ascii " -export:PciRead16" # stdcall
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.ascii " -export:PciRead32" # stdcall
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@ -39,112 +39,24 @@
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#ifdef __KERNEL__
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#include <asm/asm.h>
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/*
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* The bias values and the counter type limits the number of
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* potential readers/writers to 32767 for 32 bits and 2147483647
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* for 64 bits.
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*/
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#define FASTCALL __attribute__ ((fastcall)) __attribute__ ((dllimport))
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#ifdef CONFIG_X86_64
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# define RWSEM_ACTIVE_MASK 0xffffffffL
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#else
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# define RWSEM_ACTIVE_MASK 0x0000ffffL
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#endif
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#define RWSEM_UNLOCKED_VALUE 0x00000000L
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#define RWSEM_ACTIVE_BIAS 0x00000001L
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#define RWSEM_WAITING_BIAS (-RWSEM_ACTIVE_MASK-1)
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#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS
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#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
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void FASTCALL DownRead(struct rw_semaphore *sem)__asm__("DownRead");
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void FASTCALL DownWrite(struct rw_semaphore *sem)__asm__("DownWrite");
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void FASTCALL UpRead(struct rw_semaphore *sem)__asm__("UpRead");
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void FASTCALL UpWrite(struct rw_semaphore *sem)__asm__("UpWrite");
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/*
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* lock for reading
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*/
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static inline void __down_read(struct rw_semaphore *sem)
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{
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asm volatile("# beginning down_read\n\t"
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LOCK_PREFIX _ASM_INC "(%1)\n\t"
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/* adds 0x00000001 */
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" jns 1f\n"
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" call call_rwsem_down_read_failed\n"
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"1:\n\t"
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"# ending down_read\n\t"
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: "+m" (sem->count)
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: "a" (sem)
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: "memory", "cc");
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}
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/*
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* trylock for reading -- returns 1 if successful, 0 if contention
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*/
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static inline int __down_read_trylock(struct rw_semaphore *sem)
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{
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long result, tmp;
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asm volatile("# beginning __down_read_trylock\n\t"
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" mov %0,%1\n\t"
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"1:\n\t"
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" mov %1,%2\n\t"
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" add %3,%2\n\t"
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" jle 2f\n\t"
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LOCK_PREFIX " cmpxchg %2,%0\n\t"
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" jnz 1b\n\t"
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"2:\n\t"
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"# ending __down_read_trylock\n\t"
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: "+m" (sem->count), "=&a" (result), "=&r" (tmp)
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: "i" (RWSEM_ACTIVE_READ_BIAS)
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: "memory", "cc");
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return result >= 0 ? 1 : 0;
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}
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/*
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* lock for writing
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*/
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static inline void __down_write_nested(struct rw_semaphore *sem, int subclass)
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{
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long tmp;
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asm volatile("# beginning down_write\n\t"
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LOCK_PREFIX " xadd %1,(%2)\n\t"
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/* adds 0xffff0001, returns the old value */
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" test " __ASM_SEL(%w1,%k1) "," __ASM_SEL(%w1,%k1) "\n\t"
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/* was the active mask 0 before? */
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" jz 1f\n"
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" call call_rwsem_down_write_failed\n"
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"1:\n"
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"# ending down_write"
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: "+m" (sem->count), "=d" (tmp)
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: "a" (sem), "1" (RWSEM_ACTIVE_WRITE_BIAS)
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: "memory", "cc");
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DownRead(sem);
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}
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static inline void __down_write(struct rw_semaphore *sem)
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{
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__down_write_nested(sem, 0);
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}
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/*
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* trylock for writing -- returns 1 if successful, 0 if contention
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*/
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static inline int __down_write_trylock(struct rw_semaphore *sem)
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{
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long result, tmp;
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asm volatile("# beginning __down_write_trylock\n\t"
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" mov %0,%1\n\t"
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"1:\n\t"
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" test " __ASM_SEL(%w1,%k1) "," __ASM_SEL(%w1,%k1) "\n\t"
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/* was the active mask 0 before? */
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" jnz 2f\n\t"
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" mov %1,%2\n\t"
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" add %3,%2\n\t"
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LOCK_PREFIX " cmpxchg %2,%0\n\t"
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" jnz 1b\n\t"
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"2:\n\t"
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" sete %b1\n\t"
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" movzbl %b1, %k1\n\t"
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"# ending __down_write_trylock\n\t"
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: "+m" (sem->count), "=&a" (result), "=&r" (tmp)
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: "er" (RWSEM_ACTIVE_WRITE_BIAS)
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: "memory", "cc");
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return result;
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DownWrite(sem);
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}
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/*
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@ -152,17 +64,7 @@ static inline int __down_write_trylock(struct rw_semaphore *sem)
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*/
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static inline void __up_read(struct rw_semaphore *sem)
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{
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long tmp;
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asm volatile("# beginning __up_read\n\t"
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LOCK_PREFIX " xadd %1,(%2)\n\t"
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/* subtracts 1, returns the old value */
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" jns 1f\n\t"
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" call call_rwsem_wake\n" /* expects old value in %edx */
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"1:\n"
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"# ending __up_read\n"
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: "+m" (sem->count), "=d" (tmp)
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: "a" (sem), "1" (-RWSEM_ACTIVE_READ_BIAS)
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: "memory", "cc");
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UpRead(sem);
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}
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/*
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@ -170,55 +72,7 @@ static inline void __up_read(struct rw_semaphore *sem)
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*/
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static inline void __up_write(struct rw_semaphore *sem)
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{
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long tmp;
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asm volatile("# beginning __up_write\n\t"
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LOCK_PREFIX " xadd %1,(%2)\n\t"
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/* subtracts 0xffff0001, returns the old value */
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" jns 1f\n\t"
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" call call_rwsem_wake\n" /* expects old value in %edx */
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"1:\n\t"
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"# ending __up_write\n"
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: "+m" (sem->count), "=d" (tmp)
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: "a" (sem), "1" (-RWSEM_ACTIVE_WRITE_BIAS)
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: "memory", "cc");
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}
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/*
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* downgrade write lock to read lock
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*/
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static inline void __downgrade_write(struct rw_semaphore *sem)
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{
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asm volatile("# beginning __downgrade_write\n\t"
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LOCK_PREFIX _ASM_ADD "%2,(%1)\n\t"
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/*
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* transitions 0xZZZZ0001 -> 0xYYYY0001 (i386)
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* 0xZZZZZZZZ00000001 -> 0xYYYYYYYY00000001 (x86_64)
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*/
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" jns 1f\n\t"
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" call call_rwsem_downgrade_wake\n"
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"1:\n\t"
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"# ending __downgrade_write\n"
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: "+m" (sem->count)
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: "a" (sem), "er" (-RWSEM_WAITING_BIAS)
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: "memory", "cc");
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}
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/*
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* implement atomic add functionality
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*/
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static inline void rwsem_atomic_add(long delta, struct rw_semaphore *sem)
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{
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asm volatile(LOCK_PREFIX _ASM_ADD "%1,%0"
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: "+m" (sem->count)
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: "er" (delta));
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}
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/*
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* implement exchange and add functionality
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*/
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static inline long rwsem_atomic_update(long delta, struct rw_semaphore *sem)
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{
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return delta + xadd(&sem->count, delta);
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UpWrite(sem);
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}
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#endif /* __KERNEL__ */
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@ -7,6 +7,7 @@
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#include <linux/errno.h>
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#include <linux/spinlock.h>
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#include <linux/mutex.h>
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#include <linux/rwsem.h>
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#include <linux/pci.h>
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@ -25,8 +25,8 @@ struct rw_semaphore;
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#else
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/* All arch specific implementations share the same struct */
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struct rw_semaphore {
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long count;
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struct list_head wait_list;
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long count;
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raw_spinlock_t wait_lock;
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#ifdef CONFIG_RWSEM_SPIN_ON_OWNER
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struct optimistic_spin_queue osq; /* spinner MCS lock */
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@ -1,9 +1,8 @@
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#include <ddk.h>
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#ifndef __SYSCALL_H__
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#define __SYSCALL_H__
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#include <ddk.h>
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typedef u32 addr_t;
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typedef u32 count_t;
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@ -55,6 +54,12 @@ void FASTCALL MutexInit(struct mutex*)__asm__("MutexInit");
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void FASTCALL MutexLock(struct mutex*)__asm__("MutexLock");
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void FASTCALL MutexUnlock(struct mutex*)__asm__("MutexUnlock");
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void FASTCALL InitRwsem(struct rw_semaphore *sem)__asm__("InitRwsem");
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void FASTCALL DownRead(struct rw_semaphore *sem)__asm__("DownRead");
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void FASTCALL DownWrite(struct rw_semaphore *sem)__asm__("DownWrite");
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void FASTCALL UpRead(struct rw_semaphore *sem)__asm__("UpRead");
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void FASTCALL UpWrite(struct rw_semaphore *sem)__asm__("UpWrite");
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addr_t IMPORT GetStackBase(void)__asm__("GetStackBase");
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u32 IMPORT GetPid(void)__asm__("GetPid");
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