2024-03-31 21:43:38 +02:00
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; ;;
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;; Copyright (C) KolibriOS team 2004-2024. All rights reserved. ;;
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;; Distributed under terms of the GNU General Public License ;;
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;; ;;
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;; GNU GENERAL PUBLIC LICENSE ;;
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;; Version 2, June 1991 ;;
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;; ;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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2024-04-29 03:03:10 +02:00
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; Supported NVMe Controller Version
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2024-05-28 18:26:27 +02:00
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NVM_SUPPORTED_CONTROLLER_VERSION = 0x00010400 ; (v1.4.0)
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2024-04-29 03:03:10 +02:00
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2024-05-28 18:26:27 +02:00
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NVM_MPS = 0 ; Memory Page Size (2 ^ (12 + MPS))
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2024-05-28 23:55:06 +02:00
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NVM_ASQS = 64 ; Admin Submission Queue Size
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2024-05-28 18:26:27 +02:00
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NVM_ACQS = NVM_ASQS ; Admin Completion Queue Size
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2024-05-26 02:37:42 +02:00
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2024-03-31 21:43:38 +02:00
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; Opcodes for NVM commands
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NVM_CMD_FLUSH = 0x00
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NVM_CMD_WRITE = 0x01
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NVM_CMD_READ = 0x02
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NVM_CMD_WRITE_UNCORRECTABLE = 0x04
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NVM_CMD_COMPARE = 0x05
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NVM_CMD_WRITE_ZEROES = 0x08
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NVM_CMD_DATASET_MANAGEMENT = 0x09
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NVM_CMD_VERIFY = 0x0C
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NVM_CMD_RESERVATION_REG = 0x0D
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NVM_CMD_RESERVATION_REPORT = 0x0E
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NVM_CMD_RESERVATION_ACQUIRE = 0x11
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NVM_CMD_RESERVATION_RELEASE = 0x15
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NVM_CMD_COPY = 0x19
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; Opcodes for admin commands
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ADM_CMD_DEL_IO_SUBMISSION_QUEUE = 0x00
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ADM_CMD_CRE_IO_SUBMISSION_QUEUE = 0x01
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ADM_CMD_GET_LOG_PAGE = 0x02
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ADM_CMD_DEL_IO_COMPLETION_QUEUE = 0x04
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ADM_CMD_CRE_IO_COMPLETION_QUEUE = 0x05
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ADM_CMD_IDENTIFY = 0x06
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ADM_CMD_ABORT = 0x08
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ADM_CMD_SET_FEATURES = 0x09
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ADM_CMD_GET_FEATURES = 0x0A
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; fuse (fused operation): In a fused operation, a complex command is created by 'fusing' together
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; two simpler commands. This field specifies whether this command is part
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; of a fused operation, and if so, which command it is in the sequence:
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; 00b -> Normal operation
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; 01b -> Fused operation, first command
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; 10b -> Fused operation, second command
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; 11b -> Reserved
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NO_FUSE = 0
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FUSE_OP_FIRST_CMD = 1 shl 8
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FUSE_OP_SECOND_CMD = 2 shl 8
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; sel (PRP or SGL for data transfer): This field specifies whether PRPs or SGLs are used for any
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; data transfer associated with the command. PRPs shall be
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; used for all Admin commands for NVMe over PCIe implementations.
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; SGLs shall be used for all Admin and I/O commands for NVMe over
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; Fabrics implementations (i.e., field set to 01b):
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; 00b -> PRPs are used for this transfer
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; 01b -> SGLs are used for this transfer, MPTR will contain address of
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; a single contiguous physical buffer that is byte aligned
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; 10b -> SGLs are used for this transfer. MPTR will contain address of
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; an SGL segment containing exactly one SGL descriptor that is
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; QWORD aligned
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; 11b -> Reserved
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SEL_PRP = 0
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SEL_SGL = 1 shl 14
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; Controller or Namespace Structure (CNS) specifies the information to be returned to the host.
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CNS_IDNS = 0x0 ; Namespace data structure (NSID)
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CNS_IDCS = 0x1 ; Controller data structure
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CNS_ANIDL = 0x2 ; Active namespace ID list (NSID)
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CNS_NIDL = 0x3 ; Namespace identification descriptor list (NSID)
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CNS_NVM_SL = 0x4 ; NVM Set List
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; Optional Admin Command Support (OACS) values
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OACS_SEC_SEN_RECV_SUPPORTED = 1 shl 0
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OACS_FMT_NVM_SUPPORTED = 1 shl 1
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OACS_FIRM_COMDL_SUPPORTED = 1 shl 2
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OACS_NSMAN_SUPPORTED = 1 shl 3
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; scope is all attached namespaces or all namespaces in NVM subsystem
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NSID_BROADCAST = 0xFFFFFFFF
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2024-04-02 01:47:14 +02:00
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NSSRC_RESET = 0x4E564D65 ; "NVMe" (initiates a NVMe subsystem reset)
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; NVMe Capabilities
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CAP_MQES = 0xff
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CAP_CQR = 1 shl 16
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CAP_AMS = (1 shl 17) or (1 shl 18)
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CAP_TO = 0xff000000
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CAP_DSTRD = 1 or (1 shl 1) or (1 shl 2) or (1 shl 3)
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CAP_NSSRS = 1 shl 4
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CAP_CSS_NVM_CMDSET = 1 shl 5
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CAP_CSS_NOIO = 1 shl 12
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CAP_BPS = 1 shl 14
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CAP_CPS_COSCOP = 1 shl 15
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CAP_CPS_DOSCOP = 1 shl 16
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CAP_CPS_NVMSCOP = CAP_CPS_COSCOP or CAP_CPS_DOSCOP
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CAP_MPSMIN = (1 shl 17) or (1 shl 18) or (1 shl 19) or (1 shl 20)
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CAP_MPSMAX = (1 shl 21) or (1 shl 22) or (1 shl 23) or (1 shl 24)
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CAP_PMRS = 1 shl 25
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CAP_CMBS = 1 shl 26
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CAP_NSSS = 1 shl 27
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CAP_CRMS_CRWMS = 1 shl 28
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CAP_CRMS_CRIMS = 1 shl 29
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; Controller Configuration Bits
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2024-05-24 01:15:34 +02:00
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CC_EN = 1
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2024-04-02 01:47:14 +02:00
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CC_CSS = (1 shl 4) or (1 shl 5) or (1 shl 6)
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CC_MPS = (1 shl 7) or (1 shl 8) or (1 shl 9) or (1 shl 10)
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CC_AMS = (1 shl 11) or (1 shl 12) or (1 shl 13)
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CC_SHN = (1 shl 14) or (1 shl 15)
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CC_IOSQES = (1 shl 16) or (1 shl 17) or (1 shl 18) or (1 shl 19)
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CC_IOCQES = (1 shl 20) or (1 shl 21) or (1 shl 22) or (1 shl 23)
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CC_CRIME = 1 shl 24
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CC_DEFAULT_IOSQES = 6 shl 16
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CC_DEFAULT_IOCQES = 4 shl 16
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2024-05-06 20:07:29 +02:00
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; Completion Queue Entry Status Field Values
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CQ_PHASE_TAG = 1 shl 0
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CQ_STATUS_SC = 0xfe
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CQ_STATUS_SCT = (1 shl 9) or (1 shl 10) or (1 shl 11)
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CQ_STATUS_CRD = (1 shl 12) or (1 shl 13)
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CQ_STATUS_M = 1 shl 14
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CQ_STATUS_DNR = 1 shl 15
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; Completion Queue Entry Status Field - Status Code Type Values
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CQ_STATUS_SCT_GCS = 0x0 ; Generic Command Status
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CQ_STATUS_SCT_CSS = 0x1 ; Command Specific Status
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CQ_STATUS_SCT_MADIE = 0x2 ; Media and Data Integrity Errors
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CQ_STATUS_SCT_PRS = 0x3 ; Path Related Status
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; Completion Queue Entry Status Field - Status Code Generic Command Values
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CQ_STATUS_SC_GCS_SUCCESS = 0x00 ; Successful Completion
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CQ_STATUS_SC_GCS_ICOP = 0x01 ; Invalid Command Opcode
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CQ_STATUS_SC_GCS_IFIC = 0x02 ; Invalid Field in Command
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CQ_STATUS_SC_GCS_CIDC = 0x03 ; Command ID Conflict
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CQ_STATUS_SC_GCS_DTE = 0x04 ; Data Transfer Error
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CQ_STATUS_SC_GCS_CAPLN = 0x05 ; Commands Aborted due to Power Loss Notification
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CQ_STATUS_SC_GCS_INERR = 0x06 ; Internal Error
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CQ_STATUS_SC_GCS_CAR = 0x07 ; Command Abort Requested
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CQ_STATUS_SC_GCS_CASQD = 0x08 ; Command Aborted due to SQ Deletion
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CQ_STATUS_SC_GCS_CAFFC = 0x09 ; Command Aborted due to Failed Fused Command
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CQ_STATUS_SC_GCS_CAMFC = 0x0A ; Command Aborted due to Missing Fused Command
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CQ_STATUS_SC_GCS_INNOF = 0x0B ; Invalid Namespace or Format
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CQ_STATUS_SC_GCS_CSE = 0x0C ; Command Sequence Error
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CQ_STATUS_SC_GCS_INSGL = 0x0D ; Invalid SGL Segment Descriptor
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CQ_STATUS_SC_GCS_INNSGL = 0x0E ; Invalid Number of SGL Descriptors
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CQ_STATUS_SC_GCS_OPDEN = 0x15 ; Operation Denied
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CQ_STATUS_SC_GCS_NSIWP = 0x20 ; Namespace is Write Protected
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CQ_STATUS_SC_GCS_CINT = 0x21 ; Command Interrupted
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CQ_STATUS_SC_GCS_TTE = 0x22 ; Transient Transport Error
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; Completion Queue Entry Status Field - Status Code Media and Data Integrity Errors
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CQ_STATUS_SC_MADIE_WF = 0x80 ; Write Fault
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CQ_STATUS_SC_MADIE_URE = 0x81 ; Unrecovered Read Error
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CQ_STATUS_SC_MADIE_ACDEN = 0x86 ; Access Denied
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CQ_STATUS_SC_MADIE_DOULB = 0x87 ; Deallocated or Unwritten Logical Block
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2024-04-20 05:37:14 +02:00
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2024-05-24 01:15:34 +02:00
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; Controller Status (CSTS) Values
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CSTS_RDY = 1
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CSTS_CFS = 1 shl 1
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CSTS_SHST = (1 shl 2) or (1 shl 3)
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CSTS_NSSRO = 1 shl 4
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CSTS_PP = 1 shl 5
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2024-05-26 22:54:59 +02:00
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; Admin Queue Attributes (AQA) Values
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AQA_ASQS = 0xfff
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AQA_ACQS = 0xfff shl 16
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2024-05-26 00:56:58 +02:00
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struct NVME_MMIO
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CAP dq ? ; Controller Capabilities
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VS dd ? ; Version
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INTMS dd ? ; Interrupt Mask Set
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INTMC dd ? ; Interrupt Mask Clear
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CC dd ? ; Controller Configuration
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dd ? ; Reserved
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CSTS dd ? ; Controller Status
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NSSR dd ? ; NVM Subsystem Reset
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AQA dd ? ; Admin Queue Attributes
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ASQ dq ? ; Admin Submission Queue Base Address
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ACQ dq ? ; Admin Completion Queue Base Address
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CMBLOC dd ? ; Controller Memory Buffer Location
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2024-05-28 23:55:06 +02:00
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CMBSZ dd ? ; Controller Memory Buffer Size
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BPINFO dd ? ; Boot Partition Information
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BPRSEL dd ? ; Boot Partition Read Select
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BPMBL dq ? ; Boot Partition Memory Buffer Location
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CMBMSC dd ? ; Controller Memory Buffer Memory Space
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CMBSTS dd ? ; Controller Memory Buffer Status
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rb 3491 ; Reserved
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PMRCAP dd ? ; Persistent Memory Capabilities
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PMRCTL dd ? ; Persistent Memory Region Control
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PMRSTS dd ? ; Persistent Memory Region Status
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PMREBS dd ? ; Persistent Memory Region Elasticity Buffer Size
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PMRSWTP dd ? ; Persistent Memory Region Sustained Write Throughput
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PMRMSC dq ? ; Persistent Memory Region Controller Memory Space Control
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SQ0TDBL dd ? ; Submission Queue 0 Tail Doorbell (Admin)
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2024-04-02 01:47:14 +02:00
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ends
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2024-03-31 21:43:38 +02:00
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; Submission Queue Entry (64 bytes)
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2024-03-31 22:13:17 +02:00
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struct SQ_ENTRY
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2024-05-26 00:56:58 +02:00
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cdw0 dd ?
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nsid dd ?
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cdw2 dd ?
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cdw3 dd ?
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mptr dq ?
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dptr dq ?
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cdw10 dd ?
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cdw11 dd ?
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cdw12 dd ?
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cdw13 dd ?
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cdw14 dd ?
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cdw15 dd ?
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2024-03-31 22:13:17 +02:00
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ends
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2024-03-31 21:43:38 +02:00
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2024-05-06 18:55:50 +02:00
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; Completion Queue Entry (16 bytes)
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struct CQ_ENTRY
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cdw0 dd ?
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2024-05-26 00:56:58 +02:00
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rd 1 ; reserved
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2024-05-06 20:07:29 +02:00
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sqhd dw ?
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sqid dw ?
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cid dw ?
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2024-05-06 18:55:50 +02:00
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status dw ?
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ends
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2024-04-20 05:37:14 +02:00
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struct pcidev
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2024-04-28 02:12:16 +02:00
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bus db ?
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2024-04-29 03:03:10 +02:00
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devfn db ?
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2024-05-26 00:56:58 +02:00
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rw 1
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2024-05-26 19:24:34 +02:00
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mmio_ptr dd ?
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2024-05-28 23:55:06 +02:00
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sq_ptr dd ?
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cq_ptr dd ?
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2024-04-20 05:37:14 +02:00
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ends
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2024-04-28 02:12:16 +02:00
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TOTAL_PCIDEVS = 4
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TOTAL_PCIDEVS_MALLOC_SZ = TOTAL_PCIDEVS * sizeof.pcidev
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2024-03-31 21:43:38 +02:00
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2024-03-31 22:13:17 +02:00
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struct NVME_IDENT_CONTROLLER
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2024-03-31 21:43:38 +02:00
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2024-03-31 22:13:17 +02:00
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pci_vid rw 1
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pci_ssvid rw 1
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serial rb 20
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model rb 40
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firm_rev rq 1
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rab rb 1
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ieee rb 3
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cmic rb 1
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mdts rb 1
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ctrlid rw 1
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ver rb 3
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rtd3r rd 1
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rtd3e rd 1
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ctrlatt rd 1
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rrls rw 1
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2024-05-04 00:08:18 +02:00
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rb 9 ; reserved
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2024-03-31 22:13:17 +02:00
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ctrltyp rb 1
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fguid rq 2
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crdt1 rw 1
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ctdt2 rw 1
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crdt3 rw 1
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2024-03-31 21:43:38 +02:00
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rb 106 ; reserved
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rb 13 ; reserved (NVMMI)
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2024-03-31 22:13:17 +02:00
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nvmsr rb 1
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vmci rb 1
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mec rb 1
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oacs rw 1
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acl rb 1
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aerl rb 1
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frmw rb 1
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lpa rb 1
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elpe rb 1
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npss rb 1
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avscc rb 1
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apsta rb 1
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wctemp rw 1
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cctemp rw 1
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mtfa rw 1
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hmpre rd 1
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hmmin rd 1
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tnvmcap rq 2
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unvmcap rq 2
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rpmbs rd 1
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edstt rw 1
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dsto rb 1
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fwug rb 1
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kas rw 1
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hctma rw 1
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mntmt rw 1
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mxtmt rw 1
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sanicap rd 1
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hmminds rd 1
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hmmaxd rw 1
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nsetidmax rw 1
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endgidmax rw 1
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anatt rb 1
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anacap rb 1
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anagrpmax rd 1
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nanagrpid rd 1
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pels rd 1
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domid rw 1
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2024-03-31 21:43:38 +02:00
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rb 10 ; reserved
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2024-03-31 22:13:17 +02:00
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megcap rq 2
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2024-03-31 21:43:38 +02:00
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rb 128 ; reserved
|
2024-03-31 22:13:17 +02:00
|
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sqes rb 1
|
|
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cqes rb 1
|
|
|
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maxcmd rw 1
|
|
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nn rd 1
|
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oncs rw 1
|
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fuses rw 1
|
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fna rb 1
|
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vwc rb 1
|
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awun rw 1
|
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awupf rw 1
|
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icsvscc rb 1
|
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nwpc rb 1
|
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acwu rw 1
|
|
|
|
ocfs rw 1
|
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|
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sgls rd 1
|
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|
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mnan rd 1
|
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|
|
maxdna rq 2
|
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|
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maxcna rd 1
|
2024-03-31 21:43:38 +02:00
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|
|
rb 204 ; reserved
|
2024-03-31 22:13:17 +02:00
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|
|
subnqn rb 256
|
2024-03-31 21:43:38 +02:00
|
|
|
rb 768 ; reserved
|
2024-03-31 22:13:17 +02:00
|
|
|
ioccsz rd 1
|
|
|
|
iorcsz rd 1
|
|
|
|
icdoff rw 1
|
|
|
|
fcatt rb 1
|
|
|
|
msdbd rb 1
|
|
|
|
ofcs rw 1
|
2024-03-31 21:43:38 +02:00
|
|
|
rb 242 ; reserved
|
2024-03-31 22:13:17 +02:00
|
|
|
psd0 rb 32
|
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|
|
psd1 rb 32
|
|
|
|
psd2 rb 32
|
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|
psd3 rb 32
|
|
|
|
psd4 rb 32
|
|
|
|
psd5 rb 32
|
|
|
|
psd6 rb 32
|
|
|
|
psd7 rb 32
|
|
|
|
psd8 rb 32
|
|
|
|
psd9 rb 32
|
|
|
|
psd10 rb 32
|
|
|
|
psd11 rb 32
|
|
|
|
psd12 rb 32
|
|
|
|
psd13 rb 32
|
|
|
|
psd14 rb 32
|
|
|
|
psd15 rb 32
|
|
|
|
psd16 rb 32
|
|
|
|
psd17 rb 32
|
|
|
|
psd18 rb 32
|
|
|
|
psd19 rb 32
|
|
|
|
psd20 rb 32
|
|
|
|
psd21 rb 32
|
|
|
|
psd22 rb 32
|
|
|
|
psd23 rb 32
|
|
|
|
psd24 rb 32
|
|
|
|
psd25 rb 32
|
|
|
|
psd26 rb 32
|
|
|
|
psd27 rb 32
|
|
|
|
psd28 rb 32
|
|
|
|
psd29 rb 32
|
|
|
|
psd30 rb 32
|
|
|
|
psd31 rb 32
|
|
|
|
venspec rb 1024
|
2024-03-31 21:43:38 +02:00
|
|
|
|
|
|
|
ends
|